Lines Matching +full:tdm +full:- +full:invert +full:- +full:sync

1 // SPDX-License-Identifier: GPL-2.0-only
2 // cs4234.c -- ALSA SoC CS4234 driver
44 /* -89.92dB to +6.02dB with step of 0.38dB */
45 static const DECLARE_TLV_DB_SCALE(dac_tlv, -8992, 38, 0);
96 regmap_read(cs4234->regmap, CS4234_ADC_CTRL2, &val); in cs4234_dac14_grp_delay_put()
98 ret = -EBUSY; in cs4234_dac14_grp_delay_put()
99 dev_err(component->dev, "Can't change group delay while ADC are ON\n"); in cs4234_dac14_grp_delay_put()
103 regmap_read(cs4234->regmap, CS4234_DAC_CTRL4, &val); in cs4234_dac14_grp_delay_put()
105 ret = -EBUSY; in cs4234_dac14_grp_delay_put()
106 dev_err(component->dev, "Can't change group delay while DAC are ON\n"); in cs4234_dac14_grp_delay_put()
122 complete_all(&cs4234->vq_ramp_complete); in cs4234_vq_ramp_done()
134 wait_for_completion(&cs4234->vq_ramp_complete); in cs4234_set_bias_level()
228 SOC_SINGLE("DAC1-4 Soft Ramp Switch", CS4234_DAC_CTRL3, CS4234_DAC14_ATT_SHIFT, 1, 1),
232 SOC_ENUM_EXT("DAC1-4 Group Delay", cs4234_dac14_group_delay,
235 SOC_SINGLE("ADC1 Invert Switch", CS4234_ADC_CTRL1, CS4234_INV_ADC1_SHIFT, 1, 0),
236 SOC_SINGLE("ADC2 Invert Switch", CS4234_ADC_CTRL1, CS4234_INV_ADC2_SHIFT, 1, 0),
237 SOC_SINGLE("ADC3 Invert Switch", CS4234_ADC_CTRL1, CS4234_INV_ADC3_SHIFT, 1, 0),
238 SOC_SINGLE("ADC4 Invert Switch", CS4234_ADC_CTRL1, CS4234_INV_ADC4_SHIFT, 1, 0),
240 SOC_SINGLE("DAC1 Invert Switch", CS4234_DAC_CTRL2, CS4234_INV_DAC1_SHIFT, 1, 0),
241 SOC_SINGLE("DAC2 Invert Switch", CS4234_DAC_CTRL2, CS4234_INV_DAC2_SHIFT, 1, 0),
242 SOC_SINGLE("DAC3 Invert Switch", CS4234_DAC_CTRL2, CS4234_INV_DAC3_SHIFT, 1, 0),
243 SOC_SINGLE("DAC4 Invert Switch", CS4234_DAC_CTRL2, CS4234_INV_DAC4_SHIFT, 1, 0),
244 SOC_SINGLE("DAC5 Invert Switch", CS4234_DAC_CTRL2, CS4234_INV_DAC5_SHIFT, 1, 0),
256 SOC_SINGLE("Low-latency Switch", CS4234_DAC_CTRL3, CS4234_MUTE_LL_SHIFT, 1, 1),
258 SOC_SINGLE("DAC1 Low-latency Invert Switch", CS4234_LOW_LAT_CTRL1,
260 SOC_SINGLE("DAC2 Low-latency Invert Switch", CS4234_LOW_LAT_CTRL1,
262 SOC_SINGLE("DAC3 Low-latency Invert Switch", CS4234_LOW_LAT_CTRL1,
264 SOC_SINGLE("DAC4 Low-latency Invert Switch", CS4234_LOW_LAT_CTRL1,
267 SOC_ENUM("Low-latency Noise Gate", cs4234_ll_noise_gate),
268 SOC_ENUM("DAC1-4 Noise Gate", cs4234_dac14_noise_gate),
271 SOC_SINGLE("DAC1-4 De-emphasis Switch", CS4234_DAC_CTRL1,
273 SOC_SINGLE("DAC5 De-emphasis Switch", CS4234_DAC_CTRL1,
289 struct snd_soc_component *component = codec_dai->component; in cs4234_dai_set_fmt()
293 cs4234->format = format & SND_SOC_DAIFMT_FORMAT_MASK; in cs4234_dai_set_fmt()
294 switch (cs4234->format) { in cs4234_dai_set_fmt()
301 case SND_SOC_DAIFMT_DSP_A: /* TDM mode in datasheet */ in cs4234_dai_set_fmt()
305 dev_err(component->dev, "Unsupported dai format\n"); in cs4234_dai_set_fmt()
306 return -EINVAL; in cs4234_dai_set_fmt()
313 if (cs4234->format == SND_SOC_DAIFMT_DSP_A) { in cs4234_dai_set_fmt()
314 dev_err(component->dev, "Unsupported DSP A format in master mode\n"); in cs4234_dai_set_fmt()
315 return -EINVAL; in cs4234_dai_set_fmt()
320 dev_err(component->dev, "Unsupported master/slave mode\n"); in cs4234_dai_set_fmt()
321 return -EINVAL; in cs4234_dai_set_fmt()
331 dev_err(component->dev, "Unsupported inverted clock setting\n"); in cs4234_dai_set_fmt()
332 return -EINVAL; in cs4234_dai_set_fmt()
335 regmap_update_bits(cs4234->regmap, CS4234_SP_CTRL, in cs4234_dai_set_fmt()
346 struct snd_soc_component *component = dai->component; in cs4234_dai_hw_params()
351 cs4234->lrclk_rate = params_rate(params); in cs4234_dai_hw_params()
352 mclk_mult = cs4234->mclk_rate / cs4234->lrclk_rate; in cs4234_dai_hw_params()
354 if (cs4234->lrclk_rate > 48000) { in cs4234_dai_hw_params()
363 regmap_update_bits(cs4234->regmap, CS4234_CLOCK_SP, in cs4234_dai_hw_params()
366 regmap_update_bits(cs4234->regmap, CS4234_CLOCK_SP, in cs4234_dai_hw_params()
368 ((mclk_mult / 128) - 2) << CS4234_MCLK_RATE_SHIFT); in cs4234_dai_hw_params()
371 dev_err(component->dev, "Unsupported mclk/lrclk rate\n"); in cs4234_dai_hw_params()
372 return -EINVAL; in cs4234_dai_hw_params()
375 switch (cs4234->lrclk_rate) { in cs4234_dai_hw_params()
389 dev_err(component->dev, "Unsupported LR clock\n"); in cs4234_dai_hw_params()
390 return -EINVAL; in cs4234_dai_hw_params()
392 regmap_update_bits(cs4234->regmap, CS4234_CLOCK_SP, CS4234_BASE_RATE_MASK, in cs4234_dai_hw_params()
410 dev_err(component->dev, "Unsupported sample width\n"); in cs4234_dai_hw_params()
411 return -EINVAL; in cs4234_dai_hw_params()
413 if (sub->stream == SNDRV_PCM_STREAM_CAPTURE) in cs4234_dai_hw_params()
414 regmap_update_bits(cs4234->regmap, CS4234_SAMPLE_WIDTH, in cs4234_dai_hw_params()
418 regmap_update_bits(cs4234->regmap, CS4234_SAMPLE_WIDTH, in cs4234_dai_hw_params()
447 struct cs4234 *cs4234 = rule->private; in cs4234_dai_rule_rate()
448 int mclk = cs4234->mclk_rate; in cs4234_dai_rule_rate()
460 return snd_interval_ranges(hw_param_interval(params, rule->var), in cs4234_dai_rule_rate()
466 struct snd_soc_component *comp = dai->component; in cs4234_dai_startup()
470 switch (cs4234->format) { in cs4234_dai_startup()
473 cs4234->rate_constraint.nrats = 2; in cs4234_dai_startup()
476 * Playback only supports 24-bit samples in these modes. in cs4234_dai_startup()
480 if (sub->stream == SNDRV_PCM_STREAM_PLAYBACK) { in cs4234_dai_startup()
482 sub->runtime, in cs4234_dai_startup()
489 ret = snd_pcm_hw_constraint_minmax(sub->runtime, in cs4234_dai_startup()
498 cs4234->rate_constraint.nrats = 1; in cs4234_dai_startup()
501 dev_err(comp->dev, "Startup unsupported DAI format\n"); in cs4234_dai_startup()
502 return -EINVAL; in cs4234_dai_startup()
505 for (i = 0; i < cs4234->rate_constraint.nrats; i++) in cs4234_dai_startup()
506 cs4234->rate_dividers[i].num = cs4234->mclk_rate / CS4234_MCLK_SCALE; in cs4234_dai_startup()
508 ret = snd_pcm_hw_constraint_ratnums(sub->runtime, 0, in cs4234_dai_startup()
510 &cs4234->rate_constraint); in cs4234_dai_startup()
515 * MCLK/rate may be a valid ratio but out-of-spec (e.g. 24576000/64000) in cs4234_dai_startup()
518 return snd_pcm_hw_rule_add(sub->runtime, 0, SNDRV_PCM_HW_PARAM_RATE, in cs4234_dai_startup()
519 cs4234_dai_rule_rate, cs4234, -1); in cs4234_dai_startup()
525 struct snd_soc_component *component = dai->component; in cs4234_dai_set_tdm_slot()
531 dev_err(component->dev, "Unsupported slot width\n"); in cs4234_dai_set_tdm_slot()
532 return -EINVAL; in cs4234_dai_set_tdm_slot()
536 slot_offset = ffs(tx_mask) - 1; in cs4234_dai_set_tdm_slot()
539 dev_err(component->dev, "Unsupported tx slots allocation\n"); in cs4234_dai_set_tdm_slot()
540 return -EINVAL; in cs4234_dai_set_tdm_slot()
543 regmap_update_bits(cs4234->regmap, CS4234_SP_DATA_SEL, CS4234_DAC14_SRC_MASK, in cs4234_dai_set_tdm_slot()
545 regmap_update_bits(cs4234->regmap, CS4234_SP_DATA_SEL, CS4234_LL_SRC_MASK, in cs4234_dai_set_tdm_slot()
553 dac5_masks[dac5_mask_group] ^= BIT(7 - dac5_slot); in cs4234_dai_set_tdm_slot()
554 regmap_bulk_write(cs4234->regmap, in cs4234_dai_set_tdm_slot()
572 .name = "cs4234-dai",
690 cancel_delayed_work_sync(&cs4234->vq_ramp_delay); in cs4234_shutdown()
691 reinit_completion(&cs4234->vq_ramp_complete); in cs4234_shutdown()
693 regmap_update_bits(cs4234->regmap, CS4234_DAC_CTRL4, CS4234_VQ_RAMP_MASK, in cs4234_shutdown()
696 regcache_cache_only(cs4234->regmap, true); in cs4234_shutdown()
698 regmap_update_bits(cs4234->regmap, CS4234_DAC_CTRL4, CS4234_VQ_RAMP_MASK, 0); in cs4234_shutdown()
699 gpiod_set_value_cansleep(cs4234->reset_gpio, 0); in cs4234_shutdown()
700 regulator_bulk_disable(cs4234->num_core_supplies, cs4234->core_supplies); in cs4234_shutdown()
701 clk_disable_unprepare(cs4234->mclk); in cs4234_shutdown()
708 ret = clk_prepare_enable(cs4234->mclk); in cs4234_powerup()
710 dev_err(cs4234->dev, "Failed to enable mclk: %d\n", ret); in cs4234_powerup()
714 ret = regulator_bulk_enable(cs4234->num_core_supplies, cs4234->core_supplies); in cs4234_powerup()
716 dev_err(cs4234->dev, "Failed to enable core supplies: %d\n", ret); in cs4234_powerup()
717 clk_disable_unprepare(cs4234->mclk); in cs4234_powerup()
722 gpiod_set_value_cansleep(cs4234->reset_gpio, 1); in cs4234_powerup()
728 &cs4234->vq_ramp_delay, in cs4234_powerup()
737 struct device *dev = &i2c_client->dev; in cs4234_i2c_probe()
745 return -ENOMEM; in cs4234_i2c_probe()
747 cs4234->dev = dev; in cs4234_i2c_probe()
748 init_completion(&cs4234->vq_ramp_complete); in cs4234_i2c_probe()
749 INIT_DELAYED_WORK(&cs4234->vq_ramp_delay, cs4234_vq_ramp_done); in cs4234_i2c_probe()
751 cs4234->reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_LOW); in cs4234_i2c_probe()
752 if (IS_ERR(cs4234->reset_gpio)) in cs4234_i2c_probe()
753 return PTR_ERR(cs4234->reset_gpio); in cs4234_i2c_probe()
755 BUILD_BUG_ON(ARRAY_SIZE(cs4234->core_supplies) < ARRAY_SIZE(cs4234_core_supplies)); in cs4234_i2c_probe()
757 cs4234->num_core_supplies = ARRAY_SIZE(cs4234_core_supplies); in cs4234_i2c_probe()
759 cs4234->core_supplies[i].supply = cs4234_core_supplies[i]; in cs4234_i2c_probe()
761 ret = devm_regulator_bulk_get(dev, cs4234->num_core_supplies, cs4234->core_supplies); in cs4234_i2c_probe()
767 cs4234->mclk = devm_clk_get(dev, "mclk"); in cs4234_i2c_probe()
768 if (IS_ERR(cs4234->mclk)) { in cs4234_i2c_probe()
769 ret = PTR_ERR(cs4234->mclk); in cs4234_i2c_probe()
773 cs4234->mclk_rate = clk_get_rate(cs4234->mclk); in cs4234_i2c_probe()
775 if (cs4234->mclk_rate < 7680000 || cs4234->mclk_rate > 25600000) { in cs4234_i2c_probe()
777 return -EINVAL; in cs4234_i2c_probe()
780 cs4234->regmap = devm_regmap_init_i2c(i2c_client, &cs4234_regmap); in cs4234_i2c_probe()
781 if (IS_ERR(cs4234->regmap)) { in cs4234_i2c_probe()
782 ret = PTR_ERR(cs4234->regmap); in cs4234_i2c_probe()
791 ret = regmap_bulk_read(cs4234->regmap, CS4234_DEVID_AB, ids, ARRAY_SIZE(ids)); in cs4234_i2c_probe()
800 ret = -EINVAL; in cs4234_i2c_probe()
804 ret = regmap_read(cs4234->regmap, CS4234_REVID, &revid); in cs4234_i2c_probe()
813 ret = regulator_get_voltage(cs4234->core_supplies[CS4234_SUPPLY_VA].consumer); in cs4234_i2c_probe()
816 regmap_update_bits(cs4234->regmap, CS4234_ADC_CTRL1, in cs4234_i2c_probe()
821 regmap_update_bits(cs4234->regmap, CS4234_ADC_CTRL1, in cs4234_i2c_probe()
827 ret = -EINVAL; in cs4234_i2c_probe()
831 pm_runtime_set_active(&i2c_client->dev); in cs4234_i2c_probe()
832 pm_runtime_enable(&i2c_client->dev); in cs4234_i2c_probe()
834 memcpy(&cs4234->rate_dividers, &cs4234_dividers, sizeof(cs4234_dividers)); in cs4234_i2c_probe()
835 cs4234->rate_constraint.rats = cs4234->rate_dividers; in cs4234_i2c_probe()
841 pm_runtime_disable(&i2c_client->dev); in cs4234_i2c_probe()
856 struct device *dev = &i2c_client->dev; in cs4234_i2c_remove()
872 regcache_mark_dirty(cs4234->regmap); in cs4234_runtime_resume()
873 regcache_cache_only(cs4234->regmap, false); in cs4234_runtime_resume()
874 ret = regcache_sync(cs4234->regmap); in cs4234_runtime_resume()
876 dev_err(dev, "Failed to sync regmap: %d\n", ret); in cs4234_runtime_resume()