Lines Matching +full:4 +full:- +full:switch
1 // SPDX-License-Identifier: GPL-2.0-or-later
6 * Author: Lars-Peter Clausen <lars@metafoo.de>
24 #include "adau-utils.h"
123 #define ADAU1373_DAI_INVERT_LRCLK BIT(4)
151 #define ADAU1373_EP_CTRL_MICBIAS1_OFFSET 4
232 { ADAU1373_DIN_MIX_CTRL(4), 0x00 },
237 { ADAU1373_DOUT_MIX_CTRL(4), 0x00 },
323 0, 7, TLV_DB_SCALE_ITEM(-7900, 400, 1),
324 8, 15, TLV_DB_SCALE_ITEM(-4700, 300, 0),
325 16, 23, TLV_DB_SCALE_ITEM(-2300, 200, 0),
326 24, 31, TLV_DB_SCALE_ITEM(-700, 100, 0)
329 static const DECLARE_TLV_DB_MINMAX(adau1373_digital_tlv, -9563, 0);
330 static const DECLARE_TLV_DB_SCALE(adau1373_in_pga_tlv, -1300, 100, 1);
331 static const DECLARE_TLV_DB_SCALE(adau1373_ep_tlv, -600, 600, 1);
342 "Channel 4",
347 ADAU1373_FDSP_SEL1, 4, adau1373_fdsp_sel_text);
355 ADAU1373_FDSP_SEL4, 4, adau1373_fdsp_sel_text);
375 1, 2, 3, 4, 5, 6, 7,
383 0, 2, TLV_DB_SCALE_ITEM(-600, 600, 1),
384 3, 4, TLV_DB_SCALE_ITEM(950, 250, 0),
410 ADAU1373_3D_CTRL1, 4, adau1373_3d_level_text);
416 1, 7, TLV_DB_LINEAR_ITEM(-1800, -120)
427 ADAU1373_OUTPUT_CTRL, 4, adau1373_lr_mux_text);
431 ADAU1373_LS_CTRL, 4, adau1373_lr_mux_text);
471 SOC_DOUBLE_R_TLV("Input 4 Capture Volume", ADAU1373_AINL_CTRL(3),
477 SOC_DOUBLE_TLV("AIF3 Boost Playback Volume", ADAU1373_VOL_GAIN1, 4, 5,
483 SOC_DOUBLE_TLV("AIF3 Boost Capture Volume", ADAU1373_VOL_GAIN2, 4, 5,
491 SOC_DOUBLE_TLV("ADC Boost Capture Volume", ADAU1373_VOL_GAIN3, 4, 5,
498 SOC_DOUBLE_TLV("Input 1 Boost Capture Volume", ADAU1373_ADC_GAIN, 0, 4,
504 SOC_DOUBLE_TLV("Input 4 Boost Capture Volume", ADAU1373_ADC_GAIN, 3, 7,
514 SOC_DOUBLE("HPF Switch", ADAU1373_HPF_CTRL, 1, 0, 1, 0),
520 SOC_DOUBLE("Bass Playback Switch", ADAU1373_BASS2, 0, 1, 1, 0),
527 SOC_SINGLE("3D Playback Switch", ADAU1373_3D_CTRL2, 0, 1, 0),
532 SOC_SINGLE("Zero Cross Switch", ADAU1373_PWDN_CTRL3, 7, 1, 0),
550 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); in adau1373_pll_event()
552 unsigned int pll_id = w->name[3] - '1'; in adau1373_pll_event()
560 regmap_update_bits(adau1373->regmap, ADAU1373_PLL_CTRL6(pll_id), in adau1373_pll_event()
581 SOC_DAPM_SINGLE("DAC1 Switch", ADAU1373_LADC_MIXER, 4, 1, 0),
582 SOC_DAPM_SINGLE("Input 4 Switch", ADAU1373_LADC_MIXER, 3, 1, 0),
583 SOC_DAPM_SINGLE("Input 3 Switch", ADAU1373_LADC_MIXER, 2, 1, 0),
584 SOC_DAPM_SINGLE("Input 2 Switch", ADAU1373_LADC_MIXER, 1, 1, 0),
585 SOC_DAPM_SINGLE("Input 1 Switch", ADAU1373_LADC_MIXER, 0, 1, 0),
589 SOC_DAPM_SINGLE("DAC1 Switch", ADAU1373_RADC_MIXER, 4, 1, 0),
590 SOC_DAPM_SINGLE("Input 4 Switch", ADAU1373_RADC_MIXER, 3, 1, 0),
591 SOC_DAPM_SINGLE("Input 3 Switch", ADAU1373_RADC_MIXER, 2, 1, 0),
592 SOC_DAPM_SINGLE("Input 2 Switch", ADAU1373_RADC_MIXER, 1, 1, 0),
593 SOC_DAPM_SINGLE("Input 1 Switch", ADAU1373_RADC_MIXER, 0, 1, 0),
598 SOC_DAPM_SINGLE("Left DAC2 Switch", _reg, 7, 1, 0), \
599 SOC_DAPM_SINGLE("Right DAC2 Switch", _reg, 6, 1, 0), \
600 SOC_DAPM_SINGLE("Left DAC1 Switch", _reg, 5, 1, 0), \
601 SOC_DAPM_SINGLE("Right DAC1 Switch", _reg, 4, 1, 0), \
602 SOC_DAPM_SINGLE("Input 4 Bypass Switch", _reg, 3, 1, 0), \
603 SOC_DAPM_SINGLE("Input 3 Bypass Switch", _reg, 2, 1, 0), \
604 SOC_DAPM_SINGLE("Input 2 Bypass Switch", _reg, 1, 1, 0), \
605 SOC_DAPM_SINGLE("Input 1 Bypass Switch", _reg, 0, 1, 0), \
624 SOC_DAPM_SINGLE("Left DAC1 Switch", ADAU1373_LHP_MIX, 5, 1, 0),
625 SOC_DAPM_SINGLE("Left DAC2 Switch", ADAU1373_LHP_MIX, 4, 1, 0),
626 SOC_DAPM_SINGLE("Input 4 Bypass Switch", ADAU1373_LHP_MIX, 3, 1, 0),
627 SOC_DAPM_SINGLE("Input 3 Bypass Switch", ADAU1373_LHP_MIX, 2, 1, 0),
628 SOC_DAPM_SINGLE("Input 2 Bypass Switch", ADAU1373_LHP_MIX, 1, 1, 0),
629 SOC_DAPM_SINGLE("Input 1 Bypass Switch", ADAU1373_LHP_MIX, 0, 1, 0),
633 SOC_DAPM_SINGLE("Right DAC1 Switch", ADAU1373_RHP_MIX, 5, 1, 0),
634 SOC_DAPM_SINGLE("Right DAC2 Switch", ADAU1373_RHP_MIX, 4, 1, 0),
635 SOC_DAPM_SINGLE("Input 4 Bypass Switch", ADAU1373_RHP_MIX, 3, 1, 0),
636 SOC_DAPM_SINGLE("Input 3 Bypass Switch", ADAU1373_RHP_MIX, 2, 1, 0),
637 SOC_DAPM_SINGLE("Input 2 Bypass Switch", ADAU1373_RHP_MIX, 1, 1, 0),
638 SOC_DAPM_SINGLE("Input 1 Bypass Switch", ADAU1373_RHP_MIX, 0, 1, 0),
643 SOC_DAPM_SINGLE("DMIC2 Swapped Switch", _reg, 6, 1, 0), \
644 SOC_DAPM_SINGLE("DMIC2 Switch", _reg, 5, 1, 0), \
645 SOC_DAPM_SINGLE("ADC/DMIC1 Swapped Switch", _reg, 4, 1, 0), \
646 SOC_DAPM_SINGLE("ADC/DMIC1 Switch", _reg, 3, 1, 0), \
647 SOC_DAPM_SINGLE("AIF3 Switch", _reg, 2, 1, 0), \
648 SOC_DAPM_SINGLE("AIF2 Switch", _reg, 1, 1, 0), \
649 SOC_DAPM_SINGLE("AIF1 Switch", _reg, 0, 1, 0), \
661 ADAU1373_DIN_MIX_CTRL(4));
665 SOC_DAPM_SINGLE("DSP Channel5 Switch", _reg, 4, 1, 0), \
666 SOC_DAPM_SINGLE("DSP Channel4 Switch", _reg, 3, 1, 0), \
667 SOC_DAPM_SINGLE("DSP Channel3 Switch", _reg, 2, 1, 0), \
668 SOC_DAPM_SINGLE("DSP Channel2 Switch", _reg, 1, 1, 0), \
669 SOC_DAPM_SINGLE("DSP Channel1 Switch", _reg, 0, 1, 0), \
681 ADAU1373_DOUT_MIX_CTRL(4));
696 SND_SOC_DAPM_SUPPLY("MICBIAS1", ADAU1373_PWDN_CTRL1, 4, 0, NULL, 0),
706 SND_SOC_DAPM_DAC("Right DAC1", NULL, ADAU1373_PWDN_CTRL2, 4, 0),
722 SOC_MIXER_ARRAY("Earpiece Mixer", ADAU1373_PWDN_CTRL3, 4, 0,
783 SND_SOC_DAPM_SUPPLY("DSP", ADAU1373_DIGEN, 4, 0, NULL, 0),
822 struct snd_soc_component *component = snd_soc_dapm_to_component(source->dapm); in adau1373_check_aif_clk()
827 dai = sink->name[3] - '1'; in adau1373_check_aif_clk()
829 if (!adau1373->dais[dai].clock_provider) in adau1373_check_aif_clk()
832 if (adau1373->dais[dai].clk_src == ADAU1373_CLK_SRC_PLL1) in adau1373_check_aif_clk()
837 return strcmp(source->name, clk) == 0; in adau1373_check_aif_clk()
843 struct snd_soc_component *component = snd_soc_dapm_to_component(source->dapm); in adau1373_check_src()
847 dai = sink->name[3] - '1'; in adau1373_check_src()
849 return adau1373->dais[dai].enable_src; in adau1373_check_src()
853 { _sink, "DMIC2 Swapped Switch", "DMIC2" }, \
854 { _sink, "DMIC2 Switch", "DMIC2" }, \
855 { _sink, "ADC/DMIC1 Swapped Switch", "Decimator Mux" }, \
856 { _sink, "ADC/DMIC1 Switch", "Decimator Mux" }, \
857 { _sink, "AIF1 Switch", "AIF1 IN" }, \
858 { _sink, "AIF2 Switch", "AIF2 IN" }, \
859 { _sink, "AIF3 Switch", "AIF3 IN" }
862 { _sink, "DSP Channel1 Switch", "DSP Channel1 Mixer" }, \
863 { _sink, "DSP Channel2 Switch", "DSP Channel2 Mixer" }, \
864 { _sink, "DSP Channel3 Switch", "DSP Channel3 Mixer" }, \
865 { _sink, "DSP Channel4 Switch", "DSP Channel4 Mixer" }, \
866 { _sink, "DSP Channel5 Switch", "DSP Channel5 Mixer" }
869 { _sink, "Right DAC2 Switch", "Right DAC2" }, \
870 { _sink, "Left DAC2 Switch", "Left DAC2" }, \
871 { _sink, "Right DAC1 Switch", "Right DAC1" }, \
872 { _sink, "Left DAC1 Switch", "Left DAC1" }, \
873 { _sink, "Input 1 Bypass Switch", "IN1PGA" }, \
874 { _sink, "Input 2 Bypass Switch", "IN2PGA" }, \
875 { _sink, "Input 3 Bypass Switch", "IN3PGA" }, \
876 { _sink, "Input 4 Bypass Switch", "IN4PGA" }
879 { _sink, "Right DAC2 Switch", "Right DAC2" }, \
880 { _sink, "Left DAC2 Switch", "Left DAC2" }, \
881 { _sink, "Right DAC1 Switch", "Right DAC1" }, \
882 { _sink, "Left DAC1 Switch", "Left DAC1" }, \
883 { _sink, "Input 1 Bypass Switch", "IN1PGA" }, \
884 { _sink, "Input 2 Bypass Switch", "IN2PGA" }, \
885 { _sink, "Input 3 Bypass Switch", "IN3PGA" }, \
886 { _sink, "Input 4 Bypass Switch", "IN4PGA" }
889 { "Left ADC Mixer", "DAC1 Switch", "Left DAC1" },
890 { "Left ADC Mixer", "Input 1 Switch", "IN1PGA" },
891 { "Left ADC Mixer", "Input 2 Switch", "IN2PGA" },
892 { "Left ADC Mixer", "Input 3 Switch", "IN3PGA" },
893 { "Left ADC Mixer", "Input 4 Switch", "IN4PGA" },
895 { "Right ADC Mixer", "DAC1 Switch", "Right DAC1" },
896 { "Right ADC Mixer", "Input 1 Switch", "IN1PGA" },
897 { "Right ADC Mixer", "Input 2 Switch", "IN2PGA" },
898 { "Right ADC Mixer", "Input 3 Switch", "IN3PGA" },
899 { "Right ADC Mixer", "Input 4 Switch", "IN4PGA" },
935 { "Left Headphone Mixer", "Left DAC2 Switch", "Left DAC2" },
936 { "Left Headphone Mixer", "Left DAC1 Switch", "Left DAC1" },
937 { "Left Headphone Mixer", "Input 1 Bypass Switch", "IN1PGA" },
938 { "Left Headphone Mixer", "Input 2 Bypass Switch", "IN2PGA" },
939 { "Left Headphone Mixer", "Input 3 Bypass Switch", "IN3PGA" },
940 { "Left Headphone Mixer", "Input 4 Bypass Switch", "IN4PGA" },
941 { "Right Headphone Mixer", "Right DAC2 Switch", "Right DAC2" },
942 { "Right Headphone Mixer", "Right DAC1 Switch", "Right DAC1" },
943 { "Right Headphone Mixer", "Input 1 Bypass Switch", "IN1PGA" },
944 { "Right Headphone Mixer", "Input 2 Bypass Switch", "IN2PGA" },
945 { "Right Headphone Mixer", "Input 3 Bypass Switch", "IN3PGA" },
946 { "Right Headphone Mixer", "Input 4 Bypass Switch", "IN4PGA" },
951 { "Earpiece Mixer", "Right DAC2 Switch", "Right DAC2" },
952 { "Earpiece Mixer", "Left DAC2 Switch", "Left DAC2" },
953 { "Earpiece Mixer", "Right DAC1 Switch", "Right DAC1" },
954 { "Earpiece Mixer", "Left DAC1 Switch", "Left DAC1" },
955 { "Earpiece Mixer", "Input 1 Bypass Switch", "IN1PGA" },
956 { "Earpiece Mixer", "Input 2 Bypass Switch", "IN2PGA" },
957 { "Earpiece Mixer", "Input 3 Bypass Switch", "IN3PGA" },
958 { "Earpiece Mixer", "Input 4 Bypass Switch", "IN4PGA" },
1032 struct snd_soc_component *component = dai->component; in adau1373_hw_params()
1034 struct adau1373_dai *adau1373_dai = &adau1373->dais[dai->id]; in adau1373_hw_params()
1039 freq = adau1373_dai->sysclk; in adau1373_hw_params()
1042 return -EINVAL; in adau1373_hw_params()
1044 switch (freq / params_rate(params)) { in adau1373_hw_params()
1057 case 4096: /* 1/4 sysclk / 256 */ in adau1373_hw_params()
1058 div = 4; in adau1373_hw_params()
1067 return -EINVAL; in adau1373_hw_params()
1070 adau1373_dai->enable_src = (div != 0); in adau1373_hw_params()
1072 regmap_update_bits(adau1373->regmap, ADAU1373_BCLKDIV(dai->id), in adau1373_hw_params()
1076 switch (params_width(params)) { in adau1373_hw_params()
1090 return -EINVAL; in adau1373_hw_params()
1093 return regmap_update_bits(adau1373->regmap, ADAU1373_DAI(dai->id), in adau1373_hw_params()
1099 struct snd_soc_component *component = dai->component; in adau1373_set_dai_fmt()
1101 struct adau1373_dai *adau1373_dai = &adau1373->dais[dai->id]; in adau1373_set_dai_fmt()
1104 switch (fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) { in adau1373_set_dai_fmt()
1107 adau1373_dai->clock_provider = true; in adau1373_set_dai_fmt()
1111 adau1373_dai->clock_provider = false; in adau1373_set_dai_fmt()
1114 return -EINVAL; in adau1373_set_dai_fmt()
1117 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { in adau1373_set_dai_fmt()
1131 return -EINVAL; in adau1373_set_dai_fmt()
1134 switch (fmt & SND_SOC_DAIFMT_INV_MASK) { in adau1373_set_dai_fmt()
1147 return -EINVAL; in adau1373_set_dai_fmt()
1150 regmap_update_bits(adau1373->regmap, ADAU1373_DAI(dai->id), in adau1373_set_dai_fmt()
1159 struct adau1373 *adau1373 = snd_soc_component_get_drvdata(dai->component); in adau1373_set_dai_sysclk()
1160 struct adau1373_dai *adau1373_dai = &adau1373->dais[dai->id]; in adau1373_set_dai_sysclk()
1162 switch (clk_id) { in adau1373_set_dai_sysclk()
1167 return -EINVAL; in adau1373_set_dai_sysclk()
1170 adau1373_dai->sysclk = freq; in adau1373_set_dai_sysclk()
1171 adau1373_dai->clk_src = clk_id; in adau1373_set_dai_sysclk()
1173 regmap_update_bits(adau1373->regmap, ADAU1373_BCLKDIV(dai->id), in adau1373_set_dai_sysclk()
1191 .name = "adau1373-aif1",
1211 .name = "adau1373-aif2",
1231 .name = "adau1373-aif3",
1259 switch (pll_id) { in adau1373_set_pll()
1264 return -EINVAL; in adau1373_set_pll()
1267 switch (source) { in adau1373_set_pll()
1282 return -EINVAL; in adau1373_set_pll()
1286 return -EINVAL; in adau1373_set_pll()
1289 return -EINVAL; in adau1373_set_pll()
1300 return -EINVAL; in adau1373_set_pll()
1303 dpll_div = 11 - dpll_div; in adau1373_set_pll()
1304 regmap_update_bits(adau1373->regmap, ADAU1373_PLL_CTRL6(pll_id), in adau1373_set_pll()
1307 regmap_update_bits(adau1373->regmap, ADAU1373_PLL_CTRL6(pll_id), in adau1373_set_pll()
1312 regmap_write(adau1373->regmap, ADAU1373_DPLL_CTRL(pll_id), in adau1373_set_pll()
1313 (source << 4) | dpll_div); in adau1373_set_pll()
1314 regmap_write(adau1373->regmap, ADAU1373_PLL_CTRL1(pll_id), pll_regs[0]); in adau1373_set_pll()
1315 regmap_write(adau1373->regmap, ADAU1373_PLL_CTRL2(pll_id), pll_regs[1]); in adau1373_set_pll()
1316 regmap_write(adau1373->regmap, ADAU1373_PLL_CTRL3(pll_id), pll_regs[2]); in adau1373_set_pll()
1317 regmap_write(adau1373->regmap, ADAU1373_PLL_CTRL4(pll_id), pll_regs[3]); in adau1373_set_pll()
1318 regmap_write(adau1373->regmap, ADAU1373_PLL_CTRL5(pll_id), pll_regs[4]); in adau1373_set_pll()
1320 /* Set sysclk to pll_rate / 4 */ in adau1373_set_pll()
1321 regmap_update_bits(adau1373->regmap, ADAU1373_CLK_SRC_DIV(pll_id), 0x3f, 0x09); in adau1373_set_pll()
1332 regmap_write(adau1373->regmap, ADAU1373_DRC(nr) + i, drc[i]); in adau1373_load_drc_settings()
1337 switch (micbias) { in adau1373_valid_micbias()
1352 struct adau1373_platform_data *pdata = component->dev->platform_data; in adau1373_probe()
1358 if (pdata->num_drc > ARRAY_SIZE(pdata->drc_setting)) in adau1373_probe()
1359 return -EINVAL; in adau1373_probe()
1361 if (!adau1373_valid_micbias(pdata->micbias1) || in adau1373_probe()
1362 !adau1373_valid_micbias(pdata->micbias2)) in adau1373_probe()
1363 return -EINVAL; in adau1373_probe()
1365 for (i = 0; i < pdata->num_drc; ++i) { in adau1373_probe()
1367 pdata->drc_setting[i]); in adau1373_probe()
1371 pdata->num_drc); in adau1373_probe()
1374 for (i = 0; i < 4; ++i) { in adau1373_probe()
1375 if (pdata->input_differential[i]) in adau1373_probe()
1378 regmap_write(adau1373->regmap, ADAU1373_INPUT_MODE, val); in adau1373_probe()
1381 if (pdata->lineout_differential) in adau1373_probe()
1383 if (pdata->lineout_ground_sense) in adau1373_probe()
1385 regmap_write(adau1373->regmap, ADAU1373_OUTPUT_CTRL, val); in adau1373_probe()
1387 lineout_differential = pdata->lineout_differential; in adau1373_probe()
1389 regmap_write(adau1373->regmap, ADAU1373_EP_CTRL, in adau1373_probe()
1390 (pdata->micbias1 << ADAU1373_EP_CTRL_MICBIAS1_OFFSET) | in adau1373_probe()
1391 (pdata->micbias2 << ADAU1373_EP_CTRL_MICBIAS2_OFFSET)); in adau1373_probe()
1399 regmap_write(adau1373->regmap, ADAU1373_ADC_CTRL, in adau1373_probe()
1410 switch (level) { in adau1373_set_bias_level()
1416 regmap_update_bits(adau1373->regmap, ADAU1373_PWDN_CTRL3, in adau1373_set_bias_level()
1420 regmap_update_bits(adau1373->regmap, ADAU1373_PWDN_CTRL3, in adau1373_set_bias_level()
1431 regcache_sync(adau1373->regmap); in adau1373_resume()
1438 switch (reg) { in adau1373_register_volatile()
1479 adau1373 = devm_kzalloc(&client->dev, sizeof(*adau1373), GFP_KERNEL); in adau1373_i2c_probe()
1481 return -ENOMEM; in adau1373_i2c_probe()
1483 adau1373->regmap = devm_regmap_init_i2c(client, in adau1373_i2c_probe()
1485 if (IS_ERR(adau1373->regmap)) in adau1373_i2c_probe()
1486 return PTR_ERR(adau1373->regmap); in adau1373_i2c_probe()
1488 regmap_write(adau1373->regmap, ADAU1373_SOFT_RESET, 0x00); in adau1373_i2c_probe()
1490 dev_set_drvdata(&client->dev, adau1373); in adau1373_i2c_probe()
1492 ret = devm_snd_soc_register_component(&client->dev, in adau1373_i2c_probe()
1515 MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");