Lines Matching refs:BA0_MIDCR
270 #define BA0_MIDCR 0x0490 /* MIDI Control */ macro
1576 snd_cs4281_pokeBA0(chip, BA0_MIDCR, chip->midcr | BA0_MIDCR_MRST); in snd_cs4281_midi_reset()
1578 snd_cs4281_pokeBA0(chip, BA0_MIDCR, chip->midcr); in snd_cs4281_midi_reset()
1591 snd_cs4281_pokeBA0(chip, BA0_MIDCR, chip->midcr); in snd_cs4281_midi_input_open()
1607 snd_cs4281_pokeBA0(chip, BA0_MIDCR, chip->midcr); in snd_cs4281_midi_input_close()
1625 snd_cs4281_pokeBA0(chip, BA0_MIDCR, chip->midcr); in snd_cs4281_midi_output_open()
1641 snd_cs4281_pokeBA0(chip, BA0_MIDCR, chip->midcr); in snd_cs4281_midi_output_close()
1657 snd_cs4281_pokeBA0(chip, BA0_MIDCR, chip->midcr); in snd_cs4281_midi_input_trigger()
1662 snd_cs4281_pokeBA0(chip, BA0_MIDCR, chip->midcr); in snd_cs4281_midi_input_trigger()
1687 snd_cs4281_pokeBA0(chip, BA0_MIDCR, chip->midcr); in snd_cs4281_midi_output_trigger()
1692 snd_cs4281_pokeBA0(chip, BA0_MIDCR, chip->midcr); in snd_cs4281_midi_output_trigger()
1789 snd_cs4281_pokeBA0(chip, BA0_MIDCR, chip->midcr); in snd_cs4281_interrupt()
1906 BA0_MIDCR,