1 // SPDX-License-Identifier: GPL-2.0-or-later
4  *                   Hannu Savolainen 1993-1996,
22 MODULE_AUTHOR("Jaroslav Kysela <perex@perex.cz>, Hannu Savolainen 1993-1996, Rob Hooft");
32 	 * The original 2-OP synth requires a quite long delay  in snd_opl2_command()
36 	port = (cmd & OPL3_RIGHT) ? opl3->r_port : opl3->l_port;  in snd_opl2_command()
38 	spin_lock_irqsave(&opl3->reg_lock, flags);  in snd_opl2_command()
46 	spin_unlock_irqrestore(&opl3->reg_lock, flags);  in snd_opl2_command()
55 	 * The OPL-3 survives with just two INBs  in snd_opl3_command()
59 	port = (cmd & OPL3_RIGHT) ? opl3->r_port : opl3->l_port;  in snd_opl3_command()
61 	spin_lock_irqsave(&opl3->reg_lock, flags);  in snd_opl3_command()
64 	inb(opl3->l_port);  in snd_opl3_command()
65 	inb(opl3->l_port);  in snd_opl3_command()
68 	inb(opl3->l_port);  in snd_opl3_command()
69 	inb(opl3->l_port);  in snd_opl3_command()
71 	spin_unlock_irqrestore(&opl3->reg_lock, flags);  in snd_opl3_command()
90 	opl3->command(opl3, OPL3_LEFT | OPL3_REG_TIMER_CONTROL, OPL3_TIMER1_MASK | OPL3_TIMER2_MASK);  in snd_opl3_detect()
92 	opl3->command(opl3, OPL3_LEFT | OPL3_REG_TIMER_CONTROL, OPL3_IRQ_RESET);  in snd_opl3_detect()
93 	signature = stat1 = inb(opl3->l_port);	/* Status register */  in snd_opl3_detect()
96 		return -ENODEV;  in snd_opl3_detect()
99 	opl3->command(opl3, OPL3_LEFT | OPL3_REG_TIMER1, 0xff);  in snd_opl3_detect()
101 	opl3->command(opl3, OPL3_LEFT | OPL3_REG_TIMER_CONTROL, OPL3_TIMER2_MASK | OPL3_TIMER1_START);  in snd_opl3_detect()
102 	/* Now we have to delay at least 80us */  in snd_opl3_detect()
105 	stat2 = inb(opl3->l_port);  in snd_opl3_detect()
107 	opl3->command(opl3, OPL3_LEFT | OPL3_REG_TIMER_CONTROL, OPL3_TIMER1_MASK | OPL3_TIMER2_MASK);  in snd_opl3_detect()
109 	opl3->command(opl3, OPL3_LEFT | OPL3_REG_TIMER_CONTROL, OPL3_IRQ_RESET);  in snd_opl3_detect()
112 		return -ENODEV;  in snd_opl3_detect()
116 	   to detect it. */  in snd_opl3_detect()
117 	if (opl3->hardware != OPL3_HW_AUTO)  in snd_opl3_detect()
120 	/* There is a FM chip on this address. Detect the type (OPL2 to OPL4) */  in snd_opl3_detect()
122 		opl3->hardware = OPL3_HW_OPL2;  in snd_opl3_detect()
125 		 * If we had an OPL4 chip, opl3->hardware would have been set  in snd_opl3_detect()
128 		if (snd_BUG_ON(!opl3->r_port))  in snd_opl3_detect()
129 			return -ENODEV;  in snd_opl3_detect()
130 		opl3->hardware = OPL3_HW_OPL3;  in snd_opl3_detect()
140  *  Timer 1 - 80us
151 	spin_lock_irqsave(&opl3->timer_lock, flags);  in snd_opl3_timer1_start()
152 	ticks = timer->sticks;  in snd_opl3_timer1_start()
153 	tmp = (opl3->timer_enable | OPL3_TIMER1_START) & ~OPL3_TIMER1_MASK;  in snd_opl3_timer1_start()
154 	opl3->timer_enable = tmp;  in snd_opl3_timer1_start()
155 	opl3->command(opl3, OPL3_LEFT | OPL3_REG_TIMER1, 256 - ticks);	/* timer 1 count */  in snd_opl3_timer1_start()
156 	opl3->command(opl3, OPL3_LEFT | OPL3_REG_TIMER_CONTROL, tmp);	/* enable timer 1 IRQ */  in snd_opl3_timer1_start()
157 	spin_unlock_irqrestore(&opl3->timer_lock, flags);  in snd_opl3_timer1_start()
168 	spin_lock_irqsave(&opl3->timer_lock, flags);  in snd_opl3_timer1_stop()
169 	tmp = (opl3->timer_enable | OPL3_TIMER1_MASK) & ~OPL3_TIMER1_START;  in snd_opl3_timer1_stop()
170 	opl3->timer_enable = tmp;  in snd_opl3_timer1_stop()
171 	opl3->command(opl3, OPL3_LEFT | OPL3_REG_TIMER_CONTROL, tmp);	/* disable timer #1 */  in snd_opl3_timer1_stop()
172 	spin_unlock_irqrestore(&opl3->timer_lock, flags);  in snd_opl3_timer1_stop()
177  *  Timer 2 - 320us
188 	spin_lock_irqsave(&opl3->timer_lock, flags);  in snd_opl3_timer2_start()
189 	ticks = timer->sticks;  in snd_opl3_timer2_start()
190 	tmp = (opl3->timer_enable | OPL3_TIMER2_START) & ~OPL3_TIMER2_MASK;  in snd_opl3_timer2_start()
191 	opl3->timer_enable = tmp;  in snd_opl3_timer2_start()
192 	opl3->command(opl3, OPL3_LEFT | OPL3_REG_TIMER2, 256 - ticks);	/* timer 1 count */  in snd_opl3_timer2_start()
193 	opl3->command(opl3, OPL3_LEFT | OPL3_REG_TIMER_CONTROL, tmp);	/* enable timer 1 IRQ */  in snd_opl3_timer2_start()
194 	spin_unlock_irqrestore(&opl3->timer_lock, flags);  in snd_opl3_timer2_start()
205 	spin_lock_irqsave(&opl3->timer_lock, flags);  in snd_opl3_timer2_stop()
206 	tmp = (opl3->timer_enable | OPL3_TIMER2_MASK) & ~OPL3_TIMER2_START;  in snd_opl3_timer2_stop()
207 	opl3->timer_enable = tmp;  in snd_opl3_timer2_stop()
208 	opl3->command(opl3, OPL3_LEFT | OPL3_REG_TIMER_CONTROL, tmp);	/* disable timer #1 */  in snd_opl3_timer2_stop()
209 	spin_unlock_irqrestore(&opl3->timer_lock, flags);  in snd_opl3_timer2_stop()
243 	tid.card = opl3->card->number;  in snd_opl3_timer1_init()
246 	err = snd_timer_new(opl3->card, "AdLib timer #1", &tid, &timer);  in snd_opl3_timer1_init()
248 		strcpy(timer->name, "AdLib timer #1");  in snd_opl3_timer1_init()
249 		timer->private_data = opl3;  in snd_opl3_timer1_init()
250 		timer->hw = snd_opl3_timer1;  in snd_opl3_timer1_init()
252 	opl3->timer1 = timer;  in snd_opl3_timer1_init()
264 	tid.card = opl3->card->number;  in snd_opl3_timer2_init()
267 	err = snd_timer_new(opl3->card, "AdLib timer #2", &tid, &timer);  in snd_opl3_timer2_init()
269 		strcpy(timer->name, "AdLib timer #2");  in snd_opl3_timer2_init()
270 		timer->private_data = opl3;  in snd_opl3_timer2_init()
271 		timer->hw = snd_opl3_timer2;  in snd_opl3_timer2_init()
273 	opl3->timer2 = timer;  in snd_opl3_timer2_init()
290 	opl3 = hw->private_data;  in snd_opl3_interrupt()
291 	status = inb(opl3->l_port);  in snd_opl3_interrupt()
299 		timer = opl3->timer1;  in snd_opl3_interrupt()
300 		snd_timer_interrupt(timer, timer->sticks);  in snd_opl3_interrupt()
303 		timer = opl3->timer2;  in snd_opl3_interrupt()
304 		snd_timer_interrupt(timer, timer->sticks);  in snd_opl3_interrupt()
317 		return -ENXIO;  in snd_opl3_free()
318 	if (opl3->private_free)  in snd_opl3_free()
319 		opl3->private_free(opl3);  in snd_opl3_free()
321 	release_and_free_resource(opl3->res_l_port);  in snd_opl3_free()
322 	release_and_free_resource(opl3->res_r_port);  in snd_opl3_free()
329 	struct snd_opl3 *opl3 = device->device_data;  in snd_opl3_dev_free()
346 		return -ENOMEM;  in snd_opl3_new()
348 	opl3->card = card;  in snd_opl3_new()
349 	opl3->hardware = hardware;  in snd_opl3_new()
350 	spin_lock_init(&opl3->reg_lock);  in snd_opl3_new()
351 	spin_lock_init(&opl3->timer_lock);  in snd_opl3_new()
367 	if (! opl3->command) {  in snd_opl3_init()
369 		return -EINVAL;  in snd_opl3_init()
372 	opl3->command(opl3, OPL3_LEFT | OPL3_REG_TEST, OPL3_ENABLE_WAVE_SELECT);  in snd_opl3_init()
374 	opl3->command(opl3, OPL3_LEFT | OPL3_REG_PERCUSSION, 0x00);  in snd_opl3_init()
376 	switch (opl3->hardware & OPL3_HW_MASK) {  in snd_opl3_init()
378 		opl3->max_voices = MAX_OPL2_VOICES;  in snd_opl3_init()
382 		opl3->max_voices = MAX_OPL3_VOICES;  in snd_opl3_init()
384 		opl3->command(opl3, OPL3_RIGHT | OPL3_REG_MODE, OPL3_OPL3_ENABLE);  in snd_opl3_init()
406 		opl3->res_l_port = request_region(l_port, 2, "OPL2/3 (left)");  in snd_opl3_create()
407 		if (!opl3->res_l_port) {  in snd_opl3_create()
410 			return -EBUSY;  in snd_opl3_create()
413 			opl3->res_r_port = request_region(r_port, 2, "OPL2/3 (right)");  in snd_opl3_create()
414 			if (!opl3->res_r_port) {  in snd_opl3_create()
417 				return -EBUSY;  in snd_opl3_create()
421 	opl3->l_port = l_port;  in snd_opl3_create()
422 	opl3->r_port = r_port;  in snd_opl3_create()
424 	switch (opl3->hardware) {  in snd_opl3_create()
429 		opl3->command = &snd_opl3_command;  in snd_opl3_create()
432 		opl3->command = &snd_opl2_command;  in snd_opl3_create()
436 				   opl3->l_port, opl3->r_port);  in snd_opl3_create()
440 		/* detect routine returns correct hardware type */  in snd_opl3_create()
441 		switch (opl3->hardware & OPL3_HW_MASK) {  in snd_opl3_create()
444 			opl3->command = &snd_opl3_command;  in snd_opl3_create()
468 			snd_device_free(opl3->card, opl3->timer1);  in snd_opl3_timer_new()
469 			opl3->timer1 = NULL;  in snd_opl3_timer_new()
483 	struct snd_card *card = opl3->card;  in snd_opl3_hwdep_new()
496 	hw->private_data = opl3;  in snd_opl3_hwdep_new()
497 	hw->exclusive = 1;  in snd_opl3_hwdep_new()
500 		hw->oss_type = SNDRV_OSS_DEVICE_TYPE_DMFM;  in snd_opl3_hwdep_new()
502 	strcpy(hw->name, hw->id);  in snd_opl3_hwdep_new()
503 	switch (opl3->hardware & OPL3_HW_MASK) {  in snd_opl3_hwdep_new()
505 		strcpy(hw->name, "OPL2 FM");  in snd_opl3_hwdep_new()
506 		hw->iface = SNDRV_HWDEP_IFACE_OPL2;  in snd_opl3_hwdep_new()
509 		strcpy(hw->name, "OPL3 FM");  in snd_opl3_hwdep_new()
510 		hw->iface = SNDRV_HWDEP_IFACE_OPL3;  in snd_opl3_hwdep_new()
513 		strcpy(hw->name, "OPL4 FM");  in snd_opl3_hwdep_new()
514 		hw->iface = SNDRV_HWDEP_IFACE_OPL4;  in snd_opl3_hwdep_new()
518 	/* operators - only ioctl */  in snd_opl3_hwdep_new()
519 	hw->ops.open = snd_opl3_open;  in snd_opl3_hwdep_new()
520 	hw->ops.ioctl = snd_opl3_ioctl;  in snd_opl3_hwdep_new()
521 	hw->ops.write = snd_opl3_write;  in snd_opl3_hwdep_new()
522 	hw->ops.release = snd_opl3_release;  in snd_opl3_hwdep_new()
524 	opl3->hwdep = hw;  in snd_opl3_hwdep_new()
525 	opl3->seq_dev_num = seq_device;  in snd_opl3_hwdep_new()
528 			       sizeof(struct snd_opl3 *), &opl3->seq_dev) >= 0) {  in snd_opl3_hwdep_new()
529 		strcpy(opl3->seq_dev->name, hw->name);  in snd_opl3_hwdep_new()
530 		*(struct snd_opl3 **)SNDRV_SEQ_DEVICE_ARGPTR(opl3->seq_dev) = opl3;  in snd_opl3_hwdep_new()