Lines Matching +full:spi +full:- +full:slave
1 /* SPDX-License-Identifier: GPL-2.0-or-later
21 #include <uapi/linux/spi/spi.h>
33 * INTERFACES between SPI master-side drivers and SPI slave protocol handlers,
34 * and SPI infrastructure.
39 * struct spi_statistics - statistics for spi transfers
40 * @syncp: seqcount to protect members in this struct for per-cpu update
41 * on 32-bit systems
43 * @messages: number of spi-messages handled
92 u64_stats_update_begin(&__lstats->syncp); \
93 u64_stats_add(&__lstats->field, count); \
94 u64_stats_update_end(&__lstats->syncp); \
103 u64_stats_update_begin(&__lstats->syncp); \
104 u64_stats_inc(&__lstats->field); \
105 u64_stats_update_end(&__lstats->syncp); \
110 * struct spi_delay - SPI delay information
128 * struct spi_device - Controller side proxy for an SPI slave device
130 * @controller: SPI controller used with the device.
136 * @mode: The spi mode defines how data is clocked out and in.
142 * like eight or 12 bits are common. In-memory wordsizes are
151 * @controller_data: Board-specific definitions for controller, such as
171 * A @spi_device is used to interchange data between an SPI slave
191 * TPM specification defines flow control over SPI. Client device
195 * only half-duplex, the wait state detection needs to be implemented
197 * control is expected from SPI controller.
203 * which is defined in 'include/uapi/linux/spi/spi.h'.
209 #define SPI_MODE_KERNEL_MASK (~(BIT(29) - 1))
217 struct spi_delay word_delay; /* Inter-word delay */
229 * - memory packing (12 bit samples into low bits, others zeroed)
230 * - priority
231 * - chipselect delays
232 * - ...
246 static inline struct spi_device *spi_dev_get(struct spi_device *spi) in spi_dev_get() argument
248 return (spi && get_device(&spi->dev)) ? spi : NULL; in spi_dev_get()
251 static inline void spi_dev_put(struct spi_device *spi) in spi_dev_put() argument
253 if (spi) in spi_dev_put()
254 put_device(&spi->dev); in spi_dev_put()
258 static inline void *spi_get_ctldata(const struct spi_device *spi) in spi_get_ctldata() argument
260 return spi->controller_state; in spi_get_ctldata()
263 static inline void spi_set_ctldata(struct spi_device *spi, void *state) in spi_set_ctldata() argument
265 spi->controller_state = state; in spi_set_ctldata()
270 static inline void spi_set_drvdata(struct spi_device *spi, void *data) in spi_set_drvdata() argument
272 dev_set_drvdata(&spi->dev, data); in spi_set_drvdata()
275 static inline void *spi_get_drvdata(const struct spi_device *spi) in spi_get_drvdata() argument
277 return dev_get_drvdata(&spi->dev); in spi_get_drvdata()
280 static inline u8 spi_get_chipselect(const struct spi_device *spi, u8 idx) in spi_get_chipselect() argument
282 return spi->chip_select; in spi_get_chipselect()
285 static inline void spi_set_chipselect(struct spi_device *spi, u8 idx, u8 chipselect) in spi_set_chipselect() argument
287 spi->chip_select = chipselect; in spi_set_chipselect()
290 static inline struct gpio_desc *spi_get_csgpiod(const struct spi_device *spi, u8 idx) in spi_get_csgpiod() argument
292 return spi->cs_gpiod; in spi_get_csgpiod()
295 static inline void spi_set_csgpiod(struct spi_device *spi, u8 idx, struct gpio_desc *csgpiod) in spi_set_csgpiod() argument
297 spi->cs_gpiod = csgpiod; in spi_set_csgpiod()
301 * struct spi_driver - Host side "protocol" driver
302 * @id_table: List of SPI devices supported by this driver
303 * @probe: Binds this driver to the SPI device. Drivers can verify
307 * @remove: Unbinds this driver from the SPI device
310 * @driver: SPI device drivers should initialize the name and owner
313 * This represents the kind of device driver that uses SPI messages to
314 * interact with the hardware at the other end of a SPI link. It's called
316 * directly to SPI hardware (which is what the underlying SPI controller
327 int (*probe)(struct spi_device *spi);
328 void (*remove)(struct spi_device *spi);
329 void (*shutdown)(struct spi_device *spi);
341 * spi_unregister_driver - reverse effect of spi_register_driver
348 driver_unregister(&sdrv->driver); in spi_unregister_driver()
351 extern struct spi_device *spi_new_ancillary_device(struct spi_device *spi, u8 chip_select);
358 * module_spi_driver() - Helper macro for registering a SPI driver
361 * Helper macro for SPI drivers which do not do anything special in module
370 * struct spi_controller - interface to SPI master or slave controller
373 * @bus_num: board-specific (and often SOC-specific) identifier for a
374 * given SPI controller.
376 * SPI slaves, and are numbered from zero to num_chipselects.
377 * each slave has a chipselect signal, but it's common that not
378 * every chipselect is connected to a slave.
379 * @dma_alignment: SPI controller constraint on DMA buffers alignment.
384 * supported. If set, the SPI core will reject any transfer with an
390 * @slave: indicates that this is an SPI slave controller
391 * @target: indicates that this is an SPI target controller
392 * @devm_allocated: whether the allocation of this struct is devres-managed
399 * @bus_lock_spinlock: spinlock for SPI bus locking
401 * @bus_lock_flag: indicates that the SPI bus is locked for exclusive use
403 * device's SPI controller; protocol code may call this. This
407 * @set_cs_timing: optional hook for SPI devices to request SPI master
411 * @cleanup: frees controller-specific state
421 * @cur_msg: the currently in-flight message
422 * @cur_msg_completion: a completion for the current in-flight message
430 * @last_cs: the last chip_select that is recorded by set_cs, -1 on non chip
460 * - return 0 if the transfer is finished,
461 * - return 1 if the transfer is still in progress. When
470 * @mem_ops: optimized/dedicated operations for interactions with SPI memory.
475 * @slave_abort: abort the ongoing transfer request on an SPI slave controller
476 * @target_abort: abort the ongoing transfer request on an SPI target controller
479 * are not GPIOs (driven by the SPI controller itself).
480 * @use_gpio_descriptors: Turns on the code in the SPI core to parse and grab
481 * GPIO descriptors. This will fill in @cs_gpiods and SPI devices will have
484 * fill in this field with the first unused native CS, to be used by SPI
492 * @dummy_rx: dummy receive buffer for full-duplex devices
493 * @dummy_tx: dummy transmit buffer for full-duplex devices
498 * time snapshot in @spi_transfer->ptp_sts as close as possible to the
499 * moment in time when @spi_transfer->ptp_sts_word_pre and
500 * @spi_transfer->ptp_sts_word_post were transmitted.
501 * If the driver does not set this, the SPI core takes the snapshot as
502 * close to the driver hand-over as possible.
510 * Each SPI controller can communicate with one or more @spi_device
516 * The driver for an SPI controller manages access to those devices through
518 * an SPI slave device. For each such message it queues, it calls the
528 * board-specific. Usually that simplifies to being SoC-specific.
529 * example: one SoC has three SPI controllers, numbered 0..2,
530 * and one board's schematics might show it using SPI-2. Software
537 * might use board-specific GPIOs.
541 /* Some SPI controllers pose alignment requirements on DMAable
554 #define SPI_BPW_MASK(bits) BIT((bits) - 1)
555 #define SPI_BPW_RANGE_MASK(min, max) GENMASK((max) - 1, (min) - 1)
568 #define SPI_CONTROLLER_GPIO_SS BIT(5) /* GPIO CS must select slave */
570 /* Flag indicating if the allocation of this struct is devres-managed */
574 /* Flag indicating this is an SPI slave controller */
575 bool slave; member
576 /* Flag indicating this is an SPI target controller */
584 size_t (*max_transfer_size)(struct spi_device *spi);
585 size_t (*max_message_size)(struct spi_device *spi);
593 /* Lock and mutex for SPI bus locking */
597 /* Flag indicating that the SPI bus is locked for exclusive use */
601 * Setup mode and clock, etc (SPI driver may call many times).
607 int (*setup)(struct spi_device *spi);
610 * set_cs_timing() method is for SPI controllers that supports
613 * This hook allows SPI client drivers to request SPI controllers
617 int (*set_cs_timing)(struct spi_device *spi);
624 * + For now there's no remove-from-queue operation, or
636 * + The message transfers use clock and SPI mode parameters
639 int (*transfer)(struct spi_device *spi,
643 void (*cleanup)(struct spi_device *spi);
653 struct spi_device *spi,
663 * Over time we expect SPI drivers to be phased over to this API.
702 void (*set_cs)(struct spi_device *spi, bool enable);
703 int (*transfer_one)(struct spi_controller *ctlr, struct spi_device *spi,
708 /* Optimized handlers for SPI memory-like operations. */
732 * Driver sets this field to indicate it is able to snapshot SPI
747 return dev_get_drvdata(&ctlr->dev); in spi_controller_get_devdata()
753 dev_set_drvdata(&ctlr->dev, data); in spi_controller_set_devdata()
758 if (!ctlr || !get_device(&ctlr->dev)) in spi_controller_get()
766 put_device(&ctlr->dev); in spi_controller_put()
771 return IS_ENABLED(CONFIG_SPI_SLAVE) && ctlr->slave; in spi_controller_is_slave()
776 return IS_ENABLED(CONFIG_SPI_SLAVE) && ctlr->target; in spi_controller_is_target()
796 /* The SPI driver core manages memory for the spi_controller classdev */
798 unsigned int size, bool slave);
832 bool slave);
877 * SPI resource management while processing a SPI message
885 * struct spi_res - SPI resource management structure
888 * @data: extra data allocated for the specific use-case
890 * This is based on ideas from devres, but focused on life-cycle
899 /*---------------------------------------------------------------------------*/
902 * I/O INTERFACE between SPI controller and protocol drivers
910 * pointer. (This is unlike most types of I/O API, because SPI hardware
919 * struct spi_transfer - a read/write buffer pair
920 * @tx_buf: data to be written (DMA-safe memory), or NULL
921 * @rx_buf: data to be read (DMA-safe memory), or NULL
943 * @effective_speed_hz: the effective SCK-speed that was used to
944 * transfer this transfer. Set to 0 if the SPI bus driver does
950 * within @tx_buf for which the SPI device is requesting that the time
951 * snapshot for this transfer begins. Upon completing the SPI transfer,
960 * purposefully (instead of setting to spi_transfer->len - 1) to denote
961 * that a transfer-level snapshot taken from within the driver may still
963 * @ptp_sts: Pointer to a memory location held by the SPI slave device where a
968 * The timestamp must represent the time at which the SPI slave device has
973 * @error: Error status logged by SPI controller driver.
975 * SPI transfers always write the same number of bytes as they read.
988 * In-memory data values are always in native CPU byte order, translated
989 * from the wire byte order (big-endian except with SPI_LSB_FIRST). So
993 * When the word size of the SPI transfer is not a power-of-two multiple
994 * of eight bits, those in-memory words include extra bits. In-memory
995 * words are always seen by protocol drivers as right-justified, so the
998 * All SPI transfers start with the relevant chipselect active. Normally
1009 * stay selected until the next transfer. On multi-device SPI busses
1018 * When SPI can transfer in 1x,2x or 4x. It can get this transfer information
1019 * from device through @tx_nbits and @rx_nbits. In Bi-direction, these
1025 * Zero-initialize every field you don't set up explicitly, to
1034 * spi_message.is_dma_mapped reports a pre-existing mapping.
1054 #define SPI_NBITS_SINGLE 0x01 /* 1-bit transfer */
1055 #define SPI_NBITS_DUAL 0x02 /* 2-bit transfer */
1056 #define SPI_NBITS_QUAD 0x04 /* 4-bit transfer */
1074 * struct spi_message - one multi-segment SPI transaction
1076 * @spi: SPI device to which the transaction is queued
1087 * @resources: for resource management when the SPI message is processed
1094 * in the sense that no other spi_message may use that SPI bus until that
1102 * Zero-initialize every field you don't set up explicitly, to
1109 struct spi_device *spi; member
1122 * Some controller drivers (message-at-a-time queue processing)
1124 * others (with multi-message pipelines) could need a flag to
1143 /* List of spi_res resources when the SPI message is processed */
1152 INIT_LIST_HEAD(&m->transfers); in spi_message_init_no_memset()
1153 INIT_LIST_HEAD(&m->resources); in spi_message_init_no_memset()
1165 list_add_tail(&t->transfer_list, &m->transfers); in spi_message_add_tail()
1171 list_del(&t->transfer_list); in spi_transfer_del()
1177 return spi_delay_exec(&t->delay, t); in spi_transfer_delay_exec()
1181 * spi_message_init_with_transfers - Initialize spi_message and append transfers
1183 * @xfers: An array of SPI transfers
1214 spi_message_add_tail(&m->t[i], m); in spi_message_alloc()
1224 extern int spi_setup(struct spi_device *spi);
1225 extern int spi_async(struct spi_device *spi, struct spi_message *message);
1226 extern int spi_slave_abort(struct spi_device *spi);
1227 extern int spi_target_abort(struct spi_device *spi);
1230 spi_max_message_size(struct spi_device *spi) in spi_max_message_size() argument
1232 struct spi_controller *ctlr = spi->controller; in spi_max_message_size()
1234 if (!ctlr->max_message_size) in spi_max_message_size()
1236 return ctlr->max_message_size(spi); in spi_max_message_size()
1240 spi_max_transfer_size(struct spi_device *spi) in spi_max_transfer_size() argument
1242 struct spi_controller *ctlr = spi->controller; in spi_max_transfer_size()
1244 size_t msg_max = spi_max_message_size(spi); in spi_max_transfer_size()
1246 if (ctlr->max_transfer_size) in spi_max_transfer_size()
1247 tr_max = ctlr->max_transfer_size(spi); in spi_max_transfer_size()
1254 * spi_is_bpw_supported - Check if bits per word is supported
1255 * @spi: SPI device
1258 * This function checks to see if the SPI controller supports @bpw.
1263 static inline bool spi_is_bpw_supported(struct spi_device *spi, u32 bpw) in spi_is_bpw_supported() argument
1265 u32 bpw_mask = spi->master->bits_per_word_mask; in spi_is_bpw_supported()
1274 * spi_controller_xfer_timeout - Compute a suitable timeout value
1275 * @ctlr: SPI device
1287 return max(xfer->len * 8 * 2 / (xfer->speed_hz / 1000), 500U); in spi_controller_xfer_timeout()
1290 /*---------------------------------------------------------------------------*/
1292 /* SPI transfer replacement methods which make use of spi_res */
1299 * struct spi_replaced_transfers - structure describing the spi_transfer
1308 * are to get re-inserted
1310 * @inserted_transfers: array of spi_transfers of array-size @inserted,
1326 /*---------------------------------------------------------------------------*/
1328 /* SPI transfer transformation methods */
1339 /*---------------------------------------------------------------------------*/
1342 * All these synchronous SPI transfer routines are utilities layered
1347 extern int spi_sync(struct spi_device *spi, struct spi_message *message);
1348 extern int spi_sync_locked(struct spi_device *spi, struct spi_message *message);
1353 * spi_sync_transfer - synchronous SPI data transfer
1354 * @spi: device with which data will be exchanged
1359 * Does a synchronous SPI data transfer of the given spi_transfer array.
1366 spi_sync_transfer(struct spi_device *spi, struct spi_transfer *xfers, in spi_sync_transfer() argument
1373 return spi_sync(spi, &msg); in spi_sync_transfer()
1377 * spi_write - SPI synchronous write
1378 * @spi: device to which data will be written
1389 spi_write(struct spi_device *spi, const void *buf, size_t len) in spi_write() argument
1396 return spi_sync_transfer(spi, &t, 1); in spi_write()
1400 * spi_read - SPI synchronous read
1401 * @spi: device from which data will be read
1412 spi_read(struct spi_device *spi, void *buf, size_t len) in spi_read() argument
1419 return spi_sync_transfer(spi, &t, 1); in spi_read()
1423 extern int spi_write_then_read(struct spi_device *spi,
1428 * spi_w8r8 - SPI synchronous 8 bit write followed by 8 bit read
1429 * @spi: device with which data will be exchanged
1438 static inline ssize_t spi_w8r8(struct spi_device *spi, u8 cmd) in spi_w8r8() argument
1443 status = spi_write_then_read(spi, &cmd, 1, &result, 1); in spi_w8r8()
1450 * spi_w8r16 - SPI synchronous 8 bit write followed by 16 bit read
1451 * @spi: device with which data will be exchanged
1455 * The number is returned in wire-order, which is at least sometimes
1456 * big-endian.
1463 static inline ssize_t spi_w8r16(struct spi_device *spi, u8 cmd) in spi_w8r16() argument
1468 status = spi_write_then_read(spi, &cmd, 1, &result, 2); in spi_w8r16()
1475 * spi_w8r16be - SPI synchronous 8 bit write followed by 16 bit big-endian read
1476 * @spi: device with which data will be exchanged
1481 * convert the read 16 bit data word from big-endian to native endianness.
1488 static inline ssize_t spi_w8r16be(struct spi_device *spi, u8 cmd) in spi_w8r16be() argument
1494 status = spi_write_then_read(spi, &cmd, 1, &result, 2); in spi_w8r16be()
1501 /*---------------------------------------------------------------------------*/
1504 * INTERFACE between board init code and SPI infrastructure.
1506 * No SPI driver ever sees these SPI device table segments, but
1507 * it's how the SPI core (or adapters that get hotplugged) grows
1510 * As a rule, SPI devices can't be probed. Instead, board init code
1513 * support for non-static configurations too; enough to handle adding
1514 * parport adapters, or microcontrollers acting as USB-to-SPI bridges.
1518 * struct spi_board_info - board-specific template for a SPI device
1521 * data stored there is driver-specific.
1527 * from the chip datasheet and board-specific signal quality issues.
1536 * When adding new SPI devices to the device tree, these structures serve
1542 * be stored in tables of board-specific device descriptors, which are
1588 * - quirks like clock rate mattering when not selected
1596 /* Board init code may ignore whether SPI is configured or not */
1618 spi_add_device(struct spi_device *spi);
1623 extern void spi_unregister_device(struct spi_device *spi);
1634 return list_is_last(&xfer->transfer_list, &ctlr->cur_msg->transfers); in spi_transfer_is_last()