Lines Matching +full:22 +full:v
26 #define BP_SSP_CTRL0_BUS_WIDTH 22
27 #define BM_SSP_CTRL0_BUS_WIDTH (0x3 << 22)
37 #define BM_SSP_CMD0_SLOW_CLKING_EN (1 << 22)
58 #define BF_SSP_TIMING_CLOCK_DIVIDE(v) \ argument
59 (((v) << 8) & BM_SSP_TIMING_CLOCK_DIVIDE)
62 #define BF_SSP_TIMING_CLOCK_RATE(v) \ argument
63 (((v) << 0) & BM_SSP_TIMING_CLOCK_RATE)
74 #define BM_SSP_CTRL1_DATA_CRC_IRQ_EN (1 << 22)
86 #define BF_SSP_CTRL1_WORD_LENGTH(v) \ argument
87 (((v) << 4) & BM_SSP_CTRL1_WORD_LENGTH)
93 #define BF_SSP_CTRL1_SSP_MODE(v) \ argument
94 (((v) << 0) & BM_SSP_CTRL1_SSP_MODE)