Lines Matching full:interrupt

8  * Interrupt control register
16  *                    When an interrupt is sent the interrupt
22  *                    interrupt coalescing is effectively disabled
23  *                    and every interrupt assert results in an
24  *                    interrupt.  Reset value: 0
25  * @mask:             Interrupt mask.  When @mask=1 the interrupt
26  *                    resource will not send an interrupt.  When
27  *                    @mask=0 the interrupt resource will send an
28  *                    interrupt if an interrupt event is pending
29  *                    or on the next interrupt assertion event.
31  * @credits:          Interrupt credits.  This register indicates
32  *                    how many interrupt events the hardware has
36  *                    becomes 0 then the "pending interrupt" bit
37  *                    in the Interrupt Status register is cleared
41  * @flags:            Interrupt control flags
43  *                       the interrupt resource will set mask=0.
50  *                    @mask_on_assert=1 the interrupt resource
51  *                    will set @mask=1 whenever an interrupt is
53  *                    Interrupt mode the driver must select
54  *                    @mask_on_assert=0 for proper interrupt
58  *                    the interrupt resource is again eligible to
59  *                    send an interrupt.  If an interrupt event
61  *                    reaches 0 the pending interrupt will be
62  *                    sent, otherwise an interrupt will be sent
63  *                    on the next interrupt assertion event.
91  * @PDS_CORE_INTR_MASK_CLEAR:	unmask interrupt.
92  * @PDS_CORE_INTR_MASK_SET:	mask interrupt.
103  * @PDS_CORE_INTR_CRED_UNMASK:	unmask the interrupt.