Lines Matching +full:1 +full:- +full:7
1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * Copyright (C) 2015-2017 Dialog Semiconductor
14 #define DA9062_I2C_PAGE_SEL_SHIFT 1
159 #define DA9062AA_REVERT_SHIFT 7
160 #define DA9062AA_REVERT_MASK BIT(7)
171 #define DA9062AA_GPI1_SHIFT 1
172 #define DA9062AA_GPI1_MASK BIT(1)
183 #define DA9062AA_LDO2_ILIM_SHIFT 1
184 #define DA9062AA_LDO2_ILIM_MASK BIT(1)
193 #define DA9062AA_POR_SHIFT 1
194 #define DA9062AA_POR_MASK BIT(1)
205 #define DA9062AA_WAIT_SHUT_SHIFT 7
206 #define DA9062AA_WAIT_SHUT_MASK BIT(7)
211 #define DA9062AA_E_ALARM_SHIFT 1
212 #define DA9062AA_E_ALARM_MASK BIT(1)
225 #define DA9062AA_E_TEMP_SHIFT 1
226 #define DA9062AA_E_TEMP_MASK BIT(1)
231 #define DA9062AA_E_VDD_WARN_SHIFT 7
232 #define DA9062AA_E_VDD_WARN_MASK BIT(7)
237 #define DA9062AA_E_GPI1_SHIFT 1
238 #define DA9062AA_E_GPI1_MASK BIT(1)
249 #define DA9062AA_M_ALARM_SHIFT 1
250 #define DA9062AA_M_ALARM_MASK BIT(1)
259 #define DA9062AA_M_TEMP_SHIFT 1
260 #define DA9062AA_M_TEMP_MASK BIT(1)
265 #define DA9062AA_M_VDD_WARN_SHIFT 7
266 #define DA9062AA_M_VDD_WARN_MASK BIT(7)
271 #define DA9062AA_M_GPI1_SHIFT 1
272 #define DA9062AA_M_GPI1_MASK BIT(1)
283 #define DA9062AA_POWER_EN_SHIFT 1
284 #define DA9062AA_POWER_EN_MASK BIT(1)
297 #define DA9062AA_WATCHDOG_PD_SHIFT 1
298 #define DA9062AA_WATCHDOG_PD_MASK BIT(1)
307 #define DA9062AA_BUCK_SLOWSTART_SHIFT 7
308 #define DA9062AA_BUCK_SLOWSTART_MASK BIT(7)
319 #define DA9062AA_DEF_SUPPLY_SHIFT 7
320 #define DA9062AA_DEF_SUPPLY_MASK BIT(7)
329 #define DA9062AA_RTC_MODE_SD_SHIFT 1
330 #define DA9062AA_RTC_MODE_SD_MASK BIT(1)
333 #define DA9062AA_V_LOCK_SHIFT 7
334 #define DA9062AA_V_LOCK_MASK BIT(7)
339 #define DA9062AA_SHUTDOWN_SHIFT 1
340 #define DA9062AA_SHUTDOWN_MASK BIT(1)
355 #define DA9062AA_PMCONT_DIS_SHIFT 7
356 #define DA9062AA_PMCONT_DIS_MASK BIT(7)
369 #define DA9062AA_GPIO1_WEN_SHIFT 7
370 #define DA9062AA_GPIO1_WEN_MASK BIT(7)
383 #define DA9062AA_GPIO3_WEN_SHIFT 7
384 #define DA9062AA_GPIO3_WEN_MASK BIT(7)
397 #define DA9062AA_GPIO1_WKUP_MODE_SHIFT 1
398 #define DA9062AA_GPIO1_WKUP_MODE_MASK BIT(1)
409 #define DA9062AA_GPIO1_MODE_SHIFT 1
410 #define DA9062AA_GPIO1_MODE_MASK BIT(1)
435 #define DA9062AA_BUCK2_GPI_SHIFT 1
436 #define DA9062AA_BUCK2_GPI_MASK (0x03 << 1)
445 #define DA9062AA_BUCK1_GPI_SHIFT 1
446 #define DA9062AA_BUCK1_GPI_MASK (0x03 << 1)
455 #define DA9062AA_BUCK4_GPI_SHIFT 1
456 #define DA9062AA_BUCK4_GPI_MASK (0x03 << 1)
465 #define DA9062AA_BUCK3_GPI_SHIFT 1
466 #define DA9062AA_BUCK3_GPI_MASK (0x03 << 1)
475 #define DA9062AA_LDO1_GPI_SHIFT 1
476 #define DA9062AA_LDO1_GPI_MASK (0x03 << 1)
481 #define DA9062AA_LDO1_CONF_SHIFT 7
482 #define DA9062AA_LDO1_CONF_MASK BIT(7)
487 #define DA9062AA_LDO2_GPI_SHIFT 1
488 #define DA9062AA_LDO2_GPI_MASK (0x03 << 1)
493 #define DA9062AA_LDO2_CONF_SHIFT 7
494 #define DA9062AA_LDO2_CONF_MASK BIT(7)
499 #define DA9062AA_LDO3_GPI_SHIFT 1
500 #define DA9062AA_LDO3_GPI_MASK (0x03 << 1)
505 #define DA9062AA_LDO3_CONF_SHIFT 7
506 #define DA9062AA_LDO3_CONF_MASK BIT(7)
511 #define DA9062AA_LDO4_GPI_SHIFT 1
512 #define DA9062AA_LDO4_GPI_MASK (0x03 << 1)
517 #define DA9062AA_LDO4_CONF_SHIFT 7
518 #define DA9062AA_LDO4_CONF_MASK BIT(7)
523 #define DA9062AA_VBUCK2_SEL_SHIFT 1
524 #define DA9062AA_VBUCK2_SEL_MASK BIT(1)
535 #define DA9062AA_VLDO4_SEL_SHIFT 7
536 #define DA9062AA_VLDO4_SEL_MASK BIT(7)
541 #define DA9062AA_RTC_READ_SHIFT 7
542 #define DA9062AA_RTC_READ_MASK BIT(7)
597 #define DA9062AA_TICK_ON_SHIFT 7
598 #define DA9062AA_TICK_ON_MASK BIT(7)
725 #define DA9062AA_EN_32KOUT_SHIFT 7
726 #define DA9062AA_EN_32KOUT_MASK BIT(7)
779 #define DA9062AA_BUCK2_SL_A_SHIFT 7
780 #define DA9062AA_BUCK2_SL_A_MASK BIT(7)
785 #define DA9062AA_BUCK1_SL_A_SHIFT 7
786 #define DA9062AA_BUCK1_SL_A_MASK BIT(7)
791 #define DA9062AA_BUCK4_SL_A_SHIFT 7
792 #define DA9062AA_BUCK4_SL_A_MASK BIT(7)
797 #define DA9062AA_BUCK3_SL_A_SHIFT 7
798 #define DA9062AA_BUCK3_SL_A_MASK BIT(7)
800 /* DA9062AA_VLDO[1-4]_A common */
806 #define DA9062AA_LDO1_SL_A_SHIFT 7
807 #define DA9062AA_LDO1_SL_A_MASK BIT(7)
812 #define DA9062AA_LDO2_SL_A_SHIFT 7
813 #define DA9062AA_LDO2_SL_A_MASK BIT(7)
818 #define DA9062AA_LDO3_SL_A_SHIFT 7
819 #define DA9062AA_LDO3_SL_A_MASK BIT(7)
824 #define DA9062AA_LDO4_SL_A_SHIFT 7
825 #define DA9062AA_LDO4_SL_A_MASK BIT(7)
830 #define DA9062AA_BUCK2_SL_B_SHIFT 7
831 #define DA9062AA_BUCK2_SL_B_MASK BIT(7)
836 #define DA9062AA_BUCK1_SL_B_SHIFT 7
837 #define DA9062AA_BUCK1_SL_B_MASK BIT(7)
842 #define DA9062AA_BUCK4_SL_B_SHIFT 7
843 #define DA9062AA_BUCK4_SL_B_MASK BIT(7)
848 #define DA9062AA_BUCK3_SL_B_SHIFT 7
849 #define DA9062AA_BUCK3_SL_B_MASK BIT(7)
854 #define DA9062AA_LDO1_SL_B_SHIFT 7
855 #define DA9062AA_LDO1_SL_B_MASK BIT(7)
860 #define DA9062AA_LDO2_SL_B_SHIFT 7
861 #define DA9062AA_LDO2_SL_B_MASK BIT(7)
866 #define DA9062AA_LDO3_SL_B_SHIFT 7
867 #define DA9062AA_LDO3_SL_B_MASK BIT(7)
872 #define DA9062AA_LDO4_SL_B_SHIFT 7
873 #define DA9062AA_LDO4_SL_B_MASK BIT(7)
918 #define DA9062AA_NIRQ_MODE_SHIFT 1
919 #define DA9062AA_NIRQ_MODE_MASK BIT(1)
928 #define DA9062AA_BUCK2_AUTO_SHIFT 1
929 #define DA9062AA_BUCK2_AUTO_MASK BIT(1)
938 #define DA9062AA_LDO2_AUTO_SHIFT 1
939 #define DA9062AA_LDO2_AUTO_MASK BIT(1)
966 #define DA9062AA_LDO_SD_SHIFT 7
967 #define DA9062AA_LDO_SD_MASK BIT(7)
978 #define DA9062AA_IF_RESET_SHIFT 7
979 #define DA9062AA_IF_RESET_MASK BIT(7)
984 #define DA9062AA_GPIO1_PUPD_SHIFT 1
985 #define DA9062AA_GPIO1_PUPD_MASK BIT(1)
994 #define DA9062AA_NSHUTDOWN_PU_SHIFT 1
995 #define DA9062AA_NSHUTDOWN_PU_MASK BIT(1)