Lines Matching refs:k3_udma_glue_tx_channel

24 struct k3_udma_glue_tx_channel;
26 struct k3_udma_glue_tx_channel *k3_udma_glue_request_tx_chn(struct device *dev,
29 void k3_udma_glue_release_tx_chn(struct k3_udma_glue_tx_channel *tx_chn);
30 int k3_udma_glue_push_tx_chn(struct k3_udma_glue_tx_channel *tx_chn,
33 int k3_udma_glue_pop_tx_chn(struct k3_udma_glue_tx_channel *tx_chn,
35 int k3_udma_glue_enable_tx_chn(struct k3_udma_glue_tx_channel *tx_chn);
36 void k3_udma_glue_disable_tx_chn(struct k3_udma_glue_tx_channel *tx_chn);
37 void k3_udma_glue_tdown_tx_chn(struct k3_udma_glue_tx_channel *tx_chn,
39 void k3_udma_glue_reset_tx_chn(struct k3_udma_glue_tx_channel *tx_chn,
41 u32 k3_udma_glue_tx_get_hdesc_size(struct k3_udma_glue_tx_channel *tx_chn);
42 u32 k3_udma_glue_tx_get_txcq_id(struct k3_udma_glue_tx_channel *tx_chn);
43 int k3_udma_glue_tx_get_irq(struct k3_udma_glue_tx_channel *tx_chn);
45 	k3_udma_glue_tx_get_dma_device(struct k3_udma_glue_tx_channel *tx_chn);
46 void k3_udma_glue_tx_dma_to_cppi5_addr(struct k3_udma_glue_tx_channel *tx_chn,
48 void k3_udma_glue_tx_cppi5_to_dma_addr(struct k3_udma_glue_tx_channel *tx_chn,