240 	u32 dc_ctrl, dc_sts;  in ufx_blank()  local
246 	status = ufx_reg_read(dev, 0x2000, &dc_ctrl);  in ufx_blank()
250 	if ((dc_sts & 0x00000100) || (dc_ctrl & 0x00000100))  in ufx_blank()
254 	dc_ctrl |= 0x00000100;  in ufx_blank()
255 	status = ufx_reg_write(dev, 0x2000, dc_ctrl);  in ufx_blank()
277 	u32 dc_ctrl, dc_sts;  in ufx_unblank()  local
283 	status = ufx_reg_read(dev, 0x2000, &dc_ctrl);  in ufx_unblank()
287 	if (((dc_sts & 0x00000100) == 0) || ((dc_ctrl & 0x00000100) == 0))  in ufx_unblank()
291 	dc_ctrl &= ~0x00000100;  in ufx_unblank()
292 	status = ufx_reg_write(dev, 0x2000, dc_ctrl);  in ufx_unblank()
314 	u32 dc_ctrl, dc_sts;  in ufx_disable()  local
320 	status = ufx_reg_read(dev, 0x2000, &dc_ctrl);  in ufx_disable()
324 	if (((dc_sts & 0x00000001) == 0) || ((dc_ctrl & 0x00000001) == 0))  in ufx_disable()
328 	dc_ctrl &= ~(0x00000001);  in ufx_disable()
329 	status = ufx_reg_write(dev, 0x2000, dc_ctrl);  in ufx_disable()
351 	u32 dc_ctrl, dc_sts;  in ufx_enable()  local
357 	status = ufx_reg_read(dev, 0x2000, &dc_ctrl);  in ufx_enable()
361 	if ((dc_sts & 0x00000001) || (dc_ctrl & 0x00000001))  in ufx_enable()
365 	dc_ctrl |= 0x00000001;  in ufx_enable()
366 	status = ufx_reg_write(dev, 0x2000, dc_ctrl);  in ufx_enable()