Lines Matching refs:pllSSPLL_CNTL
610 rinfo->save_regs[43] = INPLL(pllSSPLL_CNTL); in radeon_pm_save_regs()
1566 OUTPLL(pllSSPLL_CNTL, 0xbf03); in radeon_pm_m10_disable_spread_spectrum()
1593 OUTPLL(pllSSPLL_CNTL, rinfo->save_regs[43] | 3); in radeon_pm_m10_enable_lvds_spread_spectrum()
1598 tmp = INPLL(pllSSPLL_CNTL); in radeon_pm_m10_enable_lvds_spread_spectrum()
1599 OUTPLL(pllSSPLL_CNTL, tmp & ~0x2); in radeon_pm_m10_enable_lvds_spread_spectrum()
1601 tmp = INPLL(pllSSPLL_CNTL); in radeon_pm_m10_enable_lvds_spread_spectrum()
1602 OUTPLL(pllSSPLL_CNTL, tmp & ~0x1); in radeon_pm_m10_enable_lvds_spread_spectrum()
2179 tmp = INPLL(pllSSPLL_CNTL); in radeon_reinitialize_M9P()
2181 OUTPLL(pllSSPLL_CNTL, tmp); in radeon_reinitialize_M9P()
2184 OUTPLL(pllSSPLL_CNTL, tmp); in radeon_reinitialize_M9P()
2187 OUTPLL(pllSSPLL_CNTL, tmp); in radeon_reinitialize_M9P()