Lines Matching refs:write_xr
59 #define write_xr(num, val) mm_write_xr(p, num, val) macro
282 write_xr(0x81, 0x16); /* 24 bit packed color mode */ in asiliantfb_set_par()
283 write_xr(0x82, 0x00); /* Disable palettes */ in asiliantfb_set_par()
284 write_xr(0x20, 0x20); /* 24 bit blitter mode */ in asiliantfb_set_par()
287 write_xr(0x81, 0x15); /* 16 bit color mode */ in asiliantfb_set_par()
289 write_xr(0x81, 0x14); /* 15 bit color mode */ in asiliantfb_set_par()
290 write_xr(0x82, 0x00); /* Disable palettes */ in asiliantfb_set_par()
291 write_xr(0x20, 0x10); /* 16 bit blitter mode */ in asiliantfb_set_par()
293 write_xr(0x0a, 0x02); /* Linear */ in asiliantfb_set_par()
294 write_xr(0x81, 0x12); /* 8 bit color mode */ in asiliantfb_set_par()
295 write_xr(0x82, 0x00); /* Graphics gamma enable */ in asiliantfb_set_par()
296 write_xr(0x20, 0x00); /* 8 bit blitter mode */ in asiliantfb_set_par()
300 write_xr(0xc4, dclk2_m); in asiliantfb_set_par()
301 write_xr(0xc5, dclk2_n); in asiliantfb_set_par()
302 write_xr(0xc7, dclk2_div); in asiliantfb_set_par()
461 write_xr(chips_init_xr[i].addr, chips_init_xr[i].data); in chips_hw_init()
462 write_xr(0x81, 0x12); in chips_hw_init()
463 write_xr(0x82, 0x08); in chips_hw_init()
464 write_xr(0x20, 0x00); in chips_hw_init()