270 	tisc = MLX5_ADDR_OF(create_tis_in, in, ctx);  in create_tis()
364 	qpc = MLX5_ADDR_OF(create_qp_in, in, qpc);  in qp_prepare()
369 		qpc = MLX5_ADDR_OF(create_qp_in, in, qpc);  in qp_prepare()
385 	pas = (__be64 *)MLX5_ADDR_OF(create_qp_in, in, pas);  in qp_prepare()
430 	qpc = MLX5_ADDR_OF(create_qp_in, in, qpc);  in qp_create()
574 	pas = (__be64 *)MLX5_ADDR_OF(create_cq_in, in, pas);  in cq_create()
577 	cqc = MLX5_ADDR_OF(create_cq_in, in, cq_context);  in cq_create()
587 	cqc = MLX5_ADDR_OF(create_cq_in, in, cq_context);  in cq_create()
652 	caps =  MLX5_ADDR_OF(query_hca_cap_out, out, capability);  in read_umem_params()
725 	um = MLX5_ADDR_OF(create_umem_in, in, umem);  in create_umem()
729 	pas = (__be64 *)MLX5_ADDR_OF(umem, um, mtt[0]);  in create_umem()
882 	cmd_hdr = MLX5_ADDR_OF(create_virtio_net_q_in, in, general_obj_in_cmd_hdr);  in create_virtqueue()
888 	obj_context = MLX5_ADDR_OF(create_virtio_net_q_in, in, obj_context);  in create_virtqueue()
895 	vq_ctx = MLX5_ADDR_OF(virtio_net_q_object, obj_context, virtio_q_context);  in create_virtqueue()
1003 		qpc = MLX5_ADDR_OF(rst2init_qp_in, *in, qpc);  in alloc_inout()
1006 		pp = MLX5_ADDR_OF(qpc, qpc, primary_address_path);  in alloc_inout()
1020 		qpc = MLX5_ADDR_OF(rst2init_qp_in, *in, qpc);  in alloc_inout()
1024 		pp = MLX5_ADDR_OF(qpc, qpc, primary_address_path);  in alloc_inout()
1038 		qpc = MLX5_ADDR_OF(rst2init_qp_in, *in, qpc);  in alloc_inout()
1039 		pp = MLX5_ADDR_OF(qpc, qpc, primary_address_path);  in alloc_inout()
1136 	cmd_hdr = MLX5_ADDR_OF(query_virtio_net_q_in, in, general_obj_in_cmd_hdr);  in query_virtqueue()
1146 	obj_context = MLX5_ADDR_OF(query_virtio_net_q_out, out, obj_context);  in query_virtqueue()
1192 	cmd_hdr = MLX5_ADDR_OF(modify_virtio_net_q_in, in, general_obj_in_cmd_hdr);  in modify_virtqueue()
1199 	obj_context = MLX5_ADDR_OF(modify_virtio_net_q_in, in, obj_context);  in modify_virtqueue()
1221 	cmd_hdr = MLX5_ADDR_OF(create_virtio_q_counters_in, in, hdr);  in counter_set_alloc()
1425 	rqtc = MLX5_ADDR_OF(create_rqt_in, in, rqt_context);  in create_rqt()
1429 	list = MLX5_ADDR_OF(rqtc, rqtc, rq_num[0]);  in create_rqt()
1461 	rqtc = MLX5_ADDR_OF(modify_rqt_in, in, ctx);  in modify_rqt()
1464 	list = MLX5_ADDR_OF(rqtc, rqtc, rq_num[0]);  in modify_rqt()
1503 	tirc = MLX5_ADDR_OF(create_tir_in, in, ctx);  in create_tir()
1508 	rss_key = MLX5_ADDR_OF(tirc, tirc, rx_hash_toeplitz_key);  in create_tir()
1511 	outer = MLX5_ADDR_OF(tirc, tirc, rx_hash_field_selector_outer);  in create_tir()
1601 	headers_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria, outer_headers);  in mlx5_vdpa_add_mac_vlan_rules()
1602 	headers_v = MLX5_ADDR_OF(fte_match_param, spec->match_value, outer_headers);  in mlx5_vdpa_add_mac_vlan_rules()
1603 	dmac_c = MLX5_ADDR_OF(fte_match_param, headers_c, outer_headers.dmac_47_16);  in mlx5_vdpa_add_mac_vlan_rules()
1604 	dmac_v = MLX5_ADDR_OF(fte_match_param, headers_v, outer_headers.dmac_47_16);  in mlx5_vdpa_add_mac_vlan_rules()
3064 	cmd_hdr = MLX5_ADDR_OF(query_virtio_q_counters_in, in, hdr);  in counter_set_query()
3075 	ctx = MLX5_ADDR_OF(query_virtio_q_counters_out, out, counters);  in counter_set_query()