385 	dev_vdbg(hsotg->dev, "%s(%p,%p,%d)\n", __func__, hsotg, dest, bytes);  in dwc2_read_packet()
503 		dev_vdbg(hsotg->dev, "control/bulk\n");  in dwc2_hc_enable_slave_ints()
531 			dev_vdbg(hsotg->dev, "intr\n");  in dwc2_hc_enable_slave_ints()
553 			dev_vdbg(hsotg->dev, "isoc\n");  in dwc2_hc_enable_slave_ints()
570 		dev_vdbg(hsotg->dev, "set HCINTMSK to %08x\n", hcintmsk);  in dwc2_hc_enable_slave_ints()
584 			dev_vdbg(hsotg->dev, "desc DMA disabled\n");  in dwc2_hc_enable_dma_ints()
588 			dev_vdbg(hsotg->dev, "desc DMA enabled\n");  in dwc2_hc_enable_dma_ints()
596 			dev_vdbg(hsotg->dev, "setting ACK\n");  in dwc2_hc_enable_dma_ints()
607 		dev_vdbg(hsotg->dev, "set HCINTMSK to %08x\n", hcintmsk);  in dwc2_hc_enable_dma_ints()
617 			dev_vdbg(hsotg->dev, "DMA enabled\n");  in dwc2_hc_enable_ints()
621 			dev_vdbg(hsotg->dev, "DMA disabled\n");  in dwc2_hc_enable_ints()
630 		dev_vdbg(hsotg->dev, "set HAINTMSK to %08x\n", intmsk);  in dwc2_hc_enable_ints()
637 		dev_vdbg(hsotg->dev, "set GINTMSK to %08x\n", intmsk);  in dwc2_hc_enable_ints()
659 		dev_vdbg(hsotg->dev, "%s()\n", __func__);  in dwc2_hc_init()
683 		dev_vdbg(hsotg->dev, "set HCCHAR(%d) to %08x\n",  in dwc2_hc_init()
686 		dev_vdbg(hsotg->dev, "%s: Channel %d\n",  in dwc2_hc_init()
688 		dev_vdbg(hsotg->dev, "	 Dev Addr: %d\n",  in dwc2_hc_init()
690 		dev_vdbg(hsotg->dev, "	 Ep Num: %d\n",  in dwc2_hc_init()
692 		dev_vdbg(hsotg->dev, "	 Is In: %d\n",  in dwc2_hc_init()
694 		dev_vdbg(hsotg->dev, "	 Is Low Speed: %d\n",  in dwc2_hc_init()
696 		dev_vdbg(hsotg->dev, "	 Ep Type: %d\n",  in dwc2_hc_init()
698 		dev_vdbg(hsotg->dev, "	 Max Pkt: %d\n",  in dwc2_hc_init()
705 			dev_vdbg(hsotg->dev,  in dwc2_hc_init()
718 			dev_vdbg(hsotg->dev, "	  comp split %d\n",  in dwc2_hc_init()
720 			dev_vdbg(hsotg->dev, "	  xact pos %d\n",  in dwc2_hc_init()
722 			dev_vdbg(hsotg->dev, "	  hub addr %d\n",  in dwc2_hc_init()
724 			dev_vdbg(hsotg->dev, "	  hub port %d\n",  in dwc2_hc_init()
726 			dev_vdbg(hsotg->dev, "	  is_in %d\n",  in dwc2_hc_init()
728 			dev_vdbg(hsotg->dev, "	  Max Pkt %d\n",  in dwc2_hc_init()
730 			dev_vdbg(hsotg->dev, "	  xferlen %d\n",  in dwc2_hc_init()
772 		dev_vdbg(hsotg->dev, "%s()\n", __func__);  in dwc2_hc_halt()
804 		dev_vdbg(hsotg->dev, "dequeue/error\n");  in dwc2_hc_halt()
843 		dev_vdbg(hsotg->dev,  in dwc2_hc_halt()
855 			dev_vdbg(hsotg->dev, "desc DMA disabled\n");  in dwc2_hc_halt()
865 			dev_vdbg(hsotg->dev, "DMA not enabled\n");  in dwc2_hc_halt()
871 			dev_vdbg(hsotg->dev, "control/bulk\n");  in dwc2_hc_halt()
874 				dev_vdbg(hsotg->dev, "Disabling channel\n");  in dwc2_hc_halt()
879 				dev_vdbg(hsotg->dev, "isoc/intr\n");  in dwc2_hc_halt()
884 					dev_vdbg(hsotg->dev, "Disabling channel\n");  in dwc2_hc_halt()
890 			dev_vdbg(hsotg->dev, "DMA enabled\n");  in dwc2_hc_halt()
898 			dev_vdbg(hsotg->dev, "Channel enabled\n");  in dwc2_hc_halt()
903 			dev_vdbg(hsotg->dev, "Channel disabled\n");  in dwc2_hc_halt()
908 		dev_vdbg(hsotg->dev, "%s: Channel %d\n", __func__,  in dwc2_hc_halt()
910 		dev_vdbg(hsotg->dev, "	 hcchar: 0x%08x\n",  in dwc2_hc_halt()
912 		dev_vdbg(hsotg->dev, "	 halt_pending: %d\n",  in dwc2_hc_halt()
914 		dev_vdbg(hsotg->dev, "	 halt_on_queue: %d\n",  in dwc2_hc_halt()
916 		dev_vdbg(hsotg->dev, "	 halt_status: %d\n",  in dwc2_hc_halt()
1103 		dev_vdbg(hsotg->dev, "%s()\n", __func__);  in dwc2_hc_write_packet()
1146 		dev_vdbg(hsotg->dev, "%s: Channel %d\n", __func__,  in dwc2_hc_do_ping()
1203 		dev_vdbg(hsotg->dev, "%s()\n", __func__);  in dwc2_hc_start_transfer()
1208 				dev_vdbg(hsotg->dev, "ping, no DMA\n");  in dwc2_hc_start_transfer()
1215 			dev_vdbg(hsotg->dev, "ping, DMA\n");  in dwc2_hc_start_transfer()
1222 			dev_vdbg(hsotg->dev, "split\n");  in dwc2_hc_start_transfer()
1247 			dev_vdbg(hsotg->dev, "no split\n");  in dwc2_hc_start_transfer()
1319 		dev_vdbg(hsotg->dev, "Wrote %08x to HCTSIZ(%d)\n",  in dwc2_hc_start_transfer()
1322 		dev_vdbg(hsotg->dev, "%s: Channel %d\n", __func__,  in dwc2_hc_start_transfer()
1324 		dev_vdbg(hsotg->dev, "	 Xfer Size: %d\n",  in dwc2_hc_start_transfer()
1327 		dev_vdbg(hsotg->dev, "	 Num Pkts: %d\n",  in dwc2_hc_start_transfer()
1330 		dev_vdbg(hsotg->dev, "	 Start PID: %d\n",  in dwc2_hc_start_transfer()
1340 				dev_vdbg(hsotg->dev, "align_buf\n");  in dwc2_hc_start_transfer()
1348 			dev_vdbg(hsotg->dev, "Wrote %08lx to HCDMA(%d)\n",  in dwc2_hc_start_transfer()
1375 		dev_vdbg(hsotg->dev, "	 Multi Cnt: %d\n",  in dwc2_hc_start_transfer()
1381 		dev_vdbg(hsotg->dev, "Wrote %08x to HCCHAR(%d)\n", hcchar,  in dwc2_hc_start_transfer()
1430 		dev_vdbg(hsotg->dev, "%s: Channel %d\n", __func__,  in dwc2_hc_start_transfer_ddma()
1432 		dev_vdbg(hsotg->dev, "	 Start PID: %d\n",  in dwc2_hc_start_transfer_ddma()
1434 		dev_vdbg(hsotg->dev, "	 NTD: %d\n", chan->ntd - 1);  in dwc2_hc_start_transfer_ddma()
1445 		dev_vdbg(hsotg->dev, "Wrote %pad to HCDMA(%d)\n",  in dwc2_hc_start_transfer_ddma()
1463 		dev_vdbg(hsotg->dev, "	 Multi Cnt: %d\n",  in dwc2_hc_start_transfer_ddma()
1469 		dev_vdbg(hsotg->dev, "Wrote %08x to HCCHAR(%d)\n", hcchar,  in dwc2_hc_start_transfer_ddma()
1500 		dev_vdbg(hsotg->dev, "%s: Channel %d\n", __func__,  in dwc2_hc_continue_transfer()
1530 			dev_vdbg(hsotg->dev, "	 IN xfer: hcchar = 0x%08x\n",  in dwc2_hc_continue_transfer()
2332 			dev_vdbg(hsotg->dev, "  Control setup transaction\n");  in dwc2_hc_init_xfer()
2344 			dev_vdbg(hsotg->dev, "  Control data transaction\n");  in dwc2_hc_init_xfer()
2353 			dev_vdbg(hsotg->dev, "  Control status transaction\n");  in dwc2_hc_init_xfer()
2551 		dev_vdbg(hsotg->dev, "%s(%p,%p)\n", __func__, hsotg, qh);  in dwc2_assign_and_init_hc()
2630 		dev_vdbg(hsotg->dev, "Non-aligned buffer\n");  in dwc2_assign_and_init_hc()
2690 	dev_vdbg(hsotg->dev, "  Select Transactions\n");  in dwc2_hcd_select_transactions()
2861 		dev_vdbg(hsotg->dev, "Queue periodic transactions\n");  in dwc2_process_periodic_channels()
2870 		dev_vdbg(hsotg->dev, "  P Tx Req Queue Space Avail (before queue): %d\n",  in dwc2_process_periodic_channels()
2872 		dev_vdbg(hsotg->dev, "  P Tx FIFO Space Avail (before queue): %d\n",  in dwc2_process_periodic_channels()
2991 	dev_vdbg(hsotg->dev, "Queue non-periodic transactions\n");  in dwc2_process_non_periodic_channels()
2998 	dev_vdbg(hsotg->dev, "  NP Tx Req Queue Space Avail (before queue): %d\n",  in dwc2_process_non_periodic_channels()
3000 	dev_vdbg(hsotg->dev, "  NP Tx FIFO Space Avail (before queue): %d\n",  in dwc2_process_non_periodic_channels()
3058 		dev_vdbg(hsotg->dev,  in dwc2_process_non_periodic_channels()
3061 		dev_vdbg(hsotg->dev,  in dwc2_process_non_periodic_channels()
3106 	dev_vdbg(hsotg->dev, "Queue Transactions\n");  in dwc2_hcd_queue_transactions()
3521 		dev_vdbg(hsotg->dev,  in dwc2_hcd_hub_control()
3556 		dev_vdbg(hsotg->dev, "  HPRT0: 0x%08x\n", hprt0);  in dwc2_hcd_hub_control()
3603 		dev_vdbg(hsotg->dev, "port_status=%08x\n", port_status);  in dwc2_hcd_hub_control()
3778 	dev_vdbg(hsotg->dev, "DWC OTG HCD GET FRAME NUMBER %d\n",  in dwc2_hcd_get_frame_number()
3838 		dev_vdbg(hsotg->dev,  in dwc2_hcd_urb_set_pipeinfo()
4138 		dev_vdbg(hsotg->dev,  in dwc2_host_complete()
4158 			dev_vdbg(hsotg->dev, " ISO Desc %d status %d\n",  in dwc2_host_complete()
4536 	dev_vdbg(hsotg->dev, "%s, urb %p\n", fn_name, urb);  in dwc2_dump_urb_info()
4537 	dev_vdbg(hsotg->dev, "  Device address: %d\n",  in dwc2_dump_urb_info()
4539 	dev_vdbg(hsotg->dev, "  Endpoint: %d, %s\n",  in dwc2_dump_urb_info()
4558 	dev_vdbg(hsotg->dev, "  Endpoint type: %s %s (%s)\n", pipetype,  in dwc2_dump_urb_info()
4577 	dev_vdbg(hsotg->dev, "  Speed: %s\n", speed);  in dwc2_dump_urb_info()
4578 	dev_vdbg(hsotg->dev, "  Max packet size: %d (%d mult)\n",  in dwc2_dump_urb_info()
4582 	dev_vdbg(hsotg->dev, "  Data buffer length: %d\n",  in dwc2_dump_urb_info()
4584 	dev_vdbg(hsotg->dev, "  Transfer buffer: %p, Transfer DMA: %08lx\n",  in dwc2_dump_urb_info()
4586 	dev_vdbg(hsotg->dev, "  Setup buffer: %p, Setup DMA: %08lx\n",  in dwc2_dump_urb_info()
4588 	dev_vdbg(hsotg->dev, "  Interval: %d\n", urb->interval);  in dwc2_dump_urb_info()
4594 			dev_vdbg(hsotg->dev, "  ISO Desc %d:\n", i);  in dwc2_dump_urb_info()
4595 			dev_vdbg(hsotg->dev, "    offset: %d, length %d\n",  in dwc2_dump_urb_info()
4629 		dev_vdbg(hsotg->dev, "DWC OTG HCD URB Enqueue\n");  in _dwc2_hcd_urb_enqueue()