Lines Matching refs:SC16IS7XX_LCR_REG
38 #define SC16IS7XX_LCR_REG (0x03) /* Line Control */ macro
537 lcr = sc16is7xx_port_read(port, SC16IS7XX_LCR_REG); in sc16is7xx_set_baud()
540 sc16is7xx_port_write(port, SC16IS7XX_LCR_REG, in sc16is7xx_set_baud()
552 sc16is7xx_port_write(port, SC16IS7XX_LCR_REG, lcr); in sc16is7xx_set_baud()
561 sc16is7xx_port_write(port, SC16IS7XX_LCR_REG, in sc16is7xx_set_baud()
571 sc16is7xx_port_write(port, SC16IS7XX_LCR_REG, lcr); in sc16is7xx_set_baud()
1008 sc16is7xx_port_update(port, SC16IS7XX_LCR_REG, in sc16is7xx_break_ctl()
1078 sc16is7xx_port_write(port, SC16IS7XX_LCR_REG, in sc16is7xx_set_termios()
1104 sc16is7xx_port_write(port, SC16IS7XX_LCR_REG, lcr); in sc16is7xx_set_termios()
1166 sc16is7xx_port_write(port, SC16IS7XX_LCR_REG, in sc16is7xx_startup()
1190 sc16is7xx_port_write(port, SC16IS7XX_LCR_REG, SC16IS7XX_LCR_WORD_LEN_8); in sc16is7xx_startup()
1576 sc16is7xx_port_write(&s->p[i].port, SC16IS7XX_LCR_REG, in sc16is7xx_probe()
1588 sc16is7xx_port_write(&s->p[i].port, SC16IS7XX_LCR_REG, 0x00); in sc16is7xx_probe()