Lines Matching +full:rs485 +full:- +full:rts +full:- +full:delay
1 // SPDX-License-Identifier: GPL-2.0+
3 * SC16IS7xx tty serial driver - Copyright (C) 2014 GridPoint
13 #include <linux/delay.h>
46 * - only on 75x/76x
49 * - only on 75x/76x
52 * - only on 75x/76x
55 * - only on 75x/76x
83 /* IER register bits - write only if (EFR[4] == 1) */
96 /* FCR register bits - write only if (EFR[4] == 1) */
106 #define SC16IS7XX_IIR_RTOI_SRC 0x0c /* RX time-out interrupt */
108 * - only on 75x/76x
111 * - only on 75x/76x
123 * 00 -> 5 bit words
124 * 01 -> 6 bit words
125 * 10 -> 7 bit words
126 * 11 -> 8 bit words
131 * 0 -> 1 stop bit
132 * 1 -> 1-1.5 stop bits if
138 #define SC16IS7XX_LCR_FORCEPARITY_BIT (1 << 5) /* 9-bit multidrop parity */
152 * - only on 75x/76x
154 #define SC16IS7XX_MCR_RTS_BIT (1 << 1) /* RTS complement */
158 * - write enabled
162 * - write enabled
166 * - write enabled
185 * - only on 75x/76x
189 * - only on 75x/76x
193 * - only on 75x/76x
197 * - only on 75x/76x
200 * - only on 75x/76x
203 * - only on 75x/76x
212 * no built-in hardware check to make sure this condition is met. Also, the TCR
213 * must be programmed with this condition before auto RTS or software flow
227 * trigger level setting defined in FCR. If TLR has non-zero trigger level value
244 #define SC16IS7XX_EFCR_9BIT_MODE_BIT (1 << 0) /* Enable 9-bit or Multidrop
245 * mode (RS485) */
248 #define SC16IS7XX_EFCR_AUTO_RS485_BIT (1 << 4) /* Auto RS485 RTS direction */
249 #define SC16IS7XX_EFCR_RTS_INVERT_BIT (1 << 5) /* RTS output inversion */
252 * - Only 750/760
254 * - Only 760
258 #define SC16IS7XX_EFR_AUTORTS_BIT (1 << 6) /* Auto RTS flow ctrl enable */
269 * 00 -> no transmitter flow
271 * 01 -> transmitter generates
273 * 10 -> transmitter generates
275 * 11 -> transmitter generates
283 * 00 -> no received flow
285 * 01 -> receiver compares
287 * 10 -> receiver compares
289 * 11 -> receiver compares
368 return one->line; in sc16is7xx_line()
373 struct sc16is7xx_port *s = dev_get_drvdata(port->dev); in sc16is7xx_port_read()
377 regmap_read(s->regmap, (reg << SC16IS7XX_REG_SHIFT) | line, &val); in sc16is7xx_port_read()
384 struct sc16is7xx_port *s = dev_get_drvdata(port->dev); in sc16is7xx_port_write()
387 regmap_write(s->regmap, (reg << SC16IS7XX_REG_SHIFT) | line, val); in sc16is7xx_port_write()
392 struct sc16is7xx_port *s = dev_get_drvdata(port->dev); in sc16is7xx_fifo_read()
396 regcache_cache_bypass(s->regmap, true); in sc16is7xx_fifo_read()
397 regmap_raw_read(s->regmap, addr, s->buf, rxlen); in sc16is7xx_fifo_read()
398 regcache_cache_bypass(s->regmap, false); in sc16is7xx_fifo_read()
403 struct sc16is7xx_port *s = dev_get_drvdata(port->dev); in sc16is7xx_fifo_write()
408 * Don't send zero-length data, at least on SPI it confuses the chip in sc16is7xx_fifo_write()
414 regcache_cache_bypass(s->regmap, true); in sc16is7xx_fifo_write()
415 regmap_raw_write(s->regmap, addr, s->buf, to_send); in sc16is7xx_fifo_write()
416 regcache_cache_bypass(s->regmap, false); in sc16is7xx_fifo_write()
422 struct sc16is7xx_port *s = dev_get_drvdata(port->dev); in sc16is7xx_port_update()
425 regmap_update_bits(s->regmap, (reg << SC16IS7XX_REG_SHIFT) | line, in sc16is7xx_port_update()
512 struct sc16is7xx_port *s = dev_get_drvdata(port->dev); in sc16is7xx_set_baud()
515 unsigned long clk = port->uartclk, div = clk / 16 / baud; in sc16is7xx_set_baud()
535 mutex_lock(&s->efr_lock); in sc16is7xx_set_baud()
544 regcache_cache_bypass(s->regmap, true); in sc16is7xx_set_baud()
549 regcache_cache_bypass(s->regmap, false); in sc16is7xx_set_baud()
554 mutex_unlock(&s->efr_lock); in sc16is7xx_set_baud()
565 regcache_cache_bypass(s->regmap, true); in sc16is7xx_set_baud()
568 regcache_cache_bypass(s->regmap, false); in sc16is7xx_set_baud()
579 struct sc16is7xx_port *s = dev_get_drvdata(port->dev); in sc16is7xx_handle_rx()
584 if (unlikely(rxlen >= sizeof(s->buf))) { in sc16is7xx_handle_rx()
585 dev_warn_ratelimited(port->dev, in sc16is7xx_handle_rx()
587 port->line, rxlen); in sc16is7xx_handle_rx()
588 port->icount.buf_overrun++; in sc16is7xx_handle_rx()
590 rxlen = sizeof(s->buf); in sc16is7xx_handle_rx()
603 s->buf[0] = sc16is7xx_port_read(port, SC16IS7XX_RHR_REG); in sc16is7xx_handle_rx()
612 port->icount.rx++; in sc16is7xx_handle_rx()
617 port->icount.brk++; in sc16is7xx_handle_rx()
621 port->icount.parity++; in sc16is7xx_handle_rx()
623 port->icount.frame++; in sc16is7xx_handle_rx()
625 port->icount.overrun++; in sc16is7xx_handle_rx()
627 lsr &= port->read_status_mask; in sc16is7xx_handle_rx()
639 ch = s->buf[i]; in sc16is7xx_handle_rx()
643 if (lsr & port->ignore_status_mask) in sc16is7xx_handle_rx()
649 rxlen -= bytes_read; in sc16is7xx_handle_rx()
652 tty_flip_buffer_push(&port->state->port); in sc16is7xx_handle_rx()
657 struct sc16is7xx_port *s = dev_get_drvdata(port->dev); in sc16is7xx_handle_tx()
658 struct circ_buf *xmit = &port->state->xmit; in sc16is7xx_handle_tx()
662 if (unlikely(port->x_char)) { in sc16is7xx_handle_tx()
663 sc16is7xx_port_write(port, SC16IS7XX_THR_REG, port->x_char); in sc16is7xx_handle_tx()
664 port->icount.tx++; in sc16is7xx_handle_tx()
665 port->x_char = 0; in sc16is7xx_handle_tx()
670 spin_lock_irqsave(&port->lock, flags); in sc16is7xx_handle_tx()
672 spin_unlock_irqrestore(&port->lock, flags); in sc16is7xx_handle_tx()
682 dev_err_ratelimited(port->dev, in sc16is7xx_handle_tx()
691 s->buf[i] = xmit->buf[xmit->tail]; in sc16is7xx_handle_tx()
698 spin_lock_irqsave(&port->lock, flags); in sc16is7xx_handle_tx()
704 spin_unlock_irqrestore(&port->lock, flags); in sc16is7xx_handle_tx()
721 struct uart_port *port = &one->port; in sc16is7xx_update_mlines()
722 struct sc16is7xx_port *s = dev_get_drvdata(port->dev); in sc16is7xx_update_mlines()
726 lockdep_assert_held_once(&s->efr_lock); in sc16is7xx_update_mlines()
729 changed = status ^ one->old_mctrl; in sc16is7xx_update_mlines()
734 one->old_mctrl = status; in sc16is7xx_update_mlines()
736 spin_lock_irqsave(&port->lock, flags); in sc16is7xx_update_mlines()
738 port->icount.rng++; in sc16is7xx_update_mlines()
740 port->icount.dsr++; in sc16is7xx_update_mlines()
746 wake_up_interruptible(&port->state->port.delta_msr_wait); in sc16is7xx_update_mlines()
747 spin_unlock_irqrestore(&port->lock, flags); in sc16is7xx_update_mlines()
752 struct uart_port *port = &s->p[portno].port; in sc16is7xx_port_irq()
782 dev_err_ratelimited(port->dev, in sc16is7xx_port_irq()
784 port->line, iir); in sc16is7xx_port_irq()
795 mutex_lock(&s->efr_lock); in sc16is7xx_irq()
801 for (i = 0; i < s->devtype->nr_uart; ++i) in sc16is7xx_irq()
807 mutex_unlock(&s->efr_lock); in sc16is7xx_irq()
814 struct uart_port *port = &(to_sc16is7xx_one(ws, tx_work)->port); in sc16is7xx_tx_proc()
815 struct sc16is7xx_port *s = dev_get_drvdata(port->dev); in sc16is7xx_tx_proc()
818 if ((port->rs485.flags & SER_RS485_ENABLED) && in sc16is7xx_tx_proc()
819 (port->rs485.delay_rts_before_send > 0)) in sc16is7xx_tx_proc()
820 msleep(port->rs485.delay_rts_before_send); in sc16is7xx_tx_proc()
822 mutex_lock(&s->efr_lock); in sc16is7xx_tx_proc()
824 mutex_unlock(&s->efr_lock); in sc16is7xx_tx_proc()
826 spin_lock_irqsave(&port->lock, flags); in sc16is7xx_tx_proc()
828 spin_unlock_irqrestore(&port->lock, flags); in sc16is7xx_tx_proc()
836 struct serial_rs485 *rs485 = &port->rs485; in sc16is7xx_reconf_rs485() local
839 spin_lock_irqsave(&port->lock, irqflags); in sc16is7xx_reconf_rs485()
840 if (rs485->flags & SER_RS485_ENABLED) { in sc16is7xx_reconf_rs485()
843 if (rs485->flags & SER_RS485_RTS_AFTER_SEND) in sc16is7xx_reconf_rs485()
846 spin_unlock_irqrestore(&port->lock, irqflags); in sc16is7xx_reconf_rs485()
857 spin_lock_irqsave(&one->port.lock, irqflags); in sc16is7xx_reg_proc()
858 config = one->config; in sc16is7xx_reg_proc()
859 memset(&one->config, 0, sizeof(one->config)); in sc16is7xx_reg_proc()
860 spin_unlock_irqrestore(&one->port.lock, irqflags); in sc16is7xx_reg_proc()
865 /* Device ignores RTS setting when hardware flow is enabled */ in sc16is7xx_reg_proc()
866 if (one->port.mctrl & TIOCM_RTS) in sc16is7xx_reg_proc()
869 if (one->port.mctrl & TIOCM_DTR) in sc16is7xx_reg_proc()
872 if (one->port.mctrl & TIOCM_LOOP) in sc16is7xx_reg_proc()
874 sc16is7xx_port_update(&one->port, SC16IS7XX_MCR_REG, in sc16is7xx_reg_proc()
882 sc16is7xx_port_update(&one->port, SC16IS7XX_IER_REG, in sc16is7xx_reg_proc()
886 sc16is7xx_reconf_rs485(&one->port); in sc16is7xx_reg_proc()
891 struct sc16is7xx_port *s = dev_get_drvdata(port->dev); in sc16is7xx_ier_clear()
894 lockdep_assert_held_once(&port->lock); in sc16is7xx_ier_clear()
896 one->config.flags |= SC16IS7XX_RECONF_IER; in sc16is7xx_ier_clear()
897 one->config.ier_mask |= bit; in sc16is7xx_ier_clear()
898 one->config.ier_val &= ~bit; in sc16is7xx_ier_clear()
899 kthread_queue_work(&s->kworker, &one->reg_work); in sc16is7xx_ier_clear()
904 struct sc16is7xx_port *s = dev_get_drvdata(port->dev); in sc16is7xx_ier_set()
907 lockdep_assert_held_once(&port->lock); in sc16is7xx_ier_set()
909 one->config.flags |= SC16IS7XX_RECONF_IER; in sc16is7xx_ier_set()
910 one->config.ier_mask |= bit; in sc16is7xx_ier_set()
911 one->config.ier_val |= bit; in sc16is7xx_ier_set()
912 kthread_queue_work(&s->kworker, &one->reg_work); in sc16is7xx_ier_set()
928 struct sc16is7xx_port *s = dev_get_drvdata(one->port.dev); in sc16is7xx_ms_proc()
930 if (one->port.state) { in sc16is7xx_ms_proc()
931 mutex_lock(&s->efr_lock); in sc16is7xx_ms_proc()
933 mutex_unlock(&s->efr_lock); in sc16is7xx_ms_proc()
935 kthread_queue_delayed_work(&s->kworker, &one->ms_work, HZ); in sc16is7xx_ms_proc()
942 struct sc16is7xx_port *s = dev_get_drvdata(port->dev); in sc16is7xx_enable_ms()
944 lockdep_assert_held_once(&port->lock); in sc16is7xx_enable_ms()
946 kthread_queue_delayed_work(&s->kworker, &one->ms_work, 0); in sc16is7xx_enable_ms()
951 struct sc16is7xx_port *s = dev_get_drvdata(port->dev); in sc16is7xx_start_tx()
954 kthread_queue_work(&s->kworker, &one->tx_work); in sc16is7xx_start_tx()
962 * Hardware flow control is enabled and thus the device ignores RTS in sc16is7xx_throttle()
964 * AutoRTS feature will de-activate RTS output. in sc16is7xx_throttle()
966 spin_lock_irqsave(&port->lock, flags); in sc16is7xx_throttle()
968 spin_unlock_irqrestore(&port->lock, flags); in sc16is7xx_throttle()
975 spin_lock_irqsave(&port->lock, flags); in sc16is7xx_unthrottle()
977 spin_unlock_irqrestore(&port->lock, flags); in sc16is7xx_unthrottle()
994 return one->old_mctrl; in sc16is7xx_get_mctrl()
999 struct sc16is7xx_port *s = dev_get_drvdata(port->dev); in sc16is7xx_set_mctrl()
1002 one->config.flags |= SC16IS7XX_RECONF_MD; in sc16is7xx_set_mctrl()
1003 kthread_queue_work(&s->kworker, &one->reg_work); in sc16is7xx_set_mctrl()
1017 struct sc16is7xx_port *s = dev_get_drvdata(port->dev); in sc16is7xx_set_termios()
1023 kthread_cancel_delayed_work_sync(&one->ms_work); in sc16is7xx_set_termios()
1026 termios->c_cflag &= ~CMSPAR; in sc16is7xx_set_termios()
1029 switch (termios->c_cflag & CSIZE) { in sc16is7xx_set_termios()
1044 termios->c_cflag &= ~CSIZE; in sc16is7xx_set_termios()
1045 termios->c_cflag |= CS8; in sc16is7xx_set_termios()
1050 if (termios->c_cflag & PARENB) { in sc16is7xx_set_termios()
1052 if (!(termios->c_cflag & PARODD)) in sc16is7xx_set_termios()
1057 if (termios->c_cflag & CSTOPB) in sc16is7xx_set_termios()
1061 port->read_status_mask = SC16IS7XX_LSR_OE_BIT; in sc16is7xx_set_termios()
1062 if (termios->c_iflag & INPCK) in sc16is7xx_set_termios()
1063 port->read_status_mask |= SC16IS7XX_LSR_PE_BIT | in sc16is7xx_set_termios()
1065 if (termios->c_iflag & (BRKINT | PARMRK)) in sc16is7xx_set_termios()
1066 port->read_status_mask |= SC16IS7XX_LSR_BI_BIT; in sc16is7xx_set_termios()
1069 port->ignore_status_mask = 0; in sc16is7xx_set_termios()
1070 if (termios->c_iflag & IGNBRK) in sc16is7xx_set_termios()
1071 port->ignore_status_mask |= SC16IS7XX_LSR_BI_BIT; in sc16is7xx_set_termios()
1072 if (!(termios->c_cflag & CREAD)) in sc16is7xx_set_termios()
1073 port->ignore_status_mask |= SC16IS7XX_LSR_BRK_ERROR_MASK; in sc16is7xx_set_termios()
1076 mutex_lock(&s->efr_lock); in sc16is7xx_set_termios()
1082 regcache_cache_bypass(s->regmap, true); in sc16is7xx_set_termios()
1083 sc16is7xx_port_write(port, SC16IS7XX_XON1_REG, termios->c_cc[VSTART]); in sc16is7xx_set_termios()
1084 sc16is7xx_port_write(port, SC16IS7XX_XOFF1_REG, termios->c_cc[VSTOP]); in sc16is7xx_set_termios()
1086 port->status &= ~(UPSTAT_AUTOCTS | UPSTAT_AUTORTS); in sc16is7xx_set_termios()
1087 if (termios->c_cflag & CRTSCTS) { in sc16is7xx_set_termios()
1090 port->status |= UPSTAT_AUTOCTS | UPSTAT_AUTORTS; in sc16is7xx_set_termios()
1092 if (termios->c_iflag & IXON) in sc16is7xx_set_termios()
1094 if (termios->c_iflag & IXOFF) in sc16is7xx_set_termios()
1101 regcache_cache_bypass(s->regmap, false); in sc16is7xx_set_termios()
1106 mutex_unlock(&s->efr_lock); in sc16is7xx_set_termios()
1110 port->uartclk / 16 / 4 / 0xffff, in sc16is7xx_set_termios()
1111 port->uartclk / 16); in sc16is7xx_set_termios()
1116 spin_lock_irqsave(&port->lock, flags); in sc16is7xx_set_termios()
1119 uart_update_timeout(port, termios->c_cflag, baud); in sc16is7xx_set_termios()
1121 if (UART_ENABLE_MS(port, termios->c_cflag)) in sc16is7xx_set_termios()
1124 spin_unlock_irqrestore(&port->lock, flags); in sc16is7xx_set_termios()
1128 struct serial_rs485 *rs485) in sc16is7xx_config_rs485() argument
1130 struct sc16is7xx_port *s = dev_get_drvdata(port->dev); in sc16is7xx_config_rs485()
1133 if (rs485->flags & SER_RS485_ENABLED) { in sc16is7xx_config_rs485()
1135 * RTS signal is handled by HW, it's timing can't be influenced. in sc16is7xx_config_rs485()
1136 * However, it's sometimes useful to delay TX even without RTS in sc16is7xx_config_rs485()
1139 if (rs485->delay_rts_after_send) in sc16is7xx_config_rs485()
1140 return -EINVAL; in sc16is7xx_config_rs485()
1143 one->config.flags |= SC16IS7XX_RECONF_RS485; in sc16is7xx_config_rs485()
1144 kthread_queue_work(&s->kworker, &one->reg_work); in sc16is7xx_config_rs485()
1152 struct sc16is7xx_port *s = dev_get_drvdata(port->dev); in sc16is7xx_startup()
1169 regcache_cache_bypass(s->regmap, true); in sc16is7xx_startup()
1187 regcache_cache_bypass(s->regmap, false); in sc16is7xx_startup()
1196 one->irda_mode ? in sc16is7xx_startup()
1211 spin_lock_irqsave(&port->lock, flags); in sc16is7xx_startup()
1213 spin_unlock_irqrestore(&port->lock, flags); in sc16is7xx_startup()
1220 struct sc16is7xx_port *s = dev_get_drvdata(port->dev); in sc16is7xx_shutdown()
1223 kthread_cancel_delayed_work_sync(&one->ms_work); in sc16is7xx_shutdown()
1236 kthread_flush_worker(&s->kworker); in sc16is7xx_shutdown()
1241 struct sc16is7xx_port *s = dev_get_drvdata(port->dev); in sc16is7xx_type()
1243 return (port->type == PORT_SC16IS7XX) ? s->devtype->name : NULL; in sc16is7xx_type()
1255 port->type = PORT_SC16IS7XX; in sc16is7xx_config_port()
1261 if ((s->type != PORT_UNKNOWN) && (s->type != PORT_SC16IS7XX)) in sc16is7xx_verify_port()
1262 return -EINVAL; in sc16is7xx_verify_port()
1263 if (s->irq != port->irq) in sc16is7xx_verify_port()
1264 return -EINVAL; in sc16is7xx_verify_port()
1307 struct uart_port *port = &s->p[0].port; in sc16is7xx_gpio_get()
1317 struct uart_port *port = &s->p[0].port; in sc16is7xx_gpio_set()
1327 struct uart_port *port = &s->p[0].port; in sc16is7xx_gpio_direction_input()
1338 struct uart_port *port = &s->p[0].port; in sc16is7xx_gpio_direction_output()
1367 *valid_mask = s->gpio_valid_mask; in sc16is7xx_gpio_init_valid_mask()
1374 struct device *dev = s->p[0].port.dev; in sc16is7xx_setup_gpio_chip()
1376 if (!s->devtype->nr_gpio) in sc16is7xx_setup_gpio_chip()
1379 switch (s->mctrl_mask) { in sc16is7xx_setup_gpio_chip()
1381 s->gpio_valid_mask = GENMASK(7, 0); in sc16is7xx_setup_gpio_chip()
1384 s->gpio_valid_mask = GENMASK(3, 0); in sc16is7xx_setup_gpio_chip()
1387 s->gpio_valid_mask = GENMASK(7, 4); in sc16is7xx_setup_gpio_chip()
1393 if (s->gpio_valid_mask == 0) in sc16is7xx_setup_gpio_chip()
1396 s->gpio.owner = THIS_MODULE; in sc16is7xx_setup_gpio_chip()
1397 s->gpio.parent = dev; in sc16is7xx_setup_gpio_chip()
1398 s->gpio.label = dev_name(dev); in sc16is7xx_setup_gpio_chip()
1399 s->gpio.init_valid_mask = sc16is7xx_gpio_init_valid_mask; in sc16is7xx_setup_gpio_chip()
1400 s->gpio.direction_input = sc16is7xx_gpio_direction_input; in sc16is7xx_setup_gpio_chip()
1401 s->gpio.get = sc16is7xx_gpio_get; in sc16is7xx_setup_gpio_chip()
1402 s->gpio.direction_output = sc16is7xx_gpio_direction_output; in sc16is7xx_setup_gpio_chip()
1403 s->gpio.set = sc16is7xx_gpio_set; in sc16is7xx_setup_gpio_chip()
1404 s->gpio.base = -1; in sc16is7xx_setup_gpio_chip()
1405 s->gpio.ngpio = s->devtype->nr_gpio; in sc16is7xx_setup_gpio_chip()
1406 s->gpio.can_sleep = 1; in sc16is7xx_setup_gpio_chip()
1408 return gpiochip_add_data(&s->gpio, s); in sc16is7xx_setup_gpio_chip()
1421 struct device *dev = s->p[0].port.dev; in sc16is7xx_setup_mctrl_ports()
1423 count = device_property_count_u32(dev, "nxp,modem-control-line-ports"); in sc16is7xx_setup_mctrl_ports()
1427 ret = device_property_read_u32_array(dev, "nxp,modem-control-line-ports", in sc16is7xx_setup_mctrl_ports()
1432 s->mctrl_mask = 0; in sc16is7xx_setup_mctrl_ports()
1437 s->mctrl_mask |= SC16IS7XX_IOCONTROL_MODEM_A_BIT; in sc16is7xx_setup_mctrl_ports()
1439 s->mctrl_mask |= SC16IS7XX_IOCONTROL_MODEM_B_BIT; in sc16is7xx_setup_mctrl_ports()
1442 if (s->mctrl_mask) in sc16is7xx_setup_mctrl_ports()
1444 s->regmap, in sc16is7xx_setup_mctrl_ports()
1447 SC16IS7XX_IOCONTROL_MODEM_B_BIT, s->mctrl_mask); in sc16is7xx_setup_mctrl_ports()
1455 .delay_rts_after_send = 1, /* Not supported but keep returning -EINVAL */
1479 return -EPROBE_DEFER; in sc16is7xx_probe()
1482 s = devm_kzalloc(dev, struct_size(s, p, devtype->nr_uart), GFP_KERNEL); in sc16is7xx_probe()
1485 return -ENOMEM; in sc16is7xx_probe()
1489 device_property_read_u32(dev, "clock-frequency", &uartclk); in sc16is7xx_probe()
1491 s->clk = devm_clk_get_optional(dev, NULL); in sc16is7xx_probe()
1492 if (IS_ERR(s->clk)) in sc16is7xx_probe()
1493 return PTR_ERR(s->clk); in sc16is7xx_probe()
1495 ret = clk_prepare_enable(s->clk); in sc16is7xx_probe()
1499 freq = clk_get_rate(s->clk); in sc16is7xx_probe()
1508 return -EINVAL; in sc16is7xx_probe()
1511 s->regmap = regmap; in sc16is7xx_probe()
1512 s->devtype = devtype; in sc16is7xx_probe()
1514 mutex_init(&s->efr_lock); in sc16is7xx_probe()
1516 kthread_init_worker(&s->kworker); in sc16is7xx_probe()
1517 s->kworker_task = kthread_run(kthread_worker_fn, &s->kworker, in sc16is7xx_probe()
1519 if (IS_ERR(s->kworker_task)) { in sc16is7xx_probe()
1520 ret = PTR_ERR(s->kworker_task); in sc16is7xx_probe()
1523 sched_set_fifo(s->kworker_task); in sc16is7xx_probe()
1526 regmap_write(s->regmap, SC16IS7XX_IOCONTROL_REG << SC16IS7XX_REG_SHIFT, in sc16is7xx_probe()
1529 for (i = 0; i < devtype->nr_uart; ++i) { in sc16is7xx_probe()
1530 s->p[i].line = i; in sc16is7xx_probe()
1532 s->p[i].port.dev = dev; in sc16is7xx_probe()
1533 s->p[i].port.irq = irq; in sc16is7xx_probe()
1534 s->p[i].port.type = PORT_SC16IS7XX; in sc16is7xx_probe()
1535 s->p[i].port.fifosize = SC16IS7XX_FIFO_SIZE; in sc16is7xx_probe()
1536 s->p[i].port.flags = UPF_FIXED_TYPE | UPF_LOW_LATENCY; in sc16is7xx_probe()
1537 s->p[i].port.iobase = i; in sc16is7xx_probe()
1543 s->p[i].port.membase = (void __iomem *)~0; in sc16is7xx_probe()
1544 s->p[i].port.iotype = UPIO_PORT; in sc16is7xx_probe()
1545 s->p[i].port.uartclk = freq; in sc16is7xx_probe()
1546 s->p[i].port.rs485_config = sc16is7xx_config_rs485; in sc16is7xx_probe()
1547 s->p[i].port.rs485_supported = sc16is7xx_rs485_supported; in sc16is7xx_probe()
1548 s->p[i].port.ops = &sc16is7xx_ops; in sc16is7xx_probe()
1549 s->p[i].old_mctrl = 0; in sc16is7xx_probe()
1550 s->p[i].port.line = sc16is7xx_alloc_line(); in sc16is7xx_probe()
1552 if (s->p[i].port.line >= SC16IS7XX_MAX_DEVS) { in sc16is7xx_probe()
1553 ret = -ENOMEM; in sc16is7xx_probe()
1557 ret = uart_get_rs485_mode(&s->p[i].port); in sc16is7xx_probe()
1562 sc16is7xx_port_write(&s->p[i].port, SC16IS7XX_IER_REG, 0); in sc16is7xx_probe()
1564 sc16is7xx_port_write(&s->p[i].port, SC16IS7XX_EFCR_REG, in sc16is7xx_probe()
1569 kthread_init_work(&s->p[i].tx_work, sc16is7xx_tx_proc); in sc16is7xx_probe()
1570 kthread_init_work(&s->p[i].reg_work, sc16is7xx_reg_proc); in sc16is7xx_probe()
1571 kthread_init_delayed_work(&s->p[i].ms_work, sc16is7xx_ms_proc); in sc16is7xx_probe()
1573 uart_add_one_port(&sc16is7xx_uart, &s->p[i].port); in sc16is7xx_probe()
1576 sc16is7xx_port_write(&s->p[i].port, SC16IS7XX_LCR_REG, in sc16is7xx_probe()
1579 regcache_cache_bypass(s->regmap, true); in sc16is7xx_probe()
1582 sc16is7xx_port_write(&s->p[i].port, SC16IS7XX_EFR_REG, in sc16is7xx_probe()
1585 regcache_cache_bypass(s->regmap, false); in sc16is7xx_probe()
1588 sc16is7xx_port_write(&s->p[i].port, SC16IS7XX_LCR_REG, 0x00); in sc16is7xx_probe()
1591 sc16is7xx_power(&s->p[i].port, 0); in sc16is7xx_probe()
1594 if (dev->of_node) { in sc16is7xx_probe()
1599 of_property_for_each_u32(dev->of_node, "irda-mode-ports", in sc16is7xx_probe()
1601 if (u < devtype->nr_uart) in sc16is7xx_probe()
1602 s->p[u].irda_mode = true; in sc16is7xx_probe()
1619 * back to a non-shared falling-edge trigger. in sc16is7xx_probe()
1635 if (s->gpio_valid_mask) in sc16is7xx_probe()
1636 gpiochip_remove(&s->gpio); in sc16is7xx_probe()
1640 for (i--; i >= 0; i--) { in sc16is7xx_probe()
1641 uart_remove_one_port(&sc16is7xx_uart, &s->p[i].port); in sc16is7xx_probe()
1642 clear_bit(s->p[i].port.line, &sc16is7xx_lines); in sc16is7xx_probe()
1645 kthread_stop(s->kworker_task); in sc16is7xx_probe()
1648 clk_disable_unprepare(s->clk); in sc16is7xx_probe()
1659 if (s->gpio_valid_mask) in sc16is7xx_remove()
1660 gpiochip_remove(&s->gpio); in sc16is7xx_remove()
1663 for (i = 0; i < s->devtype->nr_uart; i++) { in sc16is7xx_remove()
1664 kthread_cancel_delayed_work_sync(&s->p[i].ms_work); in sc16is7xx_remove()
1665 uart_remove_one_port(&sc16is7xx_uart, &s->p[i].port); in sc16is7xx_remove()
1666 clear_bit(s->p[i].port.line, &sc16is7xx_lines); in sc16is7xx_remove()
1667 sc16is7xx_power(&s->p[i].port, 0); in sc16is7xx_remove()
1670 kthread_flush_worker(&s->kworker); in sc16is7xx_remove()
1671 kthread_stop(s->kworker_task); in sc16is7xx_remove()
1673 clk_disable_unprepare(s->clk); in sc16is7xx_remove()
1704 spi->bits_per_word = 8; in sc16is7xx_spi_probe()
1706 spi->mode = spi->mode ? : SPI_MODE_0; in sc16is7xx_spi_probe()
1707 spi->max_speed_hz = spi->max_speed_hz ? : 15000000; in sc16is7xx_spi_probe()
1712 if (spi->dev.of_node) { in sc16is7xx_spi_probe()
1713 devtype = device_get_match_data(&spi->dev); in sc16is7xx_spi_probe()
1715 return -ENODEV; in sc16is7xx_spi_probe()
1719 devtype = (struct sc16is7xx_devtype *)id_entry->driver_data; in sc16is7xx_spi_probe()
1723 (devtype->nr_uart - 1); in sc16is7xx_spi_probe()
1726 return sc16is7xx_probe(&spi->dev, devtype, regmap, spi->irq); in sc16is7xx_spi_probe()
1731 sc16is7xx_remove(&spi->dev); in sc16is7xx_spi_remove()
1767 if (i2c->dev.of_node) { in sc16is7xx_i2c_probe()
1768 devtype = device_get_match_data(&i2c->dev); in sc16is7xx_i2c_probe()
1770 return -ENODEV; in sc16is7xx_i2c_probe()
1772 devtype = (struct sc16is7xx_devtype *)id->driver_data; in sc16is7xx_i2c_probe()
1776 (devtype->nr_uart - 1); in sc16is7xx_i2c_probe()
1779 return sc16is7xx_probe(&i2c->dev, devtype, regmap, i2c->irq); in sc16is7xx_i2c_probe()
1784 sc16is7xx_remove(&client->dev); in sc16is7xx_i2c_remove()
1824 pr_err("failed to init sc16is7xx i2c --> %d\n", ret); in sc16is7xx_init()
1832 pr_err("failed to init sc16is7xx spi --> %d\n", ret); in sc16is7xx_init()