190 void msm_write(struct uart_port *port, unsigned int val, unsigned int off)  in msm_write()  function
206 	msm_write(port, 0x06, MSM_UART_MREG);  in msm_serial_set_mnd_regs_tcxo()
207 	msm_write(port, 0xF1, MSM_UART_NREG);  in msm_serial_set_mnd_regs_tcxo()
208 	msm_write(port, 0x0F, MSM_UART_DREG);  in msm_serial_set_mnd_regs_tcxo()
209 	msm_write(port, 0x1A, MSM_UART_MNDREG);  in msm_serial_set_mnd_regs_tcxo()
218 	msm_write(port, 0x18, MSM_UART_MREG);  in msm_serial_set_mnd_regs_tcxoby4()
219 	msm_write(port, 0xF6, MSM_UART_NREG);  in msm_serial_set_mnd_regs_tcxoby4()
220 	msm_write(port, 0x0F, MSM_UART_DREG);  in msm_serial_set_mnd_regs_tcxoby4()
221 	msm_write(port, 0x0A, MSM_UART_MNDREG);  in msm_serial_set_mnd_regs_tcxoby4()
265 	msm_write(port, val, UARTDM_DMEN);  in msm_stop_dma()
405 	msm_write(port, MSM_UART_CR_CMD_RESET_TX_READY, MSM_UART_CR);  in msm_wait_for_xmitr()
413 	msm_write(port, msm_port->imr, MSM_UART_IMR);  in msm_stop_tx()
426 	msm_write(port, msm_port->imr, MSM_UART_IMR);  in msm_start_tx()
432 	msm_write(port, count, UARTDM_NCF_TX);  in msm_reset_dm_count()
459 	msm_write(port, val, UARTDM_DMEN);  in msm_complete_tx_dma()
462 		msm_write(port, MSM_UART_CR_CMD_RESET_TX, MSM_UART_CR);  in msm_complete_tx_dma()
463 		msm_write(port, MSM_UART_CR_TX_ENABLE, MSM_UART_CR);  in msm_complete_tx_dma()
472 	msm_write(port, msm_port->imr, MSM_UART_IMR);  in msm_complete_tx_dma()
520 	msm_write(port, msm_port->imr, MSM_UART_IMR);  in msm_handle_tx_dma()
528 		msm_write(port, val, UARTDM_DMEN);  in msm_handle_tx_dma()
533 		msm_write(port, val, UARTDM_DMEN);  in msm_handle_tx_dma()
560 	msm_write(port, val, UARTDM_DMEN);  in msm_complete_rx_dma()
565 		msm_write(port, MSM_UART_CR_CMD_RESET_ERR, MSM_UART_CR);  in msm_complete_rx_dma()
650 	msm_write(uart, msm_port->imr, MSM_UART_IMR);  in msm_start_rx_dma()
656 	msm_write(uart, MSM_UART_CR_CMD_RESET_STALE_INT, MSM_UART_CR);  in msm_start_rx_dma()
657 	msm_write(uart, MSM_UART_CR_CMD_STALE_EVENT_ENABLE, MSM_UART_CR);  in msm_start_rx_dma()
663 		msm_write(uart, val, UARTDM_DMEN);  in msm_start_rx_dma()
665 	msm_write(uart, UARTDM_RX_SIZE, UARTDM_DMRX);  in msm_start_rx_dma()
668 		msm_write(uart, val, UARTDM_DMEN);  in msm_start_rx_dma()
679 	msm_write(uart, MSM_UART_CR_CMD_RESET_RX, MSM_UART_CR);  in msm_start_rx_dma()
680 	msm_write(uart, MSM_UART_CR_RX_ENABLE, MSM_UART_CR);  in msm_start_rx_dma()
682 	msm_write(uart, MSM_UART_CR_CMD_RESET_STALE_INT, MSM_UART_CR);  in msm_start_rx_dma()
683 	msm_write(uart, 0xFFFFFF, UARTDM_DMRX);  in msm_start_rx_dma()
684 	msm_write(uart, MSM_UART_CR_CMD_STALE_EVENT_ENABLE, MSM_UART_CR);  in msm_start_rx_dma()
688 	msm_write(uart, msm_port->imr, MSM_UART_IMR);  in msm_start_rx_dma()
697 	msm_write(port, msm_port->imr, MSM_UART_IMR);  in msm_stop_rx()
708 	msm_write(port, msm_port->imr, MSM_UART_IMR);  in msm_enable_ms()
722 		msm_write(port, MSM_UART_CR_CMD_RESET_ERR, MSM_UART_CR);  in msm_handle_rx_dm()
777 		msm_write(port, MSM_UART_CR_CMD_RESET_STALE_INT, MSM_UART_CR);  in msm_handle_rx_dm()
778 	msm_write(port, 0xFFFFFF, UARTDM_DMRX);  in msm_handle_rx_dm()
779 	msm_write(port, MSM_UART_CR_CMD_STALE_EVENT_ENABLE, MSM_UART_CR);  in msm_handle_rx_dm()
798 		msm_write(port, MSM_UART_CR_CMD_RESET_ERR, MSM_UART_CR);  in msm_handle_rx()
940 	msm_write(port, MSM_UART_CR_CMD_RESET_CTS, MSM_UART_CR);  in msm_handle_delta_cts()
956 	msm_write(port, 0, MSM_UART_IMR); /* disable interrupt */  in msm_uart_irq()
960 		msm_write(port, MSM_UART_CR_CMD_RESET_RXBREAK_START, MSM_UART_CR);  in msm_uart_irq()
966 			msm_write(port, val, MSM_UART_CR);  in msm_uart_irq()
968 			msm_write(port, val, MSM_UART_CR);  in msm_uart_irq()
985 	msm_write(port, msm_port->imr, MSM_UART_IMR); /* restore interrupt */  in msm_uart_irq()
1007 	msm_write(port, MSM_UART_CR_CMD_RESET_RX, MSM_UART_CR);  in msm_reset()
1008 	msm_write(port, MSM_UART_CR_CMD_RESET_TX, MSM_UART_CR);  in msm_reset()
1009 	msm_write(port, MSM_UART_CR_CMD_RESET_ERR, MSM_UART_CR);  in msm_reset()
1010 	msm_write(port, MSM_UART_CR_CMD_RESET_BREAK_INT, MSM_UART_CR);  in msm_reset()
1011 	msm_write(port, MSM_UART_CR_CMD_RESET_CTS, MSM_UART_CR);  in msm_reset()
1012 	msm_write(port, MSM_UART_CR_CMD_RESET_RFR, MSM_UART_CR);  in msm_reset()
1015 	msm_write(port, mr, MSM_UART_MR1);  in msm_reset()
1019 		msm_write(port, 0, UARTDM_DMEN);  in msm_reset()
1030 		msm_write(port, mr, MSM_UART_MR1);  in msm_set_mctrl()
1031 		msm_write(port, MSM_UART_CR_CMD_RESET_RFR, MSM_UART_CR);  in msm_set_mctrl()
1034 		msm_write(port, mr, MSM_UART_MR1);  in msm_set_mctrl()
1041 		msm_write(port, MSM_UART_CR_CMD_START_BREAK, MSM_UART_CR);  in msm_break_ctl()
1043 		msm_write(port, MSM_UART_CR_CMD_STOP_BREAK, MSM_UART_CR);  in msm_break_ctl()
1141 	msm_write(port, entry->code, MSM_UART_CSR);  in msm_set_baud_rate()
1155 	msm_write(port, watermark, MSM_UART_IPR);  in msm_set_baud_rate()
1159 	msm_write(port, watermark, MSM_UART_RFWR);  in msm_set_baud_rate()
1162 	msm_write(port, 10, MSM_UART_TFWR);  in msm_set_baud_rate()
1164 	msm_write(port, MSM_UART_CR_CMD_PROTECTION_EN, MSM_UART_CR);  in msm_set_baud_rate()
1168 	msm_write(port, MSM_UART_CR_TX_ENABLE | MSM_UART_CR_RX_ENABLE, MSM_UART_CR);  in msm_set_baud_rate()
1174 	msm_write(port, msm_port->imr, MSM_UART_IMR);  in msm_set_baud_rate()
1177 		msm_write(port, MSM_UART_CR_CMD_RESET_STALE_INT, MSM_UART_CR);  in msm_set_baud_rate()
1178 		msm_write(port, 0xFFFFFF, UARTDM_DMRX);  in msm_set_baud_rate()
1179 		msm_write(port, MSM_UART_CR_CMD_STALE_EVENT_ENABLE, MSM_UART_CR);  in msm_set_baud_rate()
1222 	msm_write(port, data, MSM_UART_MR1);  in msm_startup()
1251 	msm_write(port, 0, MSM_UART_IMR); /* disable interrupts */  in msm_shutdown()
1318 	msm_write(port, mr, MSM_UART_MR2);  in msm_set_termios()
1327 	msm_write(port, mr, MSM_UART_MR1);  in msm_set_termios()
1466 			msm_write(port, MSM_UART_CR_CMD_FORCE_STALE, MSM_UART_CR);  in msm_poll_get_char_dm()
1470 			msm_write(port, MSM_UART_CR_CMD_RESET_STALE_INT, MSM_UART_CR);  in msm_poll_get_char_dm()
1471 			msm_write(port, 0xFFFFFF, UARTDM_DMRX);  in msm_poll_get_char_dm()
1472 			msm_write(port, MSM_UART_CR_CMD_STALE_EVENT_ENABLE, MSM_UART_CR);  in msm_poll_get_char_dm()
1494 	msm_write(port, 0, MSM_UART_IMR);  in msm_poll_get_char()
1502 	msm_write(port, imr, MSM_UART_IMR);  in msm_poll_get_char()
1514 	msm_write(port, 0, MSM_UART_IMR);  in msm_poll_put_char()
1524 	msm_write(port, c, msm_port->is_uartdm ? UARTDM_TF : MSM_UART_TF);  in msm_poll_put_char()
1531 	msm_write(port, imr, MSM_UART_IMR);  in msm_poll_put_char()