45 #define USR2  0x98 /* Status Register 2 */  macro
346 	 * all FIFOs and register USR1, USR2, UBIR, UBMR, UBRC, URXD, UTXD  in imx_uart_soft_reset()
349 	 * We don't need to restore the old values from USR1, USR2, URXD and  in imx_uart_soft_reset()
409 	u32 ucr1, ucr4, usr2;  in imx_uart_stop_tx()  local
424 	usr2 = imx_uart_readl(sport, USR2);  in imx_uart_stop_tx()
425 	if (!(usr2 & USR2_TXDC)) {  in imx_uart_stop_tx()
800 static void imx_uart_check_flood(struct imx_port *sport, u32 usr2)  in imx_uart_check_flood()  argument
825 	if (usr2 & USR2_WAKE) {  in imx_uart_check_flood()
826 		imx_uart_writel(sport, USR2_WAKE, USR2);  in imx_uart_check_flood()
838 	u32 usr2, rx;  in __imx_uart_rxint()  local
841 	usr2 = imx_uart_readl(sport, USR2);  in __imx_uart_rxint()
842 	if (usr2 & USR2_RDR)  in __imx_uart_rxint()
843 		imx_uart_check_flood(sport, usr2);  in __imx_uart_rxint()
916 	unsigned usr2 = imx_uart_readl(sport, USR2);  in imx_uart_get_hwmctrl()  local
922 	if (!(usr2 & USR2_DCDIN))  in imx_uart_get_hwmctrl()
926 		if (!(imx_uart_readl(sport, USR2) & USR2_RIIN))  in imx_uart_get_hwmctrl()
962 	unsigned int usr1, usr2, ucr1, ucr2, ucr3, ucr4;  in imx_uart_int()  local
968 	usr2 = imx_uart_readl(sport, USR2);  in imx_uart_int()
989 		usr2 &= ~USR2_TXDC;  in imx_uart_int()
997 		usr2 &= ~USR2_ORE;  in imx_uart_int()
1006 	if ((usr1 & USR1_TRDY) || (usr2 & USR2_TXDC)) {  in imx_uart_int()
1029 	if (usr2 & USR2_ORE) {  in imx_uart_int()
1031 		imx_uart_writel(sport, USR2_ORE, USR2);  in imx_uart_int()
1048 	ret = (imx_uart_readl(sport, USR2) & USR2_TXDC) ?  TIOCSER_TEMT : 0;  in imx_uart_tx_empty()
1204 		imx_uart_check_flood(sport, imx_uart_readl(sport, USR2));  in imx_uart_dma_rx_callback()
1276 	u32 usr1, usr2;  in imx_uart_clear_rx_errors()  local
1279 	usr2 = imx_uart_readl(sport, USR2);  in imx_uart_clear_rx_errors()
1281 	if (usr2 & USR2_BRCD) {  in imx_uart_clear_rx_errors()
1283 		imx_uart_writel(sport, USR2_BRCD, USR2);  in imx_uart_clear_rx_errors()
1298 	if (usr2 & USR2_ORE) {  in imx_uart_clear_rx_errors()
1300 		imx_uart_writel(sport, USR2_ORE, USR2);  in imx_uart_clear_rx_errors()
1472 	imx_uart_writel(sport, USR2_ORE, USR2);  in imx_uart_startup()
1897 	if (!(imx_uart_readl(sport, USR2) & USR2_RDR))  in imx_uart_poll_get_char()
1918 		status = imx_uart_readl(sport, USR2);  in imx_uart_poll_put_char()
2033 	while (!(imx_uart_readl(sport, USR2) & USR2_TXDC));  in imx_uart_console_write()