Lines Matching refs:uap
277 static unsigned int pl011_reg_to_offset(const struct uart_amba_port *uap, in pl011_reg_to_offset() argument
280 return uap->reg_offset[reg]; in pl011_reg_to_offset()
283 static unsigned int pl011_read(const struct uart_amba_port *uap, in pl011_read() argument
286 void __iomem *addr = uap->port.membase + pl011_reg_to_offset(uap, reg); in pl011_read()
288 return (uap->port.iotype == UPIO_MEM32) ? in pl011_read()
292 static void pl011_write(unsigned int val, const struct uart_amba_port *uap, in pl011_write() argument
295 void __iomem *addr = uap->port.membase + pl011_reg_to_offset(uap, reg); in pl011_write()
297 if (uap->port.iotype == UPIO_MEM32) in pl011_write()
308 static int pl011_fifo_to_tty(struct uart_amba_port *uap) in pl011_fifo_to_tty() argument
316 status = pl011_read(uap, REG_FR); in pl011_fifo_to_tty()
321 ch = pl011_read(uap, REG_DR) | UART_DUMMY_DR_RX; in pl011_fifo_to_tty()
323 uap->port.icount.rx++; in pl011_fifo_to_tty()
328 uap->port.icount.brk++; in pl011_fifo_to_tty()
329 if (uart_handle_break(&uap->port)) in pl011_fifo_to_tty()
332 uap->port.icount.parity++; in pl011_fifo_to_tty()
334 uap->port.icount.frame++; in pl011_fifo_to_tty()
336 uap->port.icount.overrun++; in pl011_fifo_to_tty()
338 ch &= uap->port.read_status_mask; in pl011_fifo_to_tty()
348 spin_unlock(&uap->port.lock); in pl011_fifo_to_tty()
349 sysrq = uart_handle_sysrq_char(&uap->port, ch & 255); in pl011_fifo_to_tty()
350 spin_lock(&uap->port.lock); in pl011_fifo_to_tty()
353 uart_insert_char(&uap->port, ch, UART011_DR_OE, ch, flag); in pl011_fifo_to_tty()
398 static void pl011_dma_probe(struct uart_amba_port *uap) in pl011_dma_probe() argument
401 struct amba_pl011_data *plat = dev_get_platdata(uap->port.dev); in pl011_dma_probe()
402 struct device *dev = uap->port.dev; in pl011_dma_probe()
404 .dst_addr = uap->port.mapbase + in pl011_dma_probe()
405 pl011_reg_to_offset(uap, REG_DR), in pl011_dma_probe()
408 .dst_maxburst = uap->fifosize >> 1, in pl011_dma_probe()
414 uap->dma_probed = true; in pl011_dma_probe()
418 uap->dma_probed = false; in pl011_dma_probe()
424 dev_info(uap->port.dev, "no DMA platform data\n"); in pl011_dma_probe()
435 dev_err(uap->port.dev, "no TX DMA channel!\n"); in pl011_dma_probe()
441 uap->dmatx.chan = chan; in pl011_dma_probe()
443 dev_info(uap->port.dev, "DMA channel TX %s\n", in pl011_dma_probe()
444 dma_chan_name(uap->dmatx.chan)); in pl011_dma_probe()
453 dev_err(uap->port.dev, "no RX DMA channel!\n"); in pl011_dma_probe()
460 .src_addr = uap->port.mapbase + in pl011_dma_probe()
461 pl011_reg_to_offset(uap, REG_DR), in pl011_dma_probe()
464 .src_maxburst = uap->fifosize >> 2, in pl011_dma_probe()
478 dev_info(uap->port.dev, in pl011_dma_probe()
484 uap->dmarx.chan = chan; in pl011_dma_probe()
486 uap->dmarx.auto_poll_rate = false; in pl011_dma_probe()
490 uap->dmarx.auto_poll_rate = false; in pl011_dma_probe()
491 uap->dmarx.poll_rate = plat->dma_rx_poll_rate; in pl011_dma_probe()
498 uap->dmarx.auto_poll_rate = true; in pl011_dma_probe()
499 uap->dmarx.poll_rate = 100; in pl011_dma_probe()
503 uap->dmarx.poll_timeout = in pl011_dma_probe()
506 uap->dmarx.poll_timeout = 3000; in pl011_dma_probe()
508 uap->dmarx.auto_poll_rate = of_property_read_bool( in pl011_dma_probe()
510 if (uap->dmarx.auto_poll_rate) { in pl011_dma_probe()
515 uap->dmarx.poll_rate = x; in pl011_dma_probe()
517 uap->dmarx.poll_rate = 100; in pl011_dma_probe()
520 uap->dmarx.poll_timeout = x; in pl011_dma_probe()
522 uap->dmarx.poll_timeout = 3000; in pl011_dma_probe()
525 dev_info(uap->port.dev, "DMA channel RX %s\n", in pl011_dma_probe()
526 dma_chan_name(uap->dmarx.chan)); in pl011_dma_probe()
530 static void pl011_dma_remove(struct uart_amba_port *uap) in pl011_dma_remove() argument
532 if (uap->dmatx.chan) in pl011_dma_remove()
533 dma_release_channel(uap->dmatx.chan); in pl011_dma_remove()
534 if (uap->dmarx.chan) in pl011_dma_remove()
535 dma_release_channel(uap->dmarx.chan); in pl011_dma_remove()
539 static int pl011_dma_tx_refill(struct uart_amba_port *uap);
540 static void pl011_start_tx_pio(struct uart_amba_port *uap);
548 struct uart_amba_port *uap = data; in pl011_dma_tx_callback() local
549 struct pl011_dmatx_data *dmatx = &uap->dmatx; in pl011_dma_tx_callback()
553 spin_lock_irqsave(&uap->port.lock, flags); in pl011_dma_tx_callback()
554 if (uap->dmatx.queued) in pl011_dma_tx_callback()
558 dmacr = uap->dmacr; in pl011_dma_tx_callback()
559 uap->dmacr = dmacr & ~UART011_TXDMAE; in pl011_dma_tx_callback()
560 pl011_write(uap->dmacr, uap, REG_DMACR); in pl011_dma_tx_callback()
571 if (!(dmacr & UART011_TXDMAE) || uart_tx_stopped(&uap->port) || in pl011_dma_tx_callback()
572 uart_circ_empty(&uap->port.state->xmit)) { in pl011_dma_tx_callback()
573 uap->dmatx.queued = false; in pl011_dma_tx_callback()
574 spin_unlock_irqrestore(&uap->port.lock, flags); in pl011_dma_tx_callback()
578 if (pl011_dma_tx_refill(uap) <= 0) in pl011_dma_tx_callback()
583 pl011_start_tx_pio(uap); in pl011_dma_tx_callback()
585 spin_unlock_irqrestore(&uap->port.lock, flags); in pl011_dma_tx_callback()
596 static int pl011_dma_tx_refill(struct uart_amba_port *uap) in pl011_dma_tx_refill() argument
598 struct pl011_dmatx_data *dmatx = &uap->dmatx; in pl011_dma_tx_refill()
602 struct circ_buf *xmit = &uap->port.state->xmit; in pl011_dma_tx_refill()
612 if (count < (uap->fifosize >> 1)) { in pl011_dma_tx_refill()
613 uap->dmatx.queued = false; in pl011_dma_tx_refill()
645 uap->dmatx.queued = false; in pl011_dma_tx_refill()
646 dev_dbg(uap->port.dev, "unable to map TX DMA\n"); in pl011_dma_tx_refill()
654 uap->dmatx.queued = false; in pl011_dma_tx_refill()
659 dev_dbg(uap->port.dev, "TX DMA busy\n"); in pl011_dma_tx_refill()
665 desc->callback_param = uap; in pl011_dma_tx_refill()
673 uap->dmacr |= UART011_TXDMAE; in pl011_dma_tx_refill()
674 pl011_write(uap->dmacr, uap, REG_DMACR); in pl011_dma_tx_refill()
675 uap->dmatx.queued = true; in pl011_dma_tx_refill()
681 uart_xmit_advance(&uap->port, count); in pl011_dma_tx_refill()
684 uart_write_wakeup(&uap->port); in pl011_dma_tx_refill()
697 static bool pl011_dma_tx_irq(struct uart_amba_port *uap) in pl011_dma_tx_irq() argument
699 if (!uap->using_tx_dma) in pl011_dma_tx_irq()
707 if (uap->dmatx.queued) { in pl011_dma_tx_irq()
708 uap->dmacr |= UART011_TXDMAE; in pl011_dma_tx_irq()
709 pl011_write(uap->dmacr, uap, REG_DMACR); in pl011_dma_tx_irq()
710 uap->im &= ~UART011_TXIM; in pl011_dma_tx_irq()
711 pl011_write(uap->im, uap, REG_IMSC); in pl011_dma_tx_irq()
719 if (pl011_dma_tx_refill(uap) > 0) { in pl011_dma_tx_irq()
720 uap->im &= ~UART011_TXIM; in pl011_dma_tx_irq()
721 pl011_write(uap->im, uap, REG_IMSC); in pl011_dma_tx_irq()
731 static inline void pl011_dma_tx_stop(struct uart_amba_port *uap) in pl011_dma_tx_stop() argument
733 if (uap->dmatx.queued) { in pl011_dma_tx_stop()
734 uap->dmacr &= ~UART011_TXDMAE; in pl011_dma_tx_stop()
735 pl011_write(uap->dmacr, uap, REG_DMACR); in pl011_dma_tx_stop()
747 static inline bool pl011_dma_tx_start(struct uart_amba_port *uap) in pl011_dma_tx_start() argument
751 if (!uap->using_tx_dma) in pl011_dma_tx_start()
754 if (!uap->port.x_char) { in pl011_dma_tx_start()
758 if (!uap->dmatx.queued) { in pl011_dma_tx_start()
759 if (pl011_dma_tx_refill(uap) > 0) { in pl011_dma_tx_start()
760 uap->im &= ~UART011_TXIM; in pl011_dma_tx_start()
761 pl011_write(uap->im, uap, REG_IMSC); in pl011_dma_tx_start()
764 } else if (!(uap->dmacr & UART011_TXDMAE)) { in pl011_dma_tx_start()
765 uap->dmacr |= UART011_TXDMAE; in pl011_dma_tx_start()
766 pl011_write(uap->dmacr, uap, REG_DMACR); in pl011_dma_tx_start()
775 dmacr = uap->dmacr; in pl011_dma_tx_start()
776 uap->dmacr &= ~UART011_TXDMAE; in pl011_dma_tx_start()
777 pl011_write(uap->dmacr, uap, REG_DMACR); in pl011_dma_tx_start()
779 if (pl011_read(uap, REG_FR) & UART01x_FR_TXFF) { in pl011_dma_tx_start()
788 pl011_write(uap->port.x_char, uap, REG_DR); in pl011_dma_tx_start()
789 uap->port.icount.tx++; in pl011_dma_tx_start()
790 uap->port.x_char = 0; in pl011_dma_tx_start()
793 uap->dmacr = dmacr; in pl011_dma_tx_start()
794 pl011_write(dmacr, uap, REG_DMACR); in pl011_dma_tx_start()
804 __releases(&uap->port.lock) in pl011_dma_flush_buffer()
805 __acquires(&uap->port.lock) in pl011_dma_flush_buffer()
807 struct uart_amba_port *uap = in pl011_dma_flush_buffer() local
810 if (!uap->using_tx_dma) in pl011_dma_flush_buffer()
813 dmaengine_terminate_async(uap->dmatx.chan); in pl011_dma_flush_buffer()
815 if (uap->dmatx.queued) { in pl011_dma_flush_buffer()
816 dma_unmap_sg(uap->dmatx.chan->device->dev, &uap->dmatx.sg, 1, in pl011_dma_flush_buffer()
818 uap->dmatx.queued = false; in pl011_dma_flush_buffer()
819 uap->dmacr &= ~UART011_TXDMAE; in pl011_dma_flush_buffer()
820 pl011_write(uap->dmacr, uap, REG_DMACR); in pl011_dma_flush_buffer()
826 static int pl011_dma_rx_trigger_dma(struct uart_amba_port *uap) in pl011_dma_rx_trigger_dma() argument
828 struct dma_chan *rxchan = uap->dmarx.chan; in pl011_dma_rx_trigger_dma()
829 struct pl011_dmarx_data *dmarx = &uap->dmarx; in pl011_dma_rx_trigger_dma()
837 sgbuf = uap->dmarx.use_buf_b ? in pl011_dma_rx_trigger_dma()
838 &uap->dmarx.sgbuf_b : &uap->dmarx.sgbuf_a; in pl011_dma_rx_trigger_dma()
848 uap->dmarx.running = false; in pl011_dma_rx_trigger_dma()
855 desc->callback_param = uap; in pl011_dma_rx_trigger_dma()
859 uap->dmacr |= UART011_RXDMAE; in pl011_dma_rx_trigger_dma()
860 pl011_write(uap->dmacr, uap, REG_DMACR); in pl011_dma_rx_trigger_dma()
861 uap->dmarx.running = true; in pl011_dma_rx_trigger_dma()
863 uap->im &= ~UART011_RXIM; in pl011_dma_rx_trigger_dma()
864 pl011_write(uap->im, uap, REG_IMSC); in pl011_dma_rx_trigger_dma()
874 static void pl011_dma_rx_chars(struct uart_amba_port *uap, in pl011_dma_rx_chars() argument
878 struct tty_port *port = &uap->port.state->port; in pl011_dma_rx_chars()
880 &uap->dmarx.sgbuf_b : &uap->dmarx.sgbuf_a; in pl011_dma_rx_chars()
884 struct pl011_dmarx_data *dmarx = &uap->dmarx; in pl011_dma_rx_chars()
887 if (uap->dmarx.poll_rate) { in pl011_dma_rx_chars()
906 uap->port.icount.rx += dma_count; in pl011_dma_rx_chars()
908 dev_warn(uap->port.dev, in pl011_dma_rx_chars()
913 if (uap->dmarx.poll_rate) in pl011_dma_rx_chars()
923 UART011_FEIS, uap, REG_ICR); in pl011_dma_rx_chars()
936 fifotaken = pl011_fifo_to_tty(uap); in pl011_dma_rx_chars()
939 dev_vdbg(uap->port.dev, in pl011_dma_rx_chars()
945 static void pl011_dma_rx_irq(struct uart_amba_port *uap) in pl011_dma_rx_irq() argument
947 struct pl011_dmarx_data *dmarx = &uap->dmarx; in pl011_dma_rx_irq()
961 dev_err(uap->port.dev, "unable to pause DMA transfer\n"); in pl011_dma_rx_irq()
965 dev_err(uap->port.dev, "unable to pause DMA transfer\n"); in pl011_dma_rx_irq()
968 uap->dmacr &= ~UART011_RXDMAE; in pl011_dma_rx_irq()
969 pl011_write(uap->dmacr, uap, REG_DMACR); in pl011_dma_rx_irq()
970 uap->dmarx.running = false; in pl011_dma_rx_irq()
981 pl011_dma_rx_chars(uap, pending, dmarx->use_buf_b, true); in pl011_dma_rx_irq()
985 if (pl011_dma_rx_trigger_dma(uap)) { in pl011_dma_rx_irq()
986 dev_dbg(uap->port.dev, "could not retrigger RX DMA job " in pl011_dma_rx_irq()
988 uap->im |= UART011_RXIM; in pl011_dma_rx_irq()
989 pl011_write(uap->im, uap, REG_IMSC); in pl011_dma_rx_irq()
995 struct uart_amba_port *uap = data; in pl011_dma_rx_callback() local
996 struct pl011_dmarx_data *dmarx = &uap->dmarx; in pl011_dma_rx_callback()
1012 spin_lock_irq(&uap->port.lock); in pl011_dma_rx_callback()
1023 uap->dmarx.running = false; in pl011_dma_rx_callback()
1025 ret = pl011_dma_rx_trigger_dma(uap); in pl011_dma_rx_callback()
1027 pl011_dma_rx_chars(uap, pending, lastbuf, false); in pl011_dma_rx_callback()
1028 spin_unlock_irq(&uap->port.lock); in pl011_dma_rx_callback()
1034 dev_dbg(uap->port.dev, "could not retrigger RX DMA job " in pl011_dma_rx_callback()
1036 uap->im |= UART011_RXIM; in pl011_dma_rx_callback()
1037 pl011_write(uap->im, uap, REG_IMSC); in pl011_dma_rx_callback()
1046 static inline void pl011_dma_rx_stop(struct uart_amba_port *uap) in pl011_dma_rx_stop() argument
1048 if (!uap->using_rx_dma) in pl011_dma_rx_stop()
1052 uap->dmacr &= ~UART011_RXDMAE; in pl011_dma_rx_stop()
1053 pl011_write(uap->dmacr, uap, REG_DMACR); in pl011_dma_rx_stop()
1063 struct uart_amba_port *uap = from_timer(uap, t, dmarx.timer); in pl011_dma_rx_poll() local
1064 struct tty_port *port = &uap->port.state->port; in pl011_dma_rx_poll()
1065 struct pl011_dmarx_data *dmarx = &uap->dmarx; in pl011_dma_rx_poll()
1066 struct dma_chan *rxchan = uap->dmarx.chan; in pl011_dma_rx_poll()
1074 sgbuf = dmarx->use_buf_b ? &uap->dmarx.sgbuf_b : &uap->dmarx.sgbuf_a; in pl011_dma_rx_poll()
1092 > uap->dmarx.poll_timeout) { in pl011_dma_rx_poll()
1094 spin_lock_irqsave(&uap->port.lock, flags); in pl011_dma_rx_poll()
1095 pl011_dma_rx_stop(uap); in pl011_dma_rx_poll()
1096 uap->im |= UART011_RXIM; in pl011_dma_rx_poll()
1097 pl011_write(uap->im, uap, REG_IMSC); in pl011_dma_rx_poll()
1098 spin_unlock_irqrestore(&uap->port.lock, flags); in pl011_dma_rx_poll()
1100 uap->dmarx.running = false; in pl011_dma_rx_poll()
1102 del_timer(&uap->dmarx.timer); in pl011_dma_rx_poll()
1104 mod_timer(&uap->dmarx.timer, in pl011_dma_rx_poll()
1105 jiffies + msecs_to_jiffies(uap->dmarx.poll_rate)); in pl011_dma_rx_poll()
1109 static void pl011_dma_startup(struct uart_amba_port *uap) in pl011_dma_startup() argument
1113 if (!uap->dma_probed) in pl011_dma_startup()
1114 pl011_dma_probe(uap); in pl011_dma_startup()
1116 if (!uap->dmatx.chan) in pl011_dma_startup()
1119 uap->dmatx.buf = kmalloc(PL011_DMA_BUFFER_SIZE, GFP_KERNEL | __GFP_DMA); in pl011_dma_startup()
1120 if (!uap->dmatx.buf) { in pl011_dma_startup()
1121 dev_err(uap->port.dev, "no memory for DMA TX buffer\n"); in pl011_dma_startup()
1122 uap->port.fifosize = uap->fifosize; in pl011_dma_startup()
1126 sg_init_one(&uap->dmatx.sg, uap->dmatx.buf, PL011_DMA_BUFFER_SIZE); in pl011_dma_startup()
1129 uap->port.fifosize = PL011_DMA_BUFFER_SIZE; in pl011_dma_startup()
1130 uap->using_tx_dma = true; in pl011_dma_startup()
1132 if (!uap->dmarx.chan) in pl011_dma_startup()
1136 ret = pl011_sgbuf_init(uap->dmarx.chan, &uap->dmarx.sgbuf_a, in pl011_dma_startup()
1139 dev_err(uap->port.dev, "failed to init DMA %s: %d\n", in pl011_dma_startup()
1144 ret = pl011_sgbuf_init(uap->dmarx.chan, &uap->dmarx.sgbuf_b, in pl011_dma_startup()
1147 dev_err(uap->port.dev, "failed to init DMA %s: %d\n", in pl011_dma_startup()
1149 pl011_sgbuf_free(uap->dmarx.chan, &uap->dmarx.sgbuf_a, in pl011_dma_startup()
1154 uap->using_rx_dma = true; in pl011_dma_startup()
1158 uap->dmacr |= UART011_DMAONERR; in pl011_dma_startup()
1159 pl011_write(uap->dmacr, uap, REG_DMACR); in pl011_dma_startup()
1166 if (uap->vendor->dma_threshold) in pl011_dma_startup()
1168 uap, REG_ST_DMAWM); in pl011_dma_startup()
1170 if (uap->using_rx_dma) { in pl011_dma_startup()
1171 if (pl011_dma_rx_trigger_dma(uap)) in pl011_dma_startup()
1172 dev_dbg(uap->port.dev, "could not trigger initial " in pl011_dma_startup()
1174 if (uap->dmarx.poll_rate) { in pl011_dma_startup()
1175 timer_setup(&uap->dmarx.timer, pl011_dma_rx_poll, 0); in pl011_dma_startup()
1176 mod_timer(&uap->dmarx.timer, in pl011_dma_startup()
1178 msecs_to_jiffies(uap->dmarx.poll_rate)); in pl011_dma_startup()
1179 uap->dmarx.last_residue = PL011_DMA_BUFFER_SIZE; in pl011_dma_startup()
1180 uap->dmarx.last_jiffies = jiffies; in pl011_dma_startup()
1185 static void pl011_dma_shutdown(struct uart_amba_port *uap) in pl011_dma_shutdown() argument
1187 if (!(uap->using_tx_dma || uap->using_rx_dma)) in pl011_dma_shutdown()
1191 while (pl011_read(uap, REG_FR) & uap->vendor->fr_busy) in pl011_dma_shutdown()
1194 spin_lock_irq(&uap->port.lock); in pl011_dma_shutdown()
1195 uap->dmacr &= ~(UART011_DMAONERR | UART011_RXDMAE | UART011_TXDMAE); in pl011_dma_shutdown()
1196 pl011_write(uap->dmacr, uap, REG_DMACR); in pl011_dma_shutdown()
1197 spin_unlock_irq(&uap->port.lock); in pl011_dma_shutdown()
1199 if (uap->using_tx_dma) { in pl011_dma_shutdown()
1201 dmaengine_terminate_all(uap->dmatx.chan); in pl011_dma_shutdown()
1202 if (uap->dmatx.queued) { in pl011_dma_shutdown()
1203 dma_unmap_sg(uap->dmatx.chan->device->dev, &uap->dmatx.sg, 1, in pl011_dma_shutdown()
1205 uap->dmatx.queued = false; in pl011_dma_shutdown()
1208 kfree(uap->dmatx.buf); in pl011_dma_shutdown()
1209 uap->using_tx_dma = false; in pl011_dma_shutdown()
1212 if (uap->using_rx_dma) { in pl011_dma_shutdown()
1213 dmaengine_terminate_all(uap->dmarx.chan); in pl011_dma_shutdown()
1215 pl011_sgbuf_free(uap->dmarx.chan, &uap->dmarx.sgbuf_a, DMA_FROM_DEVICE); in pl011_dma_shutdown()
1216 pl011_sgbuf_free(uap->dmarx.chan, &uap->dmarx.sgbuf_b, DMA_FROM_DEVICE); in pl011_dma_shutdown()
1217 if (uap->dmarx.poll_rate) in pl011_dma_shutdown()
1218 del_timer_sync(&uap->dmarx.timer); in pl011_dma_shutdown()
1219 uap->using_rx_dma = false; in pl011_dma_shutdown()
1223 static inline bool pl011_dma_rx_available(struct uart_amba_port *uap) in pl011_dma_rx_available() argument
1225 return uap->using_rx_dma; in pl011_dma_rx_available()
1228 static inline bool pl011_dma_rx_running(struct uart_amba_port *uap) in pl011_dma_rx_running() argument
1230 return uap->using_rx_dma && uap->dmarx.running; in pl011_dma_rx_running()
1235 static inline void pl011_dma_remove(struct uart_amba_port *uap) in pl011_dma_remove() argument
1239 static inline void pl011_dma_startup(struct uart_amba_port *uap) in pl011_dma_startup() argument
1243 static inline void pl011_dma_shutdown(struct uart_amba_port *uap) in pl011_dma_shutdown() argument
1247 static inline bool pl011_dma_tx_irq(struct uart_amba_port *uap) in pl011_dma_tx_irq() argument
1252 static inline void pl011_dma_tx_stop(struct uart_amba_port *uap) in pl011_dma_tx_stop() argument
1256 static inline bool pl011_dma_tx_start(struct uart_amba_port *uap) in pl011_dma_tx_start() argument
1261 static inline void pl011_dma_rx_irq(struct uart_amba_port *uap) in pl011_dma_rx_irq() argument
1265 static inline void pl011_dma_rx_stop(struct uart_amba_port *uap) in pl011_dma_rx_stop() argument
1269 static inline int pl011_dma_rx_trigger_dma(struct uart_amba_port *uap) in pl011_dma_rx_trigger_dma() argument
1274 static inline bool pl011_dma_rx_available(struct uart_amba_port *uap) in pl011_dma_rx_available() argument
1279 static inline bool pl011_dma_rx_running(struct uart_amba_port *uap) in pl011_dma_rx_running() argument
1287 static void pl011_rs485_tx_stop(struct uart_amba_port *uap) in pl011_rs485_tx_stop() argument
1293 const int MAX_TX_DRAIN_ITERS = uap->port.fifosize * 2; in pl011_rs485_tx_stop()
1294 struct uart_port *port = &uap->port; in pl011_rs485_tx_stop()
1306 udelay(uap->rs485_tx_drain_interval); in pl011_rs485_tx_stop()
1313 cr = pl011_read(uap, REG_CR); in pl011_rs485_tx_stop()
1323 pl011_write(cr, uap, REG_CR); in pl011_rs485_tx_stop()
1325 uap->rs485_tx_started = false; in pl011_rs485_tx_stop()
1330 struct uart_amba_port *uap = in pl011_stop_tx() local
1333 uap->im &= ~UART011_TXIM; in pl011_stop_tx()
1334 pl011_write(uap->im, uap, REG_IMSC); in pl011_stop_tx()
1335 pl011_dma_tx_stop(uap); in pl011_stop_tx()
1337 if ((port->rs485.flags & SER_RS485_ENABLED) && uap->rs485_tx_started) in pl011_stop_tx()
1338 pl011_rs485_tx_stop(uap); in pl011_stop_tx()
1341 static bool pl011_tx_chars(struct uart_amba_port *uap, bool from_irq);
1344 static void pl011_start_tx_pio(struct uart_amba_port *uap) in pl011_start_tx_pio() argument
1346 if (pl011_tx_chars(uap, false)) { in pl011_start_tx_pio()
1347 uap->im |= UART011_TXIM; in pl011_start_tx_pio()
1348 pl011_write(uap->im, uap, REG_IMSC); in pl011_start_tx_pio()
1354 struct uart_amba_port *uap = in pl011_start_tx() local
1357 if (!pl011_dma_tx_start(uap)) in pl011_start_tx()
1358 pl011_start_tx_pio(uap); in pl011_start_tx()
1363 struct uart_amba_port *uap = in pl011_stop_rx() local
1366 uap->im &= ~(UART011_RXIM|UART011_RTIM|UART011_FEIM| in pl011_stop_rx()
1368 pl011_write(uap->im, uap, REG_IMSC); in pl011_stop_rx()
1370 pl011_dma_rx_stop(uap); in pl011_stop_rx()
1384 struct uart_amba_port *uap = in pl011_enable_ms() local
1387 uap->im |= UART011_RIMIM|UART011_CTSMIM|UART011_DCDMIM|UART011_DSRMIM; in pl011_enable_ms()
1388 pl011_write(uap->im, uap, REG_IMSC); in pl011_enable_ms()
1391 static void pl011_rx_chars(struct uart_amba_port *uap) in pl011_rx_chars() argument
1392 __releases(&uap->port.lock) in pl011_rx_chars()
1393 __acquires(&uap->port.lock) in pl011_rx_chars()
1395 pl011_fifo_to_tty(uap); in pl011_rx_chars()
1397 spin_unlock(&uap->port.lock); in pl011_rx_chars()
1398 tty_flip_buffer_push(&uap->port.state->port); in pl011_rx_chars()
1403 if (pl011_dma_rx_available(uap)) { in pl011_rx_chars()
1404 if (pl011_dma_rx_trigger_dma(uap)) { in pl011_rx_chars()
1405 dev_dbg(uap->port.dev, "could not trigger RX DMA job " in pl011_rx_chars()
1407 uap->im |= UART011_RXIM; in pl011_rx_chars()
1408 pl011_write(uap->im, uap, REG_IMSC); in pl011_rx_chars()
1412 if (uap->dmarx.poll_rate) { in pl011_rx_chars()
1413 uap->dmarx.last_jiffies = jiffies; in pl011_rx_chars()
1414 uap->dmarx.last_residue = PL011_DMA_BUFFER_SIZE; in pl011_rx_chars()
1415 mod_timer(&uap->dmarx.timer, in pl011_rx_chars()
1417 msecs_to_jiffies(uap->dmarx.poll_rate)); in pl011_rx_chars()
1422 spin_lock(&uap->port.lock); in pl011_rx_chars()
1425 static bool pl011_tx_char(struct uart_amba_port *uap, unsigned char c, in pl011_tx_char() argument
1429 pl011_read(uap, REG_FR) & UART01x_FR_TXFF) in pl011_tx_char()
1432 pl011_write(c, uap, REG_DR); in pl011_tx_char()
1433 uap->port.icount.tx++; in pl011_tx_char()
1438 static void pl011_rs485_tx_start(struct uart_amba_port *uap) in pl011_rs485_tx_start() argument
1440 struct uart_port *port = &uap->port; in pl011_rs485_tx_start()
1444 cr = pl011_read(uap, REG_CR); in pl011_rs485_tx_start()
1456 pl011_write(cr, uap, REG_CR); in pl011_rs485_tx_start()
1461 uap->rs485_tx_started = true; in pl011_rs485_tx_start()
1465 static bool pl011_tx_chars(struct uart_amba_port *uap, bool from_irq) in pl011_tx_chars() argument
1467 struct circ_buf *xmit = &uap->port.state->xmit; in pl011_tx_chars()
1468 int count = uap->fifosize >> 1; in pl011_tx_chars()
1470 if ((uap->port.rs485.flags & SER_RS485_ENABLED) && in pl011_tx_chars()
1471 !uap->rs485_tx_started) in pl011_tx_chars()
1472 pl011_rs485_tx_start(uap); in pl011_tx_chars()
1474 if (uap->port.x_char) { in pl011_tx_chars()
1475 if (!pl011_tx_char(uap, uap->port.x_char, from_irq)) in pl011_tx_chars()
1477 uap->port.x_char = 0; in pl011_tx_chars()
1480 if (uart_circ_empty(xmit) || uart_tx_stopped(&uap->port)) { in pl011_tx_chars()
1481 pl011_stop_tx(&uap->port); in pl011_tx_chars()
1486 if (pl011_dma_tx_irq(uap)) in pl011_tx_chars()
1493 if (!pl011_tx_char(uap, xmit->buf[xmit->tail], from_irq)) in pl011_tx_chars()
1500 uart_write_wakeup(&uap->port); in pl011_tx_chars()
1503 pl011_stop_tx(&uap->port); in pl011_tx_chars()
1509 static void pl011_modem_status(struct uart_amba_port *uap) in pl011_modem_status() argument
1513 status = pl011_read(uap, REG_FR) & UART01x_FR_MODEM_ANY; in pl011_modem_status()
1515 delta = status ^ uap->old_status; in pl011_modem_status()
1516 uap->old_status = status; in pl011_modem_status()
1522 uart_handle_dcd_change(&uap->port, status & UART01x_FR_DCD); in pl011_modem_status()
1524 if (delta & uap->vendor->fr_dsr) in pl011_modem_status()
1525 uap->port.icount.dsr++; in pl011_modem_status()
1527 if (delta & uap->vendor->fr_cts) in pl011_modem_status()
1528 uart_handle_cts_change(&uap->port, in pl011_modem_status()
1529 status & uap->vendor->fr_cts); in pl011_modem_status()
1531 wake_up_interruptible(&uap->port.state->port.delta_msr_wait); in pl011_modem_status()
1534 static void check_apply_cts_event_workaround(struct uart_amba_port *uap) in check_apply_cts_event_workaround() argument
1536 if (!uap->vendor->cts_event_workaround) in check_apply_cts_event_workaround()
1540 pl011_write(0x00, uap, REG_ICR); in check_apply_cts_event_workaround()
1547 pl011_read(uap, REG_ICR); in check_apply_cts_event_workaround()
1548 pl011_read(uap, REG_ICR); in check_apply_cts_event_workaround()
1553 struct uart_amba_port *uap = dev_id; in pl011_int() local
1558 spin_lock_irqsave(&uap->port.lock, flags); in pl011_int()
1559 status = pl011_read(uap, REG_RIS) & uap->im; in pl011_int()
1562 check_apply_cts_event_workaround(uap); in pl011_int()
1566 uap, REG_ICR); in pl011_int()
1569 if (pl011_dma_rx_running(uap)) in pl011_int()
1570 pl011_dma_rx_irq(uap); in pl011_int()
1572 pl011_rx_chars(uap); in pl011_int()
1576 pl011_modem_status(uap); in pl011_int()
1578 pl011_tx_chars(uap, true); in pl011_int()
1583 status = pl011_read(uap, REG_RIS) & uap->im; in pl011_int()
1588 spin_unlock_irqrestore(&uap->port.lock, flags); in pl011_int()
1595 struct uart_amba_port *uap = in pl011_tx_empty() local
1599 unsigned int status = pl011_read(uap, REG_FR) ^ uap->vendor->inv_fr; in pl011_tx_empty()
1601 return status & (uap->vendor->fr_busy | UART01x_FR_TXFF) ? in pl011_tx_empty()
1607 struct uart_amba_port *uap = in pl011_get_mctrl() local
1610 unsigned int status = pl011_read(uap, REG_FR); in pl011_get_mctrl()
1617 TIOCMBIT(uap->vendor->fr_dsr, TIOCM_DSR); in pl011_get_mctrl()
1618 TIOCMBIT(uap->vendor->fr_cts, TIOCM_CTS); in pl011_get_mctrl()
1619 TIOCMBIT(uap->vendor->fr_ri, TIOCM_RNG); in pl011_get_mctrl()
1626 struct uart_amba_port *uap = in pl011_set_mctrl() local
1630 cr = pl011_read(uap, REG_CR); in pl011_set_mctrl()
1650 pl011_write(cr, uap, REG_CR); in pl011_set_mctrl()
1655 struct uart_amba_port *uap = in pl011_break_ctl() local
1660 spin_lock_irqsave(&uap->port.lock, flags); in pl011_break_ctl()
1661 lcr_h = pl011_read(uap, REG_LCRH_TX); in pl011_break_ctl()
1666 pl011_write(lcr_h, uap, REG_LCRH_TX); in pl011_break_ctl()
1667 spin_unlock_irqrestore(&uap->port.lock, flags); in pl011_break_ctl()
1674 struct uart_amba_port *uap = in pl011_quiesce_irqs() local
1677 pl011_write(pl011_read(uap, REG_MIS), uap, REG_ICR); in pl011_quiesce_irqs()
1691 pl011_write(pl011_read(uap, REG_IMSC) & ~UART011_TXIM, uap, in pl011_quiesce_irqs()
1697 struct uart_amba_port *uap = in pl011_get_poll_char() local
1707 status = pl011_read(uap, REG_FR); in pl011_get_poll_char()
1711 return pl011_read(uap, REG_DR); in pl011_get_poll_char()
1717 struct uart_amba_port *uap = in pl011_put_poll_char() local
1720 while (pl011_read(uap, REG_FR) & UART01x_FR_TXFF) in pl011_put_poll_char()
1723 pl011_write(ch, uap, REG_DR); in pl011_put_poll_char()
1730 struct uart_amba_port *uap = in pl011_hwinit() local
1740 retval = clk_prepare_enable(uap->clk); in pl011_hwinit()
1744 uap->port.uartclk = clk_get_rate(uap->clk); in pl011_hwinit()
1749 uap, REG_ICR); in pl011_hwinit()
1755 uap->im = pl011_read(uap, REG_IMSC); in pl011_hwinit()
1756 pl011_write(UART011_RTIM | UART011_RXIM, uap, REG_IMSC); in pl011_hwinit()
1758 if (dev_get_platdata(uap->port.dev)) { in pl011_hwinit()
1761 plat = dev_get_platdata(uap->port.dev); in pl011_hwinit()
1768 static bool pl011_split_lcrh(const struct uart_amba_port *uap) in pl011_split_lcrh() argument
1770 return pl011_reg_to_offset(uap, REG_LCRH_RX) != in pl011_split_lcrh()
1771 pl011_reg_to_offset(uap, REG_LCRH_TX); in pl011_split_lcrh()
1774 static void pl011_write_lcr_h(struct uart_amba_port *uap, unsigned int lcr_h) in pl011_write_lcr_h() argument
1776 pl011_write(lcr_h, uap, REG_LCRH_RX); in pl011_write_lcr_h()
1777 if (pl011_split_lcrh(uap)) { in pl011_write_lcr_h()
1784 pl011_write(0xff, uap, REG_MIS); in pl011_write_lcr_h()
1785 pl011_write(lcr_h, uap, REG_LCRH_TX); in pl011_write_lcr_h()
1789 static int pl011_allocate_irq(struct uart_amba_port *uap) in pl011_allocate_irq() argument
1791 pl011_write(uap->im, uap, REG_IMSC); in pl011_allocate_irq()
1793 return request_irq(uap->port.irq, pl011_int, IRQF_SHARED, "uart-pl011", uap); in pl011_allocate_irq()
1801 static void pl011_enable_interrupts(struct uart_amba_port *uap) in pl011_enable_interrupts() argument
1806 spin_lock_irqsave(&uap->port.lock, flags); in pl011_enable_interrupts()
1809 pl011_write(UART011_RTIS | UART011_RXIS, uap, REG_ICR); in pl011_enable_interrupts()
1817 for (i = 0; i < uap->fifosize * 2; ++i) { in pl011_enable_interrupts()
1818 if (pl011_read(uap, REG_FR) & UART01x_FR_RXFE) in pl011_enable_interrupts()
1821 pl011_read(uap, REG_DR); in pl011_enable_interrupts()
1824 uap->im = UART011_RTIM; in pl011_enable_interrupts()
1825 if (!pl011_dma_rx_running(uap)) in pl011_enable_interrupts()
1826 uap->im |= UART011_RXIM; in pl011_enable_interrupts()
1827 pl011_write(uap->im, uap, REG_IMSC); in pl011_enable_interrupts()
1828 spin_unlock_irqrestore(&uap->port.lock, flags); in pl011_enable_interrupts()
1833 struct uart_amba_port *uap = container_of(port, struct uart_amba_port, port); in pl011_unthrottle_rx() local
1836 spin_lock_irqsave(&uap->port.lock, flags); in pl011_unthrottle_rx()
1838 uap->im = UART011_RTIM; in pl011_unthrottle_rx()
1839 if (!pl011_dma_rx_running(uap)) in pl011_unthrottle_rx()
1840 uap->im |= UART011_RXIM; in pl011_unthrottle_rx()
1842 pl011_write(uap->im, uap, REG_IMSC); in pl011_unthrottle_rx()
1844 spin_unlock_irqrestore(&uap->port.lock, flags); in pl011_unthrottle_rx()
1849 struct uart_amba_port *uap = in pl011_startup() local
1858 retval = pl011_allocate_irq(uap); in pl011_startup()
1862 pl011_write(uap->vendor->ifls, uap, REG_IFLS); in pl011_startup()
1864 spin_lock_irq(&uap->port.lock); in pl011_startup()
1866 cr = pl011_read(uap, REG_CR); in pl011_startup()
1873 pl011_write(cr, uap, REG_CR); in pl011_startup()
1875 spin_unlock_irq(&uap->port.lock); in pl011_startup()
1880 uap->old_status = pl011_read(uap, REG_FR) & UART01x_FR_MODEM_ANY; in pl011_startup()
1883 pl011_dma_startup(uap); in pl011_startup()
1885 pl011_enable_interrupts(uap); in pl011_startup()
1890 clk_disable_unprepare(uap->clk); in pl011_startup()
1896 struct uart_amba_port *uap = in sbsa_uart_startup() local
1904 retval = pl011_allocate_irq(uap); in sbsa_uart_startup()
1909 uap->old_status = 0; in sbsa_uart_startup()
1911 pl011_enable_interrupts(uap); in sbsa_uart_startup()
1916 static void pl011_shutdown_channel(struct uart_amba_port *uap, in pl011_shutdown_channel() argument
1921 val = pl011_read(uap, lcrh); in pl011_shutdown_channel()
1923 pl011_write(val, uap, lcrh); in pl011_shutdown_channel()
1931 static void pl011_disable_uart(struct uart_amba_port *uap) in pl011_disable_uart() argument
1935 uap->port.status &= ~(UPSTAT_AUTOCTS | UPSTAT_AUTORTS); in pl011_disable_uart()
1936 spin_lock_irq(&uap->port.lock); in pl011_disable_uart()
1937 cr = pl011_read(uap, REG_CR); in pl011_disable_uart()
1940 pl011_write(cr, uap, REG_CR); in pl011_disable_uart()
1941 spin_unlock_irq(&uap->port.lock); in pl011_disable_uart()
1946 pl011_shutdown_channel(uap, REG_LCRH_RX); in pl011_disable_uart()
1947 if (pl011_split_lcrh(uap)) in pl011_disable_uart()
1948 pl011_shutdown_channel(uap, REG_LCRH_TX); in pl011_disable_uart()
1951 static void pl011_disable_interrupts(struct uart_amba_port *uap) in pl011_disable_interrupts() argument
1953 spin_lock_irq(&uap->port.lock); in pl011_disable_interrupts()
1956 uap->im = 0; in pl011_disable_interrupts()
1957 pl011_write(uap->im, uap, REG_IMSC); in pl011_disable_interrupts()
1958 pl011_write(0xffff, uap, REG_ICR); in pl011_disable_interrupts()
1960 spin_unlock_irq(&uap->port.lock); in pl011_disable_interrupts()
1965 struct uart_amba_port *uap = in pl011_shutdown() local
1968 pl011_disable_interrupts(uap); in pl011_shutdown()
1970 pl011_dma_shutdown(uap); in pl011_shutdown()
1972 if ((port->rs485.flags & SER_RS485_ENABLED) && uap->rs485_tx_started) in pl011_shutdown()
1973 pl011_rs485_tx_stop(uap); in pl011_shutdown()
1975 free_irq(uap->port.irq, uap); in pl011_shutdown()
1977 pl011_disable_uart(uap); in pl011_shutdown()
1982 clk_disable_unprepare(uap->clk); in pl011_shutdown()
1986 if (dev_get_platdata(uap->port.dev)) { in pl011_shutdown()
1989 plat = dev_get_platdata(uap->port.dev); in pl011_shutdown()
1994 if (uap->port.ops->flush_buffer) in pl011_shutdown()
1995 uap->port.ops->flush_buffer(port); in pl011_shutdown()
2000 struct uart_amba_port *uap = in sbsa_uart_shutdown() local
2003 pl011_disable_interrupts(uap); in sbsa_uart_shutdown()
2005 free_irq(uap->port.irq, uap); in sbsa_uart_shutdown()
2007 if (uap->port.ops->flush_buffer) in sbsa_uart_shutdown()
2008 uap->port.ops->flush_buffer(port); in sbsa_uart_shutdown()
2047 struct uart_amba_port *uap = in pl011_set_termios() local
2054 if (uap->vendor->oversampling) in pl011_set_termios()
2068 if (uap->dmarx.auto_poll_rate) in pl011_set_termios()
2069 uap->dmarx.poll_rate = DIV_ROUND_UP(10000000, baud); in pl011_set_termios()
2100 if (uap->fifosize > 1) in pl011_set_termios()
2117 uap->rs485_tx_drain_interval = DIV_ROUND_UP(bits * 1000 * 1000, baud); in pl011_set_termios()
2127 old_cr = pl011_read(uap, REG_CR); in pl011_set_termios()
2140 if (uap->vendor->oversampling) { in pl011_set_termios()
2153 if (uap->vendor->oversampling) { in pl011_set_termios()
2160 pl011_write(quot & 0x3f, uap, REG_FBRD); in pl011_set_termios()
2161 pl011_write(quot >> 6, uap, REG_IBRD); in pl011_set_termios()
2169 pl011_write_lcr_h(uap, lcr_h); in pl011_set_termios()
2177 pl011_write(old_cr, uap, REG_CR); in pl011_set_termios()
2186 struct uart_amba_port *uap = in sbsa_uart_set_termios() local
2190 tty_termios_encode_baud_rate(termios, uap->fixed_baud, uap->fixed_baud); in sbsa_uart_set_termios()
2198 uart_update_timeout(port, CS8, uap->fixed_baud); in sbsa_uart_set_termios()
2205 struct uart_amba_port *uap = in pl011_type() local
2207 return uap->port.type == PORT_AMBA ? uap->type : NULL; in pl011_type()
2239 struct uart_amba_port *uap = in pl011_rs485_config() local
2243 pl011_rs485_tx_stop(uap); in pl011_rs485_config()
2247 u32 cr = pl011_read(uap, REG_CR); in pl011_rs485_config()
2250 pl011_write(cr, uap, REG_CR); in pl011_rs485_config()
2317 struct uart_amba_port *uap = in pl011_console_putchar() local
2320 while (pl011_read(uap, REG_FR) & UART01x_FR_TXFF) in pl011_console_putchar()
2322 pl011_write(ch, uap, REG_DR); in pl011_console_putchar()
2328 struct uart_amba_port *uap = amba_ports[co->index]; in pl011_console_write() local
2333 clk_enable(uap->clk); in pl011_console_write()
2336 if (uap->port.sysrq) in pl011_console_write()
2339 locked = spin_trylock(&uap->port.lock); in pl011_console_write()
2341 spin_lock(&uap->port.lock); in pl011_console_write()
2346 if (!uap->vendor->always_enabled) { in pl011_console_write()
2347 old_cr = pl011_read(uap, REG_CR); in pl011_console_write()
2350 pl011_write(new_cr, uap, REG_CR); in pl011_console_write()
2353 uart_console_write(&uap->port, s, count, pl011_console_putchar); in pl011_console_write()
2360 while ((pl011_read(uap, REG_FR) ^ uap->vendor->inv_fr) in pl011_console_write()
2361 & uap->vendor->fr_busy) in pl011_console_write()
2363 if (!uap->vendor->always_enabled) in pl011_console_write()
2364 pl011_write(old_cr, uap, REG_CR); in pl011_console_write()
2367 spin_unlock(&uap->port.lock); in pl011_console_write()
2370 clk_disable(uap->clk); in pl011_console_write()
2373 static void pl011_console_get_options(struct uart_amba_port *uap, int *baud, in pl011_console_get_options() argument
2376 if (pl011_read(uap, REG_CR) & UART01x_CR_UARTEN) { in pl011_console_get_options()
2379 lcr_h = pl011_read(uap, REG_LCRH_TX); in pl011_console_get_options()
2394 ibrd = pl011_read(uap, REG_IBRD); in pl011_console_get_options()
2395 fbrd = pl011_read(uap, REG_FBRD); in pl011_console_get_options()
2397 *baud = uap->port.uartclk * 4 / (64 * ibrd + fbrd); in pl011_console_get_options()
2399 if (uap->vendor->oversampling) { in pl011_console_get_options()
2400 if (pl011_read(uap, REG_CR) in pl011_console_get_options()
2409 struct uart_amba_port *uap; in pl011_console_setup() local
2423 uap = amba_ports[co->index]; in pl011_console_setup()
2424 if (!uap) in pl011_console_setup()
2428 pinctrl_pm_select_default_state(uap->port.dev); in pl011_console_setup()
2430 ret = clk_prepare(uap->clk); in pl011_console_setup()
2434 if (dev_get_platdata(uap->port.dev)) { in pl011_console_setup()
2437 plat = dev_get_platdata(uap->port.dev); in pl011_console_setup()
2442 uap->port.uartclk = clk_get_rate(uap->clk); in pl011_console_setup()
2444 if (uap->vendor->fixed_options) { in pl011_console_setup()
2445 baud = uap->fixed_baud; in pl011_console_setup()
2451 pl011_console_get_options(uap, &baud, &parity, &bits); in pl011_console_setup()
2454 return uart_set_options(&uap->port, co, baud, parity, bits, flow); in pl011_console_setup()
2692 static void pl011_unregister_port(struct uart_amba_port *uap) in pl011_unregister_port() argument
2698 if (amba_ports[i] == uap) in pl011_unregister_port()
2703 pl011_dma_remove(uap); in pl011_unregister_port()
2719 static int pl011_get_rs485_mode(struct uart_amba_port *uap) in pl011_get_rs485_mode() argument
2721 struct uart_port *port = &uap->port; in pl011_get_rs485_mode()
2731 static int pl011_setup_port(struct device *dev, struct uart_amba_port *uap, in pl011_setup_port() argument
2743 uap->port.dev = dev; in pl011_setup_port()
2744 uap->port.mapbase = mmiobase->start; in pl011_setup_port()
2745 uap->port.membase = base; in pl011_setup_port()
2746 uap->port.fifosize = uap->fifosize; in pl011_setup_port()
2747 uap->port.has_sysrq = IS_ENABLED(CONFIG_SERIAL_AMBA_PL011_CONSOLE); in pl011_setup_port()
2748 uap->port.flags = UPF_BOOT_AUTOCONF; in pl011_setup_port()
2749 uap->port.line = index; in pl011_setup_port()
2751 ret = pl011_get_rs485_mode(uap); in pl011_setup_port()
2755 amba_ports[index] = uap; in pl011_setup_port()
2760 static int pl011_register_port(struct uart_amba_port *uap) in pl011_register_port() argument
2765 pl011_write(0, uap, REG_IMSC); in pl011_register_port()
2766 pl011_write(0xffff, uap, REG_ICR); in pl011_register_port()
2771 dev_err(uap->port.dev, in pl011_register_port()
2774 if (amba_ports[i] == uap) in pl011_register_port()
2780 ret = uart_add_one_port(&amba_reg, &uap->port); in pl011_register_port()
2782 pl011_unregister_port(uap); in pl011_register_port()
2796 struct uart_amba_port *uap; in pl011_probe() local
2805 uap = devm_kzalloc(&dev->dev, sizeof(struct uart_amba_port), in pl011_probe()
2807 if (!uap) in pl011_probe()
2810 uap->clk = devm_clk_get(&dev->dev, NULL); in pl011_probe()
2811 if (IS_ERR(uap->clk)) in pl011_probe()
2812 return PTR_ERR(uap->clk); in pl011_probe()
2814 uap->reg_offset = vendor->reg_offset; in pl011_probe()
2815 uap->vendor = vendor; in pl011_probe()
2816 uap->fifosize = vendor->get_fifosize(dev); in pl011_probe()
2817 uap->port.iotype = vendor->access_32b ? UPIO_MEM32 : UPIO_MEM; in pl011_probe()
2818 uap->port.irq = dev->irq[0]; in pl011_probe()
2819 uap->port.ops = &amba_pl011_pops; in pl011_probe()
2820 uap->port.rs485_config = pl011_rs485_config; in pl011_probe()
2821 uap->port.rs485_supported = pl011_rs485_supported; in pl011_probe()
2822 snprintf(uap->type, sizeof(uap->type), "PL011 rev%u", amba_rev(dev)); in pl011_probe()
2827 uap->port.iotype = UPIO_MEM; in pl011_probe()
2830 uap->port.iotype = UPIO_MEM32; in pl011_probe()
2839 ret = pl011_setup_port(&dev->dev, uap, &dev->res, portnr); in pl011_probe()
2843 amba_set_drvdata(dev, uap); in pl011_probe()
2845 return pl011_register_port(uap); in pl011_probe()
2850 struct uart_amba_port *uap = amba_get_drvdata(dev); in pl011_remove() local
2852 uart_remove_one_port(&amba_reg, &uap->port); in pl011_remove()
2853 pl011_unregister_port(uap); in pl011_remove()
2859 struct uart_amba_port *uap = dev_get_drvdata(dev); in pl011_suspend() local
2861 if (!uap) in pl011_suspend()
2864 return uart_suspend_port(&amba_reg, &uap->port); in pl011_suspend()
2869 struct uart_amba_port *uap = dev_get_drvdata(dev); in pl011_resume() local
2871 if (!uap) in pl011_resume()
2874 return uart_resume_port(&amba_reg, &uap->port); in pl011_resume()
2882 struct uart_amba_port *uap; in sbsa_uart_probe() local
2905 uap = devm_kzalloc(&pdev->dev, sizeof(struct uart_amba_port), in sbsa_uart_probe()
2907 if (!uap) in sbsa_uart_probe()
2913 uap->port.irq = ret; in sbsa_uart_probe()
2918 uap->vendor = &vendor_qdt_qdf2400_e44; in sbsa_uart_probe()
2921 uap->vendor = &vendor_sbsa; in sbsa_uart_probe()
2923 uap->reg_offset = uap->vendor->reg_offset; in sbsa_uart_probe()
2924 uap->fifosize = 32; in sbsa_uart_probe()
2925 uap->port.iotype = uap->vendor->access_32b ? UPIO_MEM32 : UPIO_MEM; in sbsa_uart_probe()
2926 uap->port.ops = &sbsa_uart_pops; in sbsa_uart_probe()
2927 uap->fixed_baud = baudrate; in sbsa_uart_probe()
2929 snprintf(uap->type, sizeof(uap->type), "SBSA"); in sbsa_uart_probe()
2933 ret = pl011_setup_port(&pdev->dev, uap, r, portnr); in sbsa_uart_probe()
2937 platform_set_drvdata(pdev, uap); in sbsa_uart_probe()
2939 return pl011_register_port(uap); in sbsa_uart_probe()
2944 struct uart_amba_port *uap = platform_get_drvdata(pdev); in sbsa_uart_remove() local
2946 uart_remove_one_port(&amba_reg, &uap->port); in sbsa_uart_remove()
2947 pl011_unregister_port(uap); in sbsa_uart_remove()