Lines Matching +full:rs485 +full:- +full:rts +full:- +full:delay
1 // SPDX-License-Identifier: GPL-2.0
3 * 8250-core based driver for the OMAP internal UART
5 * based on omap-serial.c, Copyright (C) 2010 Texas Instruments.
23 #include <linux/delay.h>
28 #include <linux/dma-mapping.h>
165 return readl(priv->membase + (reg << OMAP_UART_REGSHIFT)); in uart_read()
175 struct omap8250_priv *priv = up->port.private_data; in __omap8250_set_mctrl()
180 if (!mctrl_gpio_to_gpiod(up->gpios, UART_GPIO_RTS)) { in __omap8250_set_mctrl()
182 * Turn off autoRTS if RTS is lowered and restore autoRTS in __omap8250_set_mctrl()
183 * setting if RTS is raised in __omap8250_set_mctrl()
187 if ((mctrl & TIOCM_RTS) && (port->status & UPSTAT_AUTORTS)) in __omap8250_set_mctrl()
188 priv->efr |= UART_EFR_RTS; in __omap8250_set_mctrl()
190 priv->efr &= ~UART_EFR_RTS; in __omap8250_set_mctrl()
191 serial_out(up, UART_EFR, priv->efr); in __omap8250_set_mctrl()
200 err = pm_runtime_resume_and_get(port->dev); in omap8250_set_mctrl()
206 pm_runtime_mark_last_busy(port->dev); in omap8250_set_mctrl()
207 pm_runtime_put_autosuspend(port->dev); in omap8250_set_mctrl()
215 * Need a delay =
222 serial_out(up, UART_OMAP_MDR1, priv->mdr1); in omap_8250_mdr1_errataset()
224 serial_out(up, UART_FCR, up->fcr | UART_FCR_CLEAR_XMIT | in omap_8250_mdr1_errataset()
231 unsigned int uartclk = port->uartclk; in omap_8250_get_divisor()
238 if (baud == 38400 && (port->flags & UPF_SPD_MASK) == UPF_SPD_CUST) { in omap_8250_get_divisor()
239 priv->quot = port->custom_divisor & UART_DIV_MAX; in omap_8250_get_divisor()
245 if (port->custom_divisor & (1 << 16)) in omap_8250_get_divisor()
246 priv->mdr1 = UART_OMAP_MDR1_13X_MODE; in omap_8250_get_divisor()
248 priv->mdr1 = UART_OMAP_MDR1_16X_MODE; in omap_8250_get_divisor()
259 abs_d13 = abs(baud - uartclk / 13 / div_13); in omap_8250_get_divisor()
260 abs_d16 = abs(baud - uartclk / 16 / div_16); in omap_8250_get_divisor()
263 priv->mdr1 = UART_OMAP_MDR1_16X_MODE; in omap_8250_get_divisor()
264 priv->quot = div_16; in omap_8250_get_divisor()
266 priv->mdr1 = UART_OMAP_MDR1_13X_MODE; in omap_8250_get_divisor()
267 priv->quot = div_13; in omap_8250_get_divisor()
277 if (old_scr == priv->scr) in omap8250_update_scr()
285 if (priv->scr & OMAP_UART_SCR_DMAMODE_MASK) in omap8250_update_scr()
287 priv->scr & ~OMAP_UART_SCR_DMAMODE_MASK); in omap8250_update_scr()
288 serial_out(up, UART_OMAP_SCR, priv->scr); in omap8250_update_scr()
294 if (priv->habit & UART_ERRATA_i202_MDR1_ACCESS) in omap8250_update_mdr1()
297 serial_out(up, UART_OMAP_MDR1, priv->mdr1); in omap8250_update_mdr1()
302 struct omap8250_priv *priv = up->port.private_data; in omap8250_restore_regs()
303 struct uart_8250_dma *dma = up->dma; in omap8250_restore_regs()
307 lockdep_assert_held_once(&up->port.lock); in omap8250_restore_regs()
309 if (dma && dma->tx_running) { in omap8250_restore_regs()
312 * we have a TX-DMA operation in progress then it has been in omap8250_restore_regs()
314 * delay DMA completes to prevent this hang from happen. in omap8250_restore_regs()
316 priv->delayed_restore = 1; in omap8250_restore_regs()
325 serial_out(up, UART_FCR, up->fcr); in omap8250_restore_regs()
334 TRIGGER_TLR_MASK(priv->tx_trigger) << UART_TI752_TLR_TX | in omap8250_restore_regs()
335 TRIGGER_TLR_MASK(priv->rx_trigger) << UART_TI752_TLR_RX); in omap8250_restore_regs()
342 serial_out(up, UART_IER, up->ier); in omap8250_restore_regs()
345 serial_dl_write(up, priv->quot); in omap8250_restore_regs()
347 serial_out(up, UART_EFR, priv->efr); in omap8250_restore_regs()
351 serial_out(up, UART_XON1, priv->xon); in omap8250_restore_regs()
352 serial_out(up, UART_XOFF1, priv->xoff); in omap8250_restore_regs()
354 serial_out(up, UART_LCR, up->lcr); in omap8250_restore_regs()
358 __omap8250_set_mctrl(&up->port, up->port.mctrl); in omap8250_restore_regs()
360 serial_out(up, UART_OMAP_MDR3, priv->mdr3); in omap8250_restore_regs()
362 if (up->port.rs485.flags & SER_RS485_ENABLED && in omap8250_restore_regs()
363 up->port.rs485_config == serial8250_em485_config) in omap8250_restore_regs()
376 struct omap8250_priv *priv = up->port.private_data; in omap_8250_set_termios()
380 cval = UART_LCR_WLEN(tty_get_char_size(termios->c_cflag)); in omap_8250_set_termios()
382 if (termios->c_cflag & CSTOPB) in omap_8250_set_termios()
384 if (termios->c_cflag & PARENB) in omap_8250_set_termios()
386 if (!(termios->c_cflag & PARODD)) in omap_8250_set_termios()
388 if (termios->c_cflag & CMSPAR) in omap_8250_set_termios()
395 port->uartclk / 16 / UART_DIV_MAX, in omap_8250_set_termios()
396 port->uartclk / 13); in omap_8250_set_termios()
403 pm_runtime_get_sync(port->dev); in omap_8250_set_termios()
404 spin_lock_irq(&port->lock); in omap_8250_set_termios()
407 * Update the per-port timeout. in omap_8250_set_termios()
409 uart_update_timeout(port, termios->c_cflag, baud); in omap_8250_set_termios()
411 up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR; in omap_8250_set_termios()
412 if (termios->c_iflag & INPCK) in omap_8250_set_termios()
413 up->port.read_status_mask |= UART_LSR_FE | UART_LSR_PE; in omap_8250_set_termios()
414 if (termios->c_iflag & (IGNBRK | PARMRK)) in omap_8250_set_termios()
415 up->port.read_status_mask |= UART_LSR_BI; in omap_8250_set_termios()
420 up->port.ignore_status_mask = 0; in omap_8250_set_termios()
421 if (termios->c_iflag & IGNPAR) in omap_8250_set_termios()
422 up->port.ignore_status_mask |= UART_LSR_PE | UART_LSR_FE; in omap_8250_set_termios()
423 if (termios->c_iflag & IGNBRK) { in omap_8250_set_termios()
424 up->port.ignore_status_mask |= UART_LSR_BI; in omap_8250_set_termios()
429 if (termios->c_iflag & IGNPAR) in omap_8250_set_termios()
430 up->port.ignore_status_mask |= UART_LSR_OE; in omap_8250_set_termios()
436 if ((termios->c_cflag & CREAD) == 0) in omap_8250_set_termios()
437 up->port.ignore_status_mask |= UART_LSR_DR; in omap_8250_set_termios()
442 up->ier &= ~UART_IER_MSI; in omap_8250_set_termios()
443 if (UART_ENABLE_MS(&up->port, termios->c_cflag)) in omap_8250_set_termios()
444 up->ier |= UART_IER_MSI; in omap_8250_set_termios()
446 up->lcr = cval; in omap_8250_set_termios()
452 * - RX_TRIGGER amount of bytes in the FIFO will cause an interrupt. in omap_8250_set_termios()
453 * - less than RX_TRIGGER number of bytes will also cause an interrupt in omap_8250_set_termios()
455 * - Once THRE is enabled, the interrupt will be fired once the FIFO is in omap_8250_set_termios()
456 * empty - the trigger level is ignored here. in omap_8250_set_termios()
459 * - UART will assert the TX DMA line once there is room for TX_TRIGGER in omap_8250_set_termios()
462 * - UART will assert the RX DMA line once there are RX_TRIGGER bytes in in omap_8250_set_termios()
466 up->fcr = UART_FCR_ENABLE_FIFO; in omap_8250_set_termios()
467 up->fcr |= TRIGGER_FCR_MASK(priv->tx_trigger) << OMAP_UART_FCR_TX_TRIG; in omap_8250_set_termios()
468 up->fcr |= TRIGGER_FCR_MASK(priv->rx_trigger) << OMAP_UART_FCR_RX_TRIG; in omap_8250_set_termios()
470 priv->scr = OMAP_UART_SCR_RX_TRIG_GRANU1_MASK | OMAP_UART_SCR_TX_EMPTY | in omap_8250_set_termios()
473 if (up->dma) in omap_8250_set_termios()
474 priv->scr |= OMAP_UART_SCR_DMAMODE_1 | in omap_8250_set_termios()
477 priv->xon = termios->c_cc[VSTART]; in omap_8250_set_termios()
478 priv->xoff = termios->c_cc[VSTOP]; in omap_8250_set_termios()
480 priv->efr = 0; in omap_8250_set_termios()
481 up->port.status &= ~(UPSTAT_AUTOCTS | UPSTAT_AUTORTS | UPSTAT_AUTOXOFF); in omap_8250_set_termios()
483 if (termios->c_cflag & CRTSCTS && up->port.flags & UPF_HARD_FLOW && in omap_8250_set_termios()
484 !mctrl_gpio_to_gpiod(up->gpios, UART_GPIO_RTS) && in omap_8250_set_termios()
485 !mctrl_gpio_to_gpiod(up->gpios, UART_GPIO_CTS)) { in omap_8250_set_termios()
486 /* Enable AUTOCTS (autoRTS is enabled when RTS is raised) */ in omap_8250_set_termios()
487 up->port.status |= UPSTAT_AUTOCTS | UPSTAT_AUTORTS; in omap_8250_set_termios()
488 priv->efr |= UART_EFR_CTS; in omap_8250_set_termios()
489 } else if (up->port.flags & UPF_SOFT_FLOW) { in omap_8250_set_termios()
500 if (termios->c_iflag & IXOFF) { in omap_8250_set_termios()
501 up->port.status |= UPSTAT_AUTOXOFF; in omap_8250_set_termios()
502 priv->efr |= OMAP_UART_SW_TX; in omap_8250_set_termios()
507 spin_unlock_irq(&up->port.lock); in omap_8250_set_termios()
508 pm_runtime_mark_last_busy(port->dev); in omap_8250_set_termios()
509 pm_runtime_put_autosuspend(port->dev); in omap_8250_set_termios()
512 priv->calc_latency = USEC_PER_SEC * 64 * 8 / baud; in omap_8250_set_termios()
513 priv->latency = priv->calc_latency; in omap_8250_set_termios()
515 schedule_work(&priv->qos_work); in omap_8250_set_termios()
529 pm_runtime_get_sync(port->dev); in omap_8250_pm()
532 spin_lock_irq(&port->lock); in omap_8250_pm()
544 spin_unlock_irq(&port->lock); in omap_8250_pm()
546 pm_runtime_mark_last_busy(port->dev); in omap_8250_pm()
547 pm_runtime_put_autosuspend(port->dev); in omap_8250_pm()
581 dev_warn(up->port.dev, in omap_serial_fill_features_erratas()
592 priv->habit |= UART_ERRATA_i202_MDR1_ACCESS; in omap_serial_fill_features_erratas()
595 priv->habit |= UART_ERRATA_i202_MDR1_ACCESS | in omap_serial_fill_features_erratas()
599 priv->habit |= UART_ERRATA_i202_MDR1_ACCESS | in omap_serial_fill_features_erratas()
612 priv->habit &= ~UART_HAS_RHR_IT_DIS; in omap_serial_fill_features_erratas()
620 cpu_latency_qos_update_request(&priv->pm_qos_request, priv->latency); in omap8250_uart_qos_work()
630 struct uart_8250_port *up = serial8250_get_port(priv->line); in omap8250_irq()
631 struct uart_port *port = &up->port; in omap8250_irq()
636 if (up->dma) { in omap8250_irq()
652 if (priv->habit & UART_RX_TIMEOUT_QUIRK && in omap8250_irq()
659 if ((lsr & UART_LSR_OE) && up->overrun_backoff_time_ms > 0) { in omap8250_irq()
660 unsigned long delay; in omap8250_irq() local
663 spin_lock(&port->lock); in omap8250_irq()
664 up->ier = port->serial_in(port, UART_IER); in omap8250_irq()
665 if (up->ier & (UART_IER_RLSI | UART_IER_RDI)) { in omap8250_irq()
666 port->ops->stop_rx(port); in omap8250_irq()
671 cancel_delayed_work(&up->overrun_backoff); in omap8250_irq()
673 spin_unlock(&port->lock); in omap8250_irq()
675 delay = msecs_to_jiffies(up->overrun_backoff_time_ms); in omap8250_irq()
676 schedule_delayed_work(&up->overrun_backoff, delay); in omap8250_irq()
687 struct omap8250_priv *priv = port->private_data; in omap_8250_startup()
688 struct uart_8250_dma *dma = &priv->omap8250_dma; in omap_8250_startup()
691 if (priv->wakeirq) { in omap_8250_startup()
692 ret = dev_pm_set_dedicated_wake_irq(port->dev, priv->wakeirq); in omap_8250_startup()
697 pm_runtime_get_sync(port->dev); in omap_8250_startup()
703 up->lsr_saved_flags = 0; in omap_8250_startup()
704 up->msr_saved_flags = 0; in omap_8250_startup()
707 if (dma->fn && !uart_console(port)) { in omap_8250_startup()
708 up->dma = &priv->omap8250_dma; in omap_8250_startup()
711 dev_warn_ratelimited(port->dev, in omap_8250_startup()
713 up->dma = NULL; in omap_8250_startup()
716 up->dma = NULL; in omap_8250_startup()
720 spin_lock_irq(&port->lock); in omap_8250_startup()
721 up->ier = UART_IER_RLSI | UART_IER_RDI; in omap_8250_startup()
722 serial_out(up, UART_IER, up->ier); in omap_8250_startup()
723 spin_unlock_irq(&port->lock); in omap_8250_startup()
726 up->capabilities |= UART_CAP_RPM; in omap_8250_startup()
730 priv->wer = OMAP_UART_WER_MOD_WKUP; in omap_8250_startup()
731 if (priv->habit & OMAP_UART_WER_HAS_TX_WAKEUP) in omap_8250_startup()
732 priv->wer |= OMAP_UART_TX_WAKEUP_EN; in omap_8250_startup()
733 serial_out(up, UART_OMAP_WER, priv->wer); in omap_8250_startup()
735 if (up->dma && !(priv->habit & UART_HAS_EFR2)) { in omap_8250_startup()
736 spin_lock_irq(&port->lock); in omap_8250_startup()
737 up->dma->rx_dma(up); in omap_8250_startup()
738 spin_unlock_irq(&port->lock); in omap_8250_startup()
741 enable_irq(up->port.irq); in omap_8250_startup()
743 pm_runtime_mark_last_busy(port->dev); in omap_8250_startup()
744 pm_runtime_put_autosuspend(port->dev); in omap_8250_startup()
751 struct omap8250_priv *priv = port->private_data; in omap_8250_shutdown()
753 flush_work(&priv->qos_work); in omap_8250_shutdown()
754 if (up->dma) in omap_8250_shutdown()
757 pm_runtime_get_sync(port->dev); in omap_8250_shutdown()
760 if (priv->habit & UART_HAS_EFR2) in omap_8250_shutdown()
764 spin_lock_irq(&port->lock); in omap_8250_shutdown()
765 up->ier = 0; in omap_8250_shutdown()
767 spin_unlock_irq(&port->lock); in omap_8250_shutdown()
768 disable_irq_nosync(up->port.irq); in omap_8250_shutdown()
769 dev_pm_clear_wake_irq(port->dev); in omap_8250_shutdown()
772 up->dma = NULL; in omap_8250_shutdown()
777 if (up->lcr & UART_LCR_SBC) in omap_8250_shutdown()
778 serial_out(up, UART_LCR, up->lcr & ~UART_LCR_SBC); in omap_8250_shutdown()
781 pm_runtime_mark_last_busy(port->dev); in omap_8250_shutdown()
782 pm_runtime_put_autosuspend(port->dev); in omap_8250_shutdown()
787 struct omap8250_priv *priv = port->private_data; in omap_8250_throttle()
790 pm_runtime_get_sync(port->dev); in omap_8250_throttle()
792 spin_lock_irqsave(&port->lock, flags); in omap_8250_throttle()
793 port->ops->stop_rx(port); in omap_8250_throttle()
794 priv->throttled = true; in omap_8250_throttle()
795 spin_unlock_irqrestore(&port->lock, flags); in omap_8250_throttle()
797 pm_runtime_mark_last_busy(port->dev); in omap_8250_throttle()
798 pm_runtime_put_autosuspend(port->dev); in omap_8250_throttle()
803 struct omap8250_priv *priv = port->private_data; in omap_8250_unthrottle()
807 pm_runtime_get_sync(port->dev); in omap_8250_unthrottle()
810 spin_lock_irqsave(&port->lock, flags); in omap_8250_unthrottle()
811 priv->throttled = false; in omap_8250_unthrottle()
812 if (up->dma) in omap_8250_unthrottle()
813 up->dma->rx_dma(up); in omap_8250_unthrottle()
814 up->ier |= UART_IER_RLSI | UART_IER_RDI; in omap_8250_unthrottle()
815 port->read_status_mask |= UART_LSR_DR; in omap_8250_unthrottle()
816 serial_out(up, UART_IER, up->ier); in omap_8250_unthrottle()
817 spin_unlock_irqrestore(&port->lock, flags); in omap_8250_unthrottle()
819 pm_runtime_mark_last_busy(port->dev); in omap_8250_unthrottle()
820 pm_runtime_put_autosuspend(port->dev); in omap_8250_unthrottle()
825 struct serial_rs485 *rs485) in omap8250_rs485_config() argument
827 struct omap8250_priv *priv = port->private_data; in omap8250_rs485_config()
834 * There is a fixed delay of 3 bit clock cycles after the TX shift in omap8250_rs485_config()
838 * Additionally there appears to be a 1 bit clock delay between writing in omap8250_rs485_config()
842 if (priv->quot) { in omap8250_rs485_config()
843 if (priv->mdr1 == UART_OMAP_MDR1_16X_MODE) in omap8250_rs485_config()
844 baud = port->uartclk / (16 * priv->quot); in omap8250_rs485_config()
846 baud = port->uartclk / (13 * priv->quot); in omap8250_rs485_config()
853 * Fall back to RS485 software emulation if the UART is missing in omap8250_rs485_config()
855 * (indicates that RTS is unavailable due to a pinmux conflict) in omap8250_rs485_config()
858 if (!(priv->habit & UART_HAS_NATIVE_RS485) || in omap8250_rs485_config()
859 mctrl_gpio_to_gpiod(up->gpios, UART_GPIO_RTS) || in omap8250_rs485_config()
860 rs485->delay_rts_after_send > fixed_delay_rts_after_send || in omap8250_rs485_config()
861 rs485->delay_rts_before_send > fixed_delay_rts_before_send) { in omap8250_rs485_config()
862 priv->mdr3 &= ~UART_OMAP_MDR3_DIR_EN; in omap8250_rs485_config()
863 serial_out(up, UART_OMAP_MDR3, priv->mdr3); in omap8250_rs485_config()
865 port->rs485_config = serial8250_em485_config; in omap8250_rs485_config()
866 return serial8250_em485_config(port, termios, rs485); in omap8250_rs485_config()
869 rs485->delay_rts_after_send = fixed_delay_rts_after_send; in omap8250_rs485_config()
870 rs485->delay_rts_before_send = fixed_delay_rts_before_send; in omap8250_rs485_config()
872 if (rs485->flags & SER_RS485_ENABLED) in omap8250_rs485_config()
873 priv->mdr3 |= UART_OMAP_MDR3_DIR_EN; in omap8250_rs485_config()
875 priv->mdr3 &= ~UART_OMAP_MDR3_DIR_EN; in omap8250_rs485_config()
878 * Retain same polarity semantics as RS485 software emulation, in omap8250_rs485_config()
879 * i.e. SER_RS485_RTS_ON_SEND means driving RTS low on send. in omap8250_rs485_config()
881 if (rs485->flags & SER_RS485_RTS_ON_SEND) in omap8250_rs485_config()
882 priv->mdr3 &= ~UART_OMAP_MDR3_DIR_POL; in omap8250_rs485_config()
884 priv->mdr3 |= UART_OMAP_MDR3_DIR_POL; in omap8250_rs485_config()
886 serial_out(up, UART_OMAP_MDR3, priv->mdr3); in omap8250_rs485_config()
894 /* Must be called while priv->rx_dma_lock is held */
897 struct uart_8250_dma *dma = p->dma; in __dma_rx_do_complete()
898 struct tty_port *tty_port = &p->port.state->port; in __dma_rx_do_complete()
899 struct omap8250_priv *priv = p->port.private_data; in __dma_rx_do_complete()
900 struct dma_chan *rxchan = dma->rxchan; in __dma_rx_do_complete()
907 if (!dma->rx_running) in __dma_rx_do_complete()
910 cookie = dma->rx_cookie; in __dma_rx_do_complete()
911 dma->rx_running = 0; in __dma_rx_do_complete()
913 /* Re-enable RX FIFO interrupt now that transfer is complete */ in __dma_rx_do_complete()
914 if (priv->habit & UART_HAS_RHR_IT_DIS) { in __dma_rx_do_complete()
922 count = dma->rx_size - state.residue + state.in_flight_bytes; in __dma_rx_do_complete()
923 if (count < dma->rx_size) { in __dma_rx_do_complete()
934 poll_count--) in __dma_rx_do_complete()
937 if (poll_count == -1) in __dma_rx_do_complete()
938 dev_err(p->port.dev, "teardown incomplete\n"); in __dma_rx_do_complete()
943 ret = tty_insert_flip_string(tty_port, dma->rx_buf, count); in __dma_rx_do_complete()
945 p->port.icount.rx += ret; in __dma_rx_do_complete()
946 p->port.icount.buf_overrun += count - ret; in __dma_rx_do_complete()
955 struct omap8250_priv *priv = p->port.private_data; in __dma_rx_complete()
956 struct uart_8250_dma *dma = p->dma; in __dma_rx_complete()
961 spin_lock_irqsave(&p->port.lock, flags); in __dma_rx_complete()
968 if (dmaengine_tx_status(dma->rxchan, dma->rx_cookie, &state) != in __dma_rx_complete()
970 spin_unlock_irqrestore(&p->port.lock, flags); in __dma_rx_complete()
974 if (!priv->throttled) { in __dma_rx_complete()
975 p->ier |= UART_IER_RLSI | UART_IER_RDI; in __dma_rx_complete()
976 serial_out(p, UART_IER, p->ier); in __dma_rx_complete()
977 if (!(priv->habit & UART_HAS_EFR2)) in __dma_rx_complete()
981 spin_unlock_irqrestore(&p->port.lock, flags); in __dma_rx_complete()
986 struct omap8250_priv *priv = p->port.private_data; in omap_8250_rx_dma_flush()
987 struct uart_8250_dma *dma = p->dma; in omap_8250_rx_dma_flush()
992 spin_lock_irqsave(&priv->rx_dma_lock, flags); in omap_8250_rx_dma_flush()
994 if (!dma->rx_running) { in omap_8250_rx_dma_flush()
995 spin_unlock_irqrestore(&priv->rx_dma_lock, flags); in omap_8250_rx_dma_flush()
999 ret = dmaengine_tx_status(dma->rxchan, dma->rx_cookie, &state); in omap_8250_rx_dma_flush()
1001 ret = dmaengine_pause(dma->rxchan); in omap_8250_rx_dma_flush()
1003 priv->rx_dma_broken = true; in omap_8250_rx_dma_flush()
1006 spin_unlock_irqrestore(&priv->rx_dma_lock, flags); in omap_8250_rx_dma_flush()
1011 struct omap8250_priv *priv = p->port.private_data; in omap_8250_rx_dma()
1012 struct uart_8250_dma *dma = p->dma; in omap_8250_rx_dma()
1019 lockdep_assert_held_once(&p->port.lock); in omap_8250_rx_dma()
1021 if (priv->rx_dma_broken) in omap_8250_rx_dma()
1022 return -EINVAL; in omap_8250_rx_dma()
1024 spin_lock_irqsave(&priv->rx_dma_lock, flags); in omap_8250_rx_dma()
1026 if (dma->rx_running) { in omap_8250_rx_dma()
1029 state = dmaengine_tx_status(dma->rxchan, dma->rx_cookie, NULL); in omap_8250_rx_dma()
1035 p->ier &= ~(UART_IER_RLSI | UART_IER_RDI); in omap_8250_rx_dma()
1036 serial_out(p, UART_IER, p->ier); in omap_8250_rx_dma()
1041 desc = dmaengine_prep_slave_single(dma->rxchan, dma->rx_addr, in omap_8250_rx_dma()
1042 dma->rx_size, DMA_DEV_TO_MEM, in omap_8250_rx_dma()
1045 err = -EBUSY; in omap_8250_rx_dma()
1049 dma->rx_running = 1; in omap_8250_rx_dma()
1050 desc->callback = __dma_rx_complete; in omap_8250_rx_dma()
1051 desc->callback_param = p; in omap_8250_rx_dma()
1053 dma->rx_cookie = dmaengine_submit(desc); in omap_8250_rx_dma()
1060 if (priv->habit & UART_HAS_RHR_IT_DIS) { in omap_8250_rx_dma()
1066 dma_async_issue_pending(dma->rxchan); in omap_8250_rx_dma()
1068 spin_unlock_irqrestore(&priv->rx_dma_lock, flags); in omap_8250_rx_dma()
1077 struct uart_8250_dma *dma = p->dma; in omap_8250_dma_tx_complete()
1078 struct circ_buf *xmit = &p->port.state->xmit; in omap_8250_dma_tx_complete()
1081 struct omap8250_priv *priv = p->port.private_data; in omap_8250_dma_tx_complete()
1083 dma_sync_single_for_cpu(dma->txchan->device->dev, dma->tx_addr, in omap_8250_dma_tx_complete()
1086 spin_lock_irqsave(&p->port.lock, flags); in omap_8250_dma_tx_complete()
1088 dma->tx_running = 0; in omap_8250_dma_tx_complete()
1090 uart_xmit_advance(&p->port, dma->tx_size); in omap_8250_dma_tx_complete()
1092 if (priv->delayed_restore) { in omap_8250_dma_tx_complete()
1093 priv->delayed_restore = 0; in omap_8250_dma_tx_complete()
1098 uart_write_wakeup(&p->port); in omap_8250_dma_tx_complete()
1100 if (!uart_circ_empty(xmit) && !uart_tx_stopped(&p->port)) { in omap_8250_dma_tx_complete()
1106 } else if (p->capabilities & UART_CAP_RPM) { in omap_8250_dma_tx_complete()
1111 dma->tx_err = 1; in omap_8250_dma_tx_complete()
1115 spin_unlock_irqrestore(&p->port.lock, flags); in omap_8250_dma_tx_complete()
1120 struct uart_8250_dma *dma = p->dma; in omap_8250_tx_dma()
1121 struct omap8250_priv *priv = p->port.private_data; in omap_8250_tx_dma()
1122 struct circ_buf *xmit = &p->port.state->xmit; in omap_8250_tx_dma()
1127 if (dma->tx_running) in omap_8250_tx_dma()
1129 if (uart_tx_stopped(&p->port) || uart_circ_empty(xmit)) { in omap_8250_tx_dma()
1136 if (dma->tx_err || p->capabilities & UART_CAP_RPM) { in omap_8250_tx_dma()
1137 ret = -EBUSY; in omap_8250_tx_dma()
1144 dma->tx_size = CIRC_CNT_TO_END(xmit->head, xmit->tail, UART_XMIT_SIZE); in omap_8250_tx_dma()
1145 if (priv->habit & OMAP_DMA_TX_KICK) { in omap_8250_tx_dma()
1164 if (tx_lvl == p->tx_loadsz) { in omap_8250_tx_dma()
1165 ret = -EBUSY; in omap_8250_tx_dma()
1168 if (dma->tx_size < 4) { in omap_8250_tx_dma()
1169 ret = -EINVAL; in omap_8250_tx_dma()
1175 desc = dmaengine_prep_slave_single(dma->txchan, in omap_8250_tx_dma()
1176 dma->tx_addr + xmit->tail + skip_byte, in omap_8250_tx_dma()
1177 dma->tx_size - skip_byte, DMA_MEM_TO_DEV, in omap_8250_tx_dma()
1180 ret = -EBUSY; in omap_8250_tx_dma()
1184 dma->tx_running = 1; in omap_8250_tx_dma()
1186 desc->callback = omap_8250_dma_tx_complete; in omap_8250_tx_dma()
1187 desc->callback_param = p; in omap_8250_tx_dma()
1189 dma->tx_cookie = dmaengine_submit(desc); in omap_8250_tx_dma()
1191 dma_sync_single_for_device(dma->txchan->device->dev, dma->tx_addr, in omap_8250_tx_dma()
1194 dma_async_issue_pending(dma->txchan); in omap_8250_tx_dma()
1195 if (dma->tx_err) in omap_8250_tx_dma()
1196 dma->tx_err = 0; in omap_8250_tx_dma()
1200 serial_out(p, UART_TX, xmit->buf[xmit->tail]); in omap_8250_tx_dma()
1203 dma->tx_err = 1; in omap_8250_tx_dma()
1236 lockdep_assert_held_once(&up->port.lock); in am654_8250_handle_rx_dma()
1242 (up->ier & UART_IER_RDI)) { in am654_8250_handle_rx_dma()
1249 * periodic timeouts, re-enable interrupts. in am654_8250_handle_rx_dma()
1251 up->ier &= ~(UART_IER_RLSI | UART_IER_RDI); in am654_8250_handle_rx_dma()
1252 serial_out(up, UART_IER, up->ier); in am654_8250_handle_rx_dma()
1256 up->ier |= UART_IER_RLSI | UART_IER_RDI; in am654_8250_handle_rx_dma()
1257 serial_out(up, UART_IER, up->ier); in am654_8250_handle_rx_dma()
1264 * use the default routine in the non-DMA case and this one for with DMA.
1269 struct omap8250_priv *priv = up->port.private_data; in omap_8250_dma_handle_irq()
1281 spin_lock(&port->lock); in omap_8250_dma_handle_irq()
1285 if (priv->habit & UART_HAS_EFR2) in omap_8250_dma_handle_irq()
1291 if (status & UART_LSR_THRE && up->dma->tx_err) { in omap_8250_dma_handle_irq()
1292 if (uart_tx_stopped(&up->port) || in omap_8250_dma_handle_irq()
1293 uart_circ_empty(&up->port.state->xmit)) { in omap_8250_dma_handle_irq()
1294 up->dma->tx_err = 0; in omap_8250_dma_handle_irq()
1321 return -EINVAL; in omap_8250_rx_dma()
1361 { .compatible = "ti,am654-uart", .data = &am654_platdata, },
1362 { .compatible = "ti,omap2-uart" },
1363 { .compatible = "ti,omap3-uart" },
1364 { .compatible = "ti,omap4-uart", .data = &omap4_platdata, },
1365 { .compatible = "ti,am3352-uart", .data = &am33xx_platdata, },
1366 { .compatible = "ti,am4372-uart", .data = &am33xx_platdata, },
1367 { .compatible = "ti,dra742-uart", .data = &omap4_platdata, },
1374 struct device_node *np = pdev->dev.of_node; in omap8250_probe()
1388 dev_err(&pdev->dev, "missing registers\n"); in omap8250_probe()
1389 return -EINVAL; in omap8250_probe()
1392 priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL); in omap8250_probe()
1394 return -ENOMEM; in omap8250_probe()
1396 membase = devm_ioremap(&pdev->dev, regs->start, in omap8250_probe()
1399 return -ENODEV; in omap8250_probe()
1402 up.port.dev = &pdev->dev; in omap8250_probe()
1403 up.port.mapbase = regs->start; in omap8250_probe()
1441 /* same rs485_supported for software emulation and native RS485 */ in omap8250_probe()
1449 dev_err(&pdev->dev, "failed to get alias\n"); in omap8250_probe()
1454 if (of_property_read_u32(np, "clock-frequency", &up.port.uartclk)) { in omap8250_probe()
1457 clk = devm_clk_get(&pdev->dev, NULL); in omap8250_probe()
1459 if (PTR_ERR(clk) == -EPROBE_DEFER) in omap8250_probe()
1460 return -EPROBE_DEFER; in omap8250_probe()
1466 if (of_property_read_u32(np, "overrun-throttle-ms", in omap8250_probe()
1470 pdata = of_device_get_match_data(&pdev->dev); in omap8250_probe()
1472 priv->habit |= pdata->habit; in omap8250_probe()
1476 dev_warn(&pdev->dev, in omap8250_probe()
1481 priv->membase = membase; in omap8250_probe()
1482 priv->line = -ENODEV; in omap8250_probe()
1483 priv->latency = PM_QOS_CPU_LATENCY_DEFAULT_VALUE; in omap8250_probe()
1484 priv->calc_latency = PM_QOS_CPU_LATENCY_DEFAULT_VALUE; in omap8250_probe()
1485 cpu_latency_qos_add_request(&priv->pm_qos_request, priv->latency); in omap8250_probe()
1486 INIT_WORK(&priv->qos_work, omap8250_uart_qos_work); in omap8250_probe()
1488 spin_lock_init(&priv->rx_dma_lock); in omap8250_probe()
1492 device_init_wakeup(&pdev->dev, true); in omap8250_probe()
1493 pm_runtime_enable(&pdev->dev); in omap8250_probe()
1494 pm_runtime_use_autosuspend(&pdev->dev); in omap8250_probe()
1497 * Disable runtime PM until autosuspend delay unless specifically in omap8250_probe()
1499 * prevent an unsafe default policy with lossy characters on wake-up. in omap8250_probe()
1503 if (!of_get_available_child_count(pdev->dev.of_node)) in omap8250_probe()
1504 pm_runtime_set_autosuspend_delay(&pdev->dev, -1); in omap8250_probe()
1506 pm_runtime_irq_safe(&pdev->dev); in omap8250_probe()
1508 pm_runtime_get_sync(&pdev->dev); in omap8250_probe()
1512 priv->rx_trigger = RX_TRIGGER; in omap8250_probe()
1513 priv->tx_trigger = TX_TRIGGER; in omap8250_probe()
1523 ret = of_property_count_strings(np, "dma-names"); in omap8250_probe()
1526 struct uart_8250_dma *dma = &priv->omap8250_dma; in omap8250_probe()
1528 dma->fn = the_no_dma_filter_fn; in omap8250_probe()
1529 dma->tx_dma = omap_8250_tx_dma; in omap8250_probe()
1530 dma->rx_dma = omap_8250_rx_dma; in omap8250_probe()
1532 dma_params = pdata->dma_params; in omap8250_probe()
1535 dma->rx_size = dma_params->rx_size; in omap8250_probe()
1536 dma->rxconf.src_maxburst = dma_params->rx_trigger; in omap8250_probe()
1537 dma->txconf.dst_maxburst = dma_params->tx_trigger; in omap8250_probe()
1538 priv->rx_trigger = dma_params->rx_trigger; in omap8250_probe()
1539 priv->tx_trigger = dma_params->tx_trigger; in omap8250_probe()
1541 dma->rx_size = RX_TRIGGER; in omap8250_probe()
1542 dma->rxconf.src_maxburst = RX_TRIGGER; in omap8250_probe()
1543 dma->txconf.dst_maxburst = TX_TRIGGER; in omap8250_probe()
1549 ret = devm_request_irq(&pdev->dev, irq, omap8250_irq, 0, in omap8250_probe()
1550 dev_name(&pdev->dev), priv); in omap8250_probe()
1554 priv->wakeirq = irq_of_parse_and_map(np, 1); in omap8250_probe()
1558 dev_err(&pdev->dev, "unable to register 8250 port\n"); in omap8250_probe()
1561 priv->line = ret; in omap8250_probe()
1562 pm_runtime_mark_last_busy(&pdev->dev); in omap8250_probe()
1563 pm_runtime_put_autosuspend(&pdev->dev); in omap8250_probe()
1566 pm_runtime_dont_use_autosuspend(&pdev->dev); in omap8250_probe()
1567 pm_runtime_put_sync(&pdev->dev); in omap8250_probe()
1568 flush_work(&priv->qos_work); in omap8250_probe()
1569 pm_runtime_disable(&pdev->dev); in omap8250_probe()
1570 cpu_latency_qos_remove_request(&priv->pm_qos_request); in omap8250_probe()
1580 err = pm_runtime_resume_and_get(&pdev->dev); in omap8250_remove()
1584 up = serial8250_get_port(priv->line); in omap8250_remove()
1585 omap_8250_shutdown(&up->port); in omap8250_remove()
1586 serial8250_unregister_port(priv->line); in omap8250_remove()
1587 priv->line = -ENODEV; in omap8250_remove()
1588 pm_runtime_dont_use_autosuspend(&pdev->dev); in omap8250_remove()
1589 pm_runtime_put_sync(&pdev->dev); in omap8250_remove()
1590 flush_work(&priv->qos_work); in omap8250_remove()
1591 pm_runtime_disable(&pdev->dev); in omap8250_remove()
1592 cpu_latency_qos_remove_request(&priv->pm_qos_request); in omap8250_remove()
1593 device_init_wakeup(&pdev->dev, false); in omap8250_remove()
1603 priv->is_suspending = true; in omap8250_prepare()
1613 priv->is_suspending = false; in omap8250_complete()
1619 struct uart_8250_port *up = serial8250_get_port(priv->line); in omap8250_suspend()
1622 serial8250_suspend_port(priv->line); in omap8250_suspend()
1628 priv->wer = 0; in omap8250_suspend()
1629 serial_out(up, UART_OMAP_WER, priv->wer); in omap8250_suspend()
1630 if (uart_console(&up->port) && console_suspend_enabled) in omap8250_suspend()
1632 flush_work(&priv->qos_work); in omap8250_suspend()
1640 struct uart_8250_port *up = serial8250_get_port(priv->line); in omap8250_resume()
1643 if (uart_console(&up->port) && console_suspend_enabled) { in omap8250_resume()
1649 serial8250_resume_port(priv->line); in omap8250_resume()
1674 writel(val, priv->membase + (reg << OMAP_UART_REGSHIFT)); in uart_write()
1708 } while (--timeout && !(syss & OMAP_UART_SYSS_RESETDONE)); in omap8250_soft_reset()
1712 return -ETIMEDOUT; in omap8250_soft_reset()
1723 if (priv->line >= 0) in omap8250_runtime_suspend()
1724 up = serial8250_get_port(priv->line); in omap8250_runtime_suspend()
1726 if (priv->habit & UART_ERRATA_CLOCK_DISABLE) { in omap8250_runtime_suspend()
1737 serial_out(up, UART_OMAP_WER, priv->wer); in omap8250_runtime_suspend()
1741 if (up && up->dma && up->dma->rxchan) in omap8250_runtime_suspend()
1744 priv->latency = PM_QOS_CPU_LATENCY_DEFAULT_VALUE; in omap8250_runtime_suspend()
1745 schedule_work(&priv->qos_work); in omap8250_runtime_suspend()
1755 if (priv->line >= 0) in omap8250_runtime_resume()
1756 up = serial8250_get_port(priv->line); in omap8250_runtime_resume()
1759 spin_lock_irq(&up->port.lock); in omap8250_runtime_resume()
1761 spin_unlock_irq(&up->port.lock); in omap8250_runtime_resume()
1764 if (up && up->dma && up->dma->rxchan && !(priv->habit & UART_HAS_EFR2)) { in omap8250_runtime_resume()
1765 spin_lock_irq(&up->port.lock); in omap8250_runtime_resume()
1767 spin_unlock_irq(&up->port.lock); in omap8250_runtime_resume()
1770 priv->latency = priv->calc_latency; in omap8250_runtime_resume()
1771 schedule_work(&priv->qos_work); in omap8250_runtime_resume()
1793 idx = *omap_str - '0'; in omap8250_console_fixup()