Lines Matching refs:regmap_field_write
393 regmap_field_write(priv->rf[index], enable ? 0 : 1); in tsens_set_interrupt_v1()
424 regmap_field_write(priv->rf[index_mask], 0); in tsens_set_interrupt_v2()
426 regmap_field_write(priv->rf[index_mask], 1); in tsens_set_interrupt_v2()
427 regmap_field_write(priv->rf[index_clear], 1); in tsens_set_interrupt_v2()
428 regmap_field_write(priv->rf[index_clear], 0); in tsens_set_interrupt_v2()
582 regmap_field_write(priv->rf[WDOG_BARK_CLEAR], 1); in tsens_critical_irq_thread()
583 regmap_field_write(priv->rf[WDOG_BARK_CLEAR], 0); in tsens_critical_irq_thread()
719 regmap_field_write(priv->rf[LOW_THRESH_0 + hw_id], low_val); in tsens_set_trips()
720 regmap_field_write(priv->rf[UP_THRESH_0 + hw_id], high_val); in tsens_set_trips()
737 ret = regmap_field_write(priv->rf[INT_EN], val); in tsens_enable_irq()
747 regmap_field_write(priv->rf[INT_EN], 0); in tsens_disable_irq()
972 regmap_field_write(priv->rf[TSENS_EN], 1); in init_common()
1057 regmap_field_write(priv->rf[WDOG_BARK_MASK], 0); in init_common()
1058 regmap_field_write(priv->rf[CC_MON_MASK], 1); in init_common()
1221 regmap_field_write(priv->rf[CRIT_THRESH_0], in tsens_register()
1224 regmap_field_write(priv->rf[CRIT_THRESH_1], in tsens_register()