Lines Matching refs:low
22 u32 low, high; in intel_tcc_get_tjmax() local
26 err = rdmsr_safe(MSR_IA32_TEMPERATURE_TARGET, &low, &high); in intel_tcc_get_tjmax()
28 err = rdmsr_safe_on_cpu(cpu, MSR_IA32_TEMPERATURE_TARGET, &low, &high); in intel_tcc_get_tjmax()
32 val = (low >> 16) & 0xff; in intel_tcc_get_tjmax()
49 u32 low, high; in intel_tcc_get_offset() local
53 err = rdmsr_safe(MSR_IA32_TEMPERATURE_TARGET, &low, &high); in intel_tcc_get_offset()
55 err = rdmsr_safe_on_cpu(cpu, MSR_IA32_TEMPERATURE_TARGET, &low, &high); in intel_tcc_get_offset()
59 return (low >> 24) & 0x3f; in intel_tcc_get_offset()
76 u32 low, high; in intel_tcc_set_offset() local
83 err = rdmsr_safe(MSR_IA32_TEMPERATURE_TARGET, &low, &high); in intel_tcc_set_offset()
85 err = rdmsr_safe_on_cpu(cpu, MSR_IA32_TEMPERATURE_TARGET, &low, &high); in intel_tcc_set_offset()
90 if (low & BIT(31)) in intel_tcc_set_offset()
93 low &= ~(0x3f << 24); in intel_tcc_set_offset()
94 low |= offset << 24; in intel_tcc_set_offset()
97 return wrmsr_safe(MSR_IA32_TEMPERATURE_TARGET, low, high); in intel_tcc_set_offset()
99 return wrmsr_safe_on_cpu(cpu, MSR_IA32_TEMPERATURE_TARGET, low, high); in intel_tcc_set_offset()
115 u32 low, high; in intel_tcc_get_temp() local
124 err = rdmsr_safe(msr, &low, &high); in intel_tcc_get_temp()
126 err = rdmsr_safe_on_cpu(cpu, msr, &low, &high); in intel_tcc_get_temp()
131 if (!(low & BIT(31))) in intel_tcc_get_temp()
134 temp = tjmax - ((low >> 16) & 0x7f); in intel_tcc_get_temp()