76 #define REG_CONTROL		(0x00)  macro
124 	u32 control = mchp_corespi_read(spi, REG_CONTROL);  in mchp_corespi_disable()
128 	mchp_corespi_write(spi, REG_CONTROL, control);  in mchp_corespi_disable()
155 	control = mchp_corespi_read(spi, REG_CONTROL);  in mchp_corespi_enable_ints()
158 	mchp_corespi_write(spi, REG_CONTROL, control);  in mchp_corespi_enable_ints()
161 	mchp_corespi_write(spi, REG_CONTROL, control);  in mchp_corespi_enable_ints()
170 	control = mchp_corespi_read(spi, REG_CONTROL);  in mchp_corespi_disable_ints()
172 	mchp_corespi_write(spi, REG_CONTROL, control);  in mchp_corespi_disable_ints()
175 	mchp_corespi_write(spi, REG_CONTROL, control);  in mchp_corespi_disable_ints()
197 	control = mchp_corespi_read(spi, REG_CONTROL);  in mchp_corespi_set_xfer_size()
200 	mchp_corespi_write(spi, REG_CONTROL, control);  in mchp_corespi_set_xfer_size()
206 	mchp_corespi_write(spi, REG_CONTROL, control);  in mchp_corespi_set_xfer_size()
239 	control = mchp_corespi_read(spi, REG_CONTROL);  in mchp_corespi_set_framesize()
241 	mchp_corespi_write(spi, REG_CONTROL, control);  in mchp_corespi_set_framesize()
277 	u32 control = mchp_corespi_read(spi, REG_CONTROL);  in mchp_corespi_init()
298 	control = mchp_corespi_read(spi, REG_CONTROL);  in mchp_corespi_init()
301 	mchp_corespi_write(spi, REG_CONTROL, control);  in mchp_corespi_init()
312 	control = mchp_corespi_read(spi, REG_CONTROL);  in mchp_corespi_init()
317 	mchp_corespi_write(spi, REG_CONTROL, control);  in mchp_corespi_init()
326 	control = mchp_corespi_read(spi, REG_CONTROL);  in mchp_corespi_set_clk_gen()
333 	mchp_corespi_write(spi, REG_CONTROL, control);  in mchp_corespi_set_clk_gen()
334 	mchp_corespi_write(spi, REG_CONTROL, control | CONTROL_ENABLE);  in mchp_corespi_set_clk_gen()
362 	control = mchp_corespi_read(spi, REG_CONTROL);  in mchp_corespi_set_mode()
366 	mchp_corespi_write(spi, REG_CONTROL, control);  in mchp_corespi_set_mode()
369 	mchp_corespi_write(spi, REG_CONTROL, control);  in mchp_corespi_set_mode()