Lines Matching refs:spi_imx
71 void (*intctrl)(struct spi_imx_data *spi_imx, int enable);
72 int (*prepare_message)(struct spi_imx_data *spi_imx, struct spi_message *msg);
73 int (*prepare_transfer)(struct spi_imx_data *spi_imx, struct spi_device *spi);
74 void (*trigger)(struct spi_imx_data *spi_imx);
75 int (*rx_available)(struct spi_imx_data *spi_imx);
76 void (*reset)(struct spi_imx_data *spi_imx);
77 void (*setup_wml)(struct spi_imx_data *spi_imx);
78 void (*disable)(struct spi_imx_data *spi_imx);
108 void (*tx)(struct spi_imx_data *spi_imx);
109 void (*rx)(struct spi_imx_data *spi_imx);
151 static void spi_imx_buf_rx_##type(struct spi_imx_data *spi_imx) \
153 unsigned int val = readl(spi_imx->base + MXC_CSPIRXDATA); \
155 if (spi_imx->rx_buf) { \
156 *(type *)spi_imx->rx_buf = val; \
157 spi_imx->rx_buf += sizeof(type); \
160 spi_imx->remainder -= sizeof(type); \
164 static void spi_imx_buf_tx_##type(struct spi_imx_data *spi_imx) \
168 if (spi_imx->tx_buf) { \
169 val = *(type *)spi_imx->tx_buf; \
170 spi_imx->tx_buf += sizeof(type); \
173 spi_imx->count -= sizeof(type); \
175 writel(val, spi_imx->base + MXC_CSPITXDATA); \
235 struct spi_imx_data *spi_imx = spi_controller_get_devdata(controller); in spi_imx_can_dma() local
243 if (spi_imx->target_mode) in spi_imx_can_dma()
246 if (transfer->len < spi_imx->devtype_data->fifo_size) in spi_imx_can_dma()
249 spi_imx->dynamic_burst = 0; in spi_imx_can_dma()
306 static void spi_imx_buf_rx_swap_u32(struct spi_imx_data *spi_imx) in spi_imx_buf_rx_swap_u32() argument
308 unsigned int val = readl(spi_imx->base + MXC_CSPIRXDATA); in spi_imx_buf_rx_swap_u32()
310 if (spi_imx->rx_buf) { in spi_imx_buf_rx_swap_u32()
314 bytes_per_word = spi_imx_bytes_per_word(spi_imx->bits_per_word); in spi_imx_buf_rx_swap_u32()
320 *(u32 *)spi_imx->rx_buf = val; in spi_imx_buf_rx_swap_u32()
321 spi_imx->rx_buf += sizeof(u32); in spi_imx_buf_rx_swap_u32()
324 spi_imx->remainder -= sizeof(u32); in spi_imx_buf_rx_swap_u32()
327 static void spi_imx_buf_rx_swap(struct spi_imx_data *spi_imx) in spi_imx_buf_rx_swap() argument
332 unaligned = spi_imx->remainder % 4; in spi_imx_buf_rx_swap()
335 spi_imx_buf_rx_swap_u32(spi_imx); in spi_imx_buf_rx_swap()
339 if (spi_imx_bytes_per_word(spi_imx->bits_per_word) == 2) { in spi_imx_buf_rx_swap()
340 spi_imx_buf_rx_u16(spi_imx); in spi_imx_buf_rx_swap()
344 val = readl(spi_imx->base + MXC_CSPIRXDATA); in spi_imx_buf_rx_swap()
347 if (spi_imx->rx_buf) { in spi_imx_buf_rx_swap()
348 *(u8 *)spi_imx->rx_buf = (val >> (8 * unaligned)) & 0xff; in spi_imx_buf_rx_swap()
349 spi_imx->rx_buf++; in spi_imx_buf_rx_swap()
351 spi_imx->remainder--; in spi_imx_buf_rx_swap()
355 static void spi_imx_buf_tx_swap_u32(struct spi_imx_data *spi_imx) in spi_imx_buf_tx_swap_u32() argument
362 if (spi_imx->tx_buf) { in spi_imx_buf_tx_swap_u32()
363 val = *(u32 *)spi_imx->tx_buf; in spi_imx_buf_tx_swap_u32()
364 spi_imx->tx_buf += sizeof(u32); in spi_imx_buf_tx_swap_u32()
367 spi_imx->count -= sizeof(u32); in spi_imx_buf_tx_swap_u32()
369 bytes_per_word = spi_imx_bytes_per_word(spi_imx->bits_per_word); in spi_imx_buf_tx_swap_u32()
376 writel(val, spi_imx->base + MXC_CSPITXDATA); in spi_imx_buf_tx_swap_u32()
379 static void spi_imx_buf_tx_swap(struct spi_imx_data *spi_imx) in spi_imx_buf_tx_swap() argument
384 unaligned = spi_imx->count % 4; in spi_imx_buf_tx_swap()
387 spi_imx_buf_tx_swap_u32(spi_imx); in spi_imx_buf_tx_swap()
391 if (spi_imx_bytes_per_word(spi_imx->bits_per_word) == 2) { in spi_imx_buf_tx_swap()
392 spi_imx_buf_tx_u16(spi_imx); in spi_imx_buf_tx_swap()
397 if (spi_imx->tx_buf) { in spi_imx_buf_tx_swap()
398 val |= *(u8 *)spi_imx->tx_buf << (8 * unaligned); in spi_imx_buf_tx_swap()
399 spi_imx->tx_buf++; in spi_imx_buf_tx_swap()
401 spi_imx->count--; in spi_imx_buf_tx_swap()
404 writel(val, spi_imx->base + MXC_CSPITXDATA); in spi_imx_buf_tx_swap()
407 static void mx53_ecspi_rx_target(struct spi_imx_data *spi_imx) in mx53_ecspi_rx_target() argument
409 u32 val = be32_to_cpu(readl(spi_imx->base + MXC_CSPIRXDATA)); in mx53_ecspi_rx_target()
411 if (spi_imx->rx_buf) { in mx53_ecspi_rx_target()
412 int n_bytes = spi_imx->target_burst % sizeof(val); in mx53_ecspi_rx_target()
417 memcpy(spi_imx->rx_buf, in mx53_ecspi_rx_target()
420 spi_imx->rx_buf += n_bytes; in mx53_ecspi_rx_target()
421 spi_imx->target_burst -= n_bytes; in mx53_ecspi_rx_target()
424 spi_imx->remainder -= sizeof(u32); in mx53_ecspi_rx_target()
427 static void mx53_ecspi_tx_target(struct spi_imx_data *spi_imx) in mx53_ecspi_tx_target() argument
430 int n_bytes = spi_imx->count % sizeof(val); in mx53_ecspi_tx_target()
435 if (spi_imx->tx_buf) { in mx53_ecspi_tx_target()
437 spi_imx->tx_buf, n_bytes); in mx53_ecspi_tx_target()
439 spi_imx->tx_buf += n_bytes; in mx53_ecspi_tx_target()
442 spi_imx->count -= n_bytes; in mx53_ecspi_tx_target()
444 writel(val, spi_imx->base + MXC_CSPITXDATA); in mx53_ecspi_tx_target()
448 static unsigned int mx51_ecspi_clkdiv(struct spi_imx_data *spi_imx, in mx51_ecspi_clkdiv() argument
456 unsigned int fin = spi_imx->spi_clk; in mx51_ecspi_clkdiv()
468 dev_err(spi_imx->dev, "cannot set clock freq: %u (base freq: %u)\n", in mx51_ecspi_clkdiv()
475 dev_dbg(spi_imx->dev, "%s: fin: %u, fspi: %u, post: %u, pre: %u\n", in mx51_ecspi_clkdiv()
485 static void mx51_ecspi_intctrl(struct spi_imx_data *spi_imx, int enable) in mx51_ecspi_intctrl() argument
498 writel(val, spi_imx->base + MX51_ECSPI_INT); in mx51_ecspi_intctrl()
501 static void mx51_ecspi_trigger(struct spi_imx_data *spi_imx) in mx51_ecspi_trigger() argument
505 reg = readl(spi_imx->base + MX51_ECSPI_CTRL); in mx51_ecspi_trigger()
507 writel(reg, spi_imx->base + MX51_ECSPI_CTRL); in mx51_ecspi_trigger()
510 static void mx51_ecspi_disable(struct spi_imx_data *spi_imx) in mx51_ecspi_disable() argument
514 ctrl = readl(spi_imx->base + MX51_ECSPI_CTRL); in mx51_ecspi_disable()
516 writel(ctrl, spi_imx->base + MX51_ECSPI_CTRL); in mx51_ecspi_disable()
526 static int mx51_ecspi_prepare_message(struct spi_imx_data *spi_imx, in mx51_ecspi_prepare_message() argument
534 u32 cfg = readl(spi_imx->base + MX51_ECSPI_CONFIG); in mx51_ecspi_prepare_message()
539 if (spi_imx->target_mode) in mx51_ecspi_prepare_message()
548 ctrl |= MX51_ECSPI_CTRL_DRCTL(spi_imx->spi_drctl); in mx51_ecspi_prepare_message()
557 writel(ctrl, spi_imx->base + MX51_ECSPI_CTRL); in mx51_ecspi_prepare_message()
559 testreg = readl(spi_imx->base + MX51_ECSPI_TESTREG); in mx51_ecspi_prepare_message()
564 writel(testreg, spi_imx->base + MX51_ECSPI_TESTREG); in mx51_ecspi_prepare_message()
571 if (spi_imx->target_mode && is_imx53_ecspi(spi_imx)) in mx51_ecspi_prepare_message()
597 writel(cfg, spi_imx->base + MX51_ECSPI_CONFIG); in mx51_ecspi_prepare_message()
631 static void mx51_configure_cpha(struct spi_imx_data *spi_imx, in mx51_configure_cpha() argument
635 bool flip_cpha = (spi->mode & SPI_RX_CPHA_FLIP) && spi_imx->rx_only; in mx51_configure_cpha()
636 u32 cfg = readl(spi_imx->base + MX51_ECSPI_CONFIG); in mx51_configure_cpha()
647 writel(cfg, spi_imx->base + MX51_ECSPI_CONFIG); in mx51_configure_cpha()
650 static int mx51_ecspi_prepare_transfer(struct spi_imx_data *spi_imx, in mx51_ecspi_prepare_transfer() argument
653 u32 ctrl = readl(spi_imx->base + MX51_ECSPI_CTRL); in mx51_ecspi_prepare_transfer()
658 if (spi_imx->target_mode && is_imx53_ecspi(spi_imx)) in mx51_ecspi_prepare_transfer()
659 ctrl |= (spi_imx->target_burst * 8 - 1) in mx51_ecspi_prepare_transfer()
662 if (spi_imx->count >= 512) in mx51_ecspi_prepare_transfer()
665 ctrl |= (spi_imx->count * spi_imx->bits_per_word - 1) in mx51_ecspi_prepare_transfer()
672 ctrl |= mx51_ecspi_clkdiv(spi_imx, spi_imx->spi_bus_clk, &clk); in mx51_ecspi_prepare_transfer()
673 spi_imx->spi_bus_clk = clk; in mx51_ecspi_prepare_transfer()
675 mx51_configure_cpha(spi_imx, spi); in mx51_ecspi_prepare_transfer()
681 if (spi_imx->usedma && spi_imx->devtype_data->tx_glitch_fixed) in mx51_ecspi_prepare_transfer()
686 writel(ctrl, spi_imx->base + MX51_ECSPI_CTRL); in mx51_ecspi_prepare_transfer()
691 static void mx51_setup_wml(struct spi_imx_data *spi_imx) in mx51_setup_wml() argument
695 if (spi_imx->devtype_data->tx_glitch_fixed) in mx51_setup_wml()
696 tx_wml = spi_imx->wml; in mx51_setup_wml()
701 writel(MX51_ECSPI_DMA_RX_WML(spi_imx->wml - 1) | in mx51_setup_wml()
703 MX51_ECSPI_DMA_RXT_WML(spi_imx->wml) | in mx51_setup_wml()
705 MX51_ECSPI_DMA_RXTDEN, spi_imx->base + MX51_ECSPI_DMA); in mx51_setup_wml()
708 static int mx51_ecspi_rx_available(struct spi_imx_data *spi_imx) in mx51_ecspi_rx_available() argument
710 return readl(spi_imx->base + MX51_ECSPI_STAT) & MX51_ECSPI_STAT_RR; in mx51_ecspi_rx_available()
713 static void mx51_ecspi_reset(struct spi_imx_data *spi_imx) in mx51_ecspi_reset() argument
716 while (mx51_ecspi_rx_available(spi_imx)) in mx51_ecspi_reset()
717 readl(spi_imx->base + MXC_CSPIRXDATA); in mx51_ecspi_reset()
751 static void mx31_intctrl(struct spi_imx_data *spi_imx, int enable) in mx31_intctrl() argument
760 writel(val, spi_imx->base + MXC_CSPIINT); in mx31_intctrl()
763 static void mx31_trigger(struct spi_imx_data *spi_imx) in mx31_trigger() argument
767 reg = readl(spi_imx->base + MXC_CSPICTRL); in mx31_trigger()
769 writel(reg, spi_imx->base + MXC_CSPICTRL); in mx31_trigger()
772 static int mx31_prepare_message(struct spi_imx_data *spi_imx, in mx31_prepare_message() argument
778 static int mx31_prepare_transfer(struct spi_imx_data *spi_imx, in mx31_prepare_transfer() argument
784 reg |= spi_imx_clkdiv_2(spi_imx->spi_clk, spi_imx->spi_bus_clk, &clk) << in mx31_prepare_transfer()
786 spi_imx->spi_bus_clk = clk; in mx31_prepare_transfer()
788 if (is_imx35_cspi(spi_imx)) { in mx31_prepare_transfer()
789 reg |= (spi_imx->bits_per_word - 1) << MX35_CSPICTRL_BL_SHIFT; in mx31_prepare_transfer()
792 reg |= (spi_imx->bits_per_word - 1) << MX31_CSPICTRL_BC_SHIFT; in mx31_prepare_transfer()
803 (is_imx35_cspi(spi_imx) ? MX35_CSPICTRL_CS_SHIFT : in mx31_prepare_transfer()
806 if (spi_imx->usedma) in mx31_prepare_transfer()
809 writel(reg, spi_imx->base + MXC_CSPICTRL); in mx31_prepare_transfer()
811 reg = readl(spi_imx->base + MX31_CSPI_TESTREG); in mx31_prepare_transfer()
816 writel(reg, spi_imx->base + MX31_CSPI_TESTREG); in mx31_prepare_transfer()
818 if (spi_imx->usedma) { in mx31_prepare_transfer()
824 spi_imx->base + MX31_CSPI_DMAREG); in mx31_prepare_transfer()
830 static int mx31_rx_available(struct spi_imx_data *spi_imx) in mx31_rx_available() argument
832 return readl(spi_imx->base + MX31_CSPISTATUS) & MX31_STATUS_RR; in mx31_rx_available()
835 static void mx31_reset(struct spi_imx_data *spi_imx) in mx31_reset() argument
838 while (readl(spi_imx->base + MX31_CSPISTATUS) & MX31_STATUS_RR) in mx31_reset()
839 readl(spi_imx->base + MXC_CSPIRXDATA); in mx31_reset()
855 static void mx21_intctrl(struct spi_imx_data *spi_imx, int enable) in mx21_intctrl() argument
864 writel(val, spi_imx->base + MXC_CSPIINT); in mx21_intctrl()
867 static void mx21_trigger(struct spi_imx_data *spi_imx) in mx21_trigger() argument
871 reg = readl(spi_imx->base + MXC_CSPICTRL); in mx21_trigger()
873 writel(reg, spi_imx->base + MXC_CSPICTRL); in mx21_trigger()
876 static int mx21_prepare_message(struct spi_imx_data *spi_imx, in mx21_prepare_message() argument
882 static int mx21_prepare_transfer(struct spi_imx_data *spi_imx, in mx21_prepare_transfer() argument
886 unsigned int max = is_imx27_cspi(spi_imx) ? 16 : 18; in mx21_prepare_transfer()
889 reg |= spi_imx_clkdiv_1(spi_imx->spi_clk, spi_imx->spi_bus_clk, max, &clk) in mx21_prepare_transfer()
891 spi_imx->spi_bus_clk = clk; in mx21_prepare_transfer()
893 reg |= spi_imx->bits_per_word - 1; in mx21_prepare_transfer()
904 writel(reg, spi_imx->base + MXC_CSPICTRL); in mx21_prepare_transfer()
909 static int mx21_rx_available(struct spi_imx_data *spi_imx) in mx21_rx_available() argument
911 return readl(spi_imx->base + MXC_CSPIINT) & MX21_INTREG_RR; in mx21_rx_available()
914 static void mx21_reset(struct spi_imx_data *spi_imx) in mx21_reset() argument
916 writel(1, spi_imx->base + MXC_RESET); in mx21_reset()
930 static void mx1_intctrl(struct spi_imx_data *spi_imx, int enable) in mx1_intctrl() argument
939 writel(val, spi_imx->base + MXC_CSPIINT); in mx1_intctrl()
942 static void mx1_trigger(struct spi_imx_data *spi_imx) in mx1_trigger() argument
946 reg = readl(spi_imx->base + MXC_CSPICTRL); in mx1_trigger()
948 writel(reg, spi_imx->base + MXC_CSPICTRL); in mx1_trigger()
951 static int mx1_prepare_message(struct spi_imx_data *spi_imx, in mx1_prepare_message() argument
957 static int mx1_prepare_transfer(struct spi_imx_data *spi_imx, in mx1_prepare_transfer() argument
963 reg |= spi_imx_clkdiv_2(spi_imx->spi_clk, spi_imx->spi_bus_clk, &clk) << in mx1_prepare_transfer()
965 spi_imx->spi_bus_clk = clk; in mx1_prepare_transfer()
967 reg |= spi_imx->bits_per_word - 1; in mx1_prepare_transfer()
974 writel(reg, spi_imx->base + MXC_CSPICTRL); in mx1_prepare_transfer()
979 static int mx1_rx_available(struct spi_imx_data *spi_imx) in mx1_rx_available() argument
981 return readl(spi_imx->base + MXC_CSPIINT) & MX1_INTREG_RR; in mx1_rx_available()
984 static void mx1_reset(struct spi_imx_data *spi_imx) in mx1_reset() argument
986 writel(1, spi_imx->base + MXC_RESET); in mx1_reset()
1121 static void spi_imx_set_burst_len(struct spi_imx_data *spi_imx, int n_bits) in spi_imx_set_burst_len() argument
1125 ctrl = readl(spi_imx->base + MX51_ECSPI_CTRL); in spi_imx_set_burst_len()
1128 writel(ctrl, spi_imx->base + MX51_ECSPI_CTRL); in spi_imx_set_burst_len()
1131 static void spi_imx_push(struct spi_imx_data *spi_imx) in spi_imx_push() argument
1140 if (!spi_imx->remainder) { in spi_imx_push()
1141 if (spi_imx->dynamic_burst) { in spi_imx_push()
1144 burst_len = spi_imx->count % MX51_ECSPI_CTRL_MAX_BURST; in spi_imx_push()
1149 spi_imx_set_burst_len(spi_imx, burst_len * 8); in spi_imx_push()
1151 spi_imx->remainder = burst_len; in spi_imx_push()
1153 spi_imx->remainder = spi_imx_bytes_per_word(spi_imx->bits_per_word); in spi_imx_push()
1157 while (spi_imx->txfifo < spi_imx->devtype_data->fifo_size) { in spi_imx_push()
1158 if (!spi_imx->count) in spi_imx_push()
1160 if (spi_imx->dynamic_burst && in spi_imx_push()
1161 spi_imx->txfifo >= DIV_ROUND_UP(spi_imx->remainder, 4)) in spi_imx_push()
1163 spi_imx->tx(spi_imx); in spi_imx_push()
1164 spi_imx->txfifo++; in spi_imx_push()
1167 if (!spi_imx->target_mode) in spi_imx_push()
1168 spi_imx->devtype_data->trigger(spi_imx); in spi_imx_push()
1173 struct spi_imx_data *spi_imx = dev_id; in spi_imx_isr() local
1175 while (spi_imx->txfifo && in spi_imx_isr()
1176 spi_imx->devtype_data->rx_available(spi_imx)) { in spi_imx_isr()
1177 spi_imx->rx(spi_imx); in spi_imx_isr()
1178 spi_imx->txfifo--; in spi_imx_isr()
1181 if (spi_imx->count) { in spi_imx_isr()
1182 spi_imx_push(spi_imx); in spi_imx_isr()
1186 if (spi_imx->txfifo) { in spi_imx_isr()
1190 spi_imx->devtype_data->intctrl( in spi_imx_isr()
1191 spi_imx, MXC_INT_RR); in spi_imx_isr()
1195 spi_imx->devtype_data->intctrl(spi_imx, 0); in spi_imx_isr()
1196 complete(&spi_imx->xfer_done); in spi_imx_isr()
1206 struct spi_imx_data *spi_imx = spi_controller_get_devdata(controller); in spi_imx_dma_configure() local
1208 switch (spi_imx_bytes_per_word(spi_imx->bits_per_word)) { in spi_imx_dma_configure()
1223 tx.dst_addr = spi_imx->base_phys + MXC_CSPITXDATA; in spi_imx_dma_configure()
1225 tx.dst_maxburst = spi_imx->wml; in spi_imx_dma_configure()
1228 dev_err(spi_imx->dev, "TX dma configuration failed with %d\n", ret); in spi_imx_dma_configure()
1233 rx.src_addr = spi_imx->base_phys + MXC_CSPIRXDATA; in spi_imx_dma_configure()
1235 rx.src_maxburst = spi_imx->wml; in spi_imx_dma_configure()
1238 dev_err(spi_imx->dev, "RX dma configuration failed with %d\n", ret); in spi_imx_dma_configure()
1248 struct spi_imx_data *spi_imx = spi_controller_get_devdata(spi->controller); in spi_imx_setupxfer() local
1259 spi_imx->spi_bus_clk = spi->max_speed_hz; in spi_imx_setupxfer()
1261 spi_imx->spi_bus_clk = t->speed_hz; in spi_imx_setupxfer()
1263 spi_imx->bits_per_word = t->bits_per_word; in spi_imx_setupxfer()
1264 spi_imx->count = t->len; in spi_imx_setupxfer()
1271 if (spi_imx->devtype_data->dynamic_burst && !spi_imx->target_mode && in spi_imx_setupxfer()
1273 (spi_imx->bits_per_word == 8 || in spi_imx_setupxfer()
1274 spi_imx->bits_per_word == 16 || in spi_imx_setupxfer()
1275 spi_imx->bits_per_word == 32)) { in spi_imx_setupxfer()
1277 spi_imx->rx = spi_imx_buf_rx_swap; in spi_imx_setupxfer()
1278 spi_imx->tx = spi_imx_buf_tx_swap; in spi_imx_setupxfer()
1279 spi_imx->dynamic_burst = 1; in spi_imx_setupxfer()
1282 if (spi_imx->bits_per_word <= 8) { in spi_imx_setupxfer()
1283 spi_imx->rx = spi_imx_buf_rx_u8; in spi_imx_setupxfer()
1284 spi_imx->tx = spi_imx_buf_tx_u8; in spi_imx_setupxfer()
1285 } else if (spi_imx->bits_per_word <= 16) { in spi_imx_setupxfer()
1286 spi_imx->rx = spi_imx_buf_rx_u16; in spi_imx_setupxfer()
1287 spi_imx->tx = spi_imx_buf_tx_u16; in spi_imx_setupxfer()
1289 spi_imx->rx = spi_imx_buf_rx_u32; in spi_imx_setupxfer()
1290 spi_imx->tx = spi_imx_buf_tx_u32; in spi_imx_setupxfer()
1292 spi_imx->dynamic_burst = 0; in spi_imx_setupxfer()
1295 if (spi_imx_can_dma(spi_imx->controller, spi, t)) in spi_imx_setupxfer()
1296 spi_imx->usedma = true; in spi_imx_setupxfer()
1298 spi_imx->usedma = false; in spi_imx_setupxfer()
1300 spi_imx->rx_only = ((t->tx_buf == NULL) in spi_imx_setupxfer()
1303 if (is_imx53_ecspi(spi_imx) && spi_imx->target_mode) { in spi_imx_setupxfer()
1304 spi_imx->rx = mx53_ecspi_rx_target; in spi_imx_setupxfer()
1305 spi_imx->tx = mx53_ecspi_tx_target; in spi_imx_setupxfer()
1306 spi_imx->target_burst = t->len; in spi_imx_setupxfer()
1309 spi_imx->devtype_data->prepare_transfer(spi_imx, spi); in spi_imx_setupxfer()
1314 static void spi_imx_sdma_exit(struct spi_imx_data *spi_imx) in spi_imx_sdma_exit() argument
1316 struct spi_controller *controller = spi_imx->controller; in spi_imx_sdma_exit()
1329 static int spi_imx_sdma_init(struct device *dev, struct spi_imx_data *spi_imx, in spi_imx_sdma_init() argument
1334 spi_imx->wml = spi_imx->devtype_data->fifo_size / 2; in spi_imx_sdma_init()
1354 init_completion(&spi_imx->dma_rx_completion); in spi_imx_sdma_init()
1355 init_completion(&spi_imx->dma_tx_completion); in spi_imx_sdma_init()
1358 spi_imx->controller->flags = SPI_CONTROLLER_MUST_RX | in spi_imx_sdma_init()
1363 spi_imx_sdma_exit(spi_imx); in spi_imx_sdma_init()
1369 struct spi_imx_data *spi_imx = (struct spi_imx_data *)cookie; in spi_imx_dma_rx_callback() local
1371 complete(&spi_imx->dma_rx_completion); in spi_imx_dma_rx_callback()
1376 struct spi_imx_data *spi_imx = (struct spi_imx_data *)cookie; in spi_imx_dma_tx_callback() local
1378 complete(&spi_imx->dma_tx_completion); in spi_imx_dma_tx_callback()
1381 static int spi_imx_calculate_timeout(struct spi_imx_data *spi_imx, int size) in spi_imx_calculate_timeout() argument
1386 timeout = (8 + 4) * size / spi_imx->spi_bus_clk; in spi_imx_calculate_timeout()
1395 static int spi_imx_dma_transfer(struct spi_imx_data *spi_imx, in spi_imx_dma_transfer() argument
1401 struct spi_controller *controller = spi_imx->controller; in spi_imx_dma_transfer()
1409 for (i = spi_imx->devtype_data->fifo_size / 2; i > 0; i--) { in spi_imx_dma_transfer()
1417 spi_imx->wml = i; in spi_imx_dma_transfer()
1423 if (!spi_imx->devtype_data->setup_wml) { in spi_imx_dma_transfer()
1424 dev_err(spi_imx->dev, "No setup_wml()?\n"); in spi_imx_dma_transfer()
1428 spi_imx->devtype_data->setup_wml(spi_imx); in spi_imx_dma_transfer()
1443 desc_rx->callback_param = (void *)spi_imx; in spi_imx_dma_transfer()
1445 reinit_completion(&spi_imx->dma_rx_completion); in spi_imx_dma_transfer()
1458 desc_tx->callback_param = (void *)spi_imx; in spi_imx_dma_transfer()
1460 reinit_completion(&spi_imx->dma_tx_completion); in spi_imx_dma_transfer()
1463 transfer_timeout = spi_imx_calculate_timeout(spi_imx, transfer->len); in spi_imx_dma_transfer()
1466 timeout = wait_for_completion_timeout(&spi_imx->dma_tx_completion, in spi_imx_dma_transfer()
1469 dev_err(spi_imx->dev, "I/O Error in DMA TX\n"); in spi_imx_dma_transfer()
1475 timeout = wait_for_completion_timeout(&spi_imx->dma_rx_completion, in spi_imx_dma_transfer()
1479 spi_imx->devtype_data->reset(spi_imx); in spi_imx_dma_transfer()
1494 struct spi_imx_data *spi_imx = spi_controller_get_devdata(spi->controller); in spi_imx_pio_transfer() local
1498 spi_imx->tx_buf = transfer->tx_buf; in spi_imx_pio_transfer()
1499 spi_imx->rx_buf = transfer->rx_buf; in spi_imx_pio_transfer()
1500 spi_imx->count = transfer->len; in spi_imx_pio_transfer()
1501 spi_imx->txfifo = 0; in spi_imx_pio_transfer()
1502 spi_imx->remainder = 0; in spi_imx_pio_transfer()
1504 reinit_completion(&spi_imx->xfer_done); in spi_imx_pio_transfer()
1506 spi_imx_push(spi_imx); in spi_imx_pio_transfer()
1508 spi_imx->devtype_data->intctrl(spi_imx, MXC_INT_TE); in spi_imx_pio_transfer()
1510 transfer_timeout = spi_imx_calculate_timeout(spi_imx, transfer->len); in spi_imx_pio_transfer()
1512 timeout = wait_for_completion_timeout(&spi_imx->xfer_done, in spi_imx_pio_transfer()
1516 spi_imx->devtype_data->reset(spi_imx); in spi_imx_pio_transfer()
1526 struct spi_imx_data *spi_imx = spi_controller_get_devdata(spi->controller); in spi_imx_poll_transfer() local
1529 spi_imx->tx_buf = transfer->tx_buf; in spi_imx_poll_transfer()
1530 spi_imx->rx_buf = transfer->rx_buf; in spi_imx_poll_transfer()
1531 spi_imx->count = transfer->len; in spi_imx_poll_transfer()
1532 spi_imx->txfifo = 0; in spi_imx_poll_transfer()
1533 spi_imx->remainder = 0; in spi_imx_poll_transfer()
1539 spi_imx_push(spi_imx); in spi_imx_poll_transfer()
1541 timeout = spi_imx_calculate_timeout(spi_imx, transfer->len) + jiffies; in spi_imx_poll_transfer()
1542 while (spi_imx->txfifo) { in spi_imx_poll_transfer()
1544 while (spi_imx->txfifo && in spi_imx_poll_transfer()
1545 spi_imx->devtype_data->rx_available(spi_imx)) { in spi_imx_poll_transfer()
1546 spi_imx->rx(spi_imx); in spi_imx_poll_transfer()
1547 spi_imx->txfifo--; in spi_imx_poll_transfer()
1551 if (spi_imx->count) { in spi_imx_poll_transfer()
1552 spi_imx_push(spi_imx); in spi_imx_poll_transfer()
1556 if (spi_imx->txfifo && in spi_imx_poll_transfer()
1574 struct spi_imx_data *spi_imx = spi_controller_get_devdata(spi->controller); in spi_imx_pio_transfer_target() local
1577 if (is_imx53_ecspi(spi_imx) && in spi_imx_pio_transfer_target()
1584 spi_imx->tx_buf = transfer->tx_buf; in spi_imx_pio_transfer_target()
1585 spi_imx->rx_buf = transfer->rx_buf; in spi_imx_pio_transfer_target()
1586 spi_imx->count = transfer->len; in spi_imx_pio_transfer_target()
1587 spi_imx->txfifo = 0; in spi_imx_pio_transfer_target()
1588 spi_imx->remainder = 0; in spi_imx_pio_transfer_target()
1590 reinit_completion(&spi_imx->xfer_done); in spi_imx_pio_transfer_target()
1591 spi_imx->target_aborted = false; in spi_imx_pio_transfer_target()
1593 spi_imx_push(spi_imx); in spi_imx_pio_transfer_target()
1595 spi_imx->devtype_data->intctrl(spi_imx, MXC_INT_TE | MXC_INT_RDR); in spi_imx_pio_transfer_target()
1597 if (wait_for_completion_interruptible(&spi_imx->xfer_done) || in spi_imx_pio_transfer_target()
1598 spi_imx->target_aborted) { in spi_imx_pio_transfer_target()
1609 if (spi_imx->devtype_data->disable) in spi_imx_pio_transfer_target()
1610 spi_imx->devtype_data->disable(spi_imx); in spi_imx_pio_transfer_target()
1619 struct spi_imx_data *spi_imx = spi_controller_get_devdata(spi->controller); in spi_imx_transfer_one() local
1623 transfer->effective_speed_hz = spi_imx->spi_bus_clk; in spi_imx_transfer_one()
1626 while (spi_imx->devtype_data->rx_available(spi_imx)) in spi_imx_transfer_one()
1627 readl(spi_imx->base + MXC_CSPIRXDATA); in spi_imx_transfer_one()
1629 if (spi_imx->target_mode) in spi_imx_transfer_one()
1637 if (spi_imx->usedma) in spi_imx_transfer_one()
1638 return spi_imx_dma_transfer(spi_imx, transfer); in spi_imx_transfer_one()
1668 struct spi_imx_data *spi_imx = spi_controller_get_devdata(controller); in spi_imx_prepare_message() local
1671 ret = pm_runtime_resume_and_get(spi_imx->dev); in spi_imx_prepare_message()
1673 dev_err(spi_imx->dev, "failed to enable clock\n"); in spi_imx_prepare_message()
1677 ret = spi_imx->devtype_data->prepare_message(spi_imx, msg); in spi_imx_prepare_message()
1679 pm_runtime_mark_last_busy(spi_imx->dev); in spi_imx_prepare_message()
1680 pm_runtime_put_autosuspend(spi_imx->dev); in spi_imx_prepare_message()
1689 struct spi_imx_data *spi_imx = spi_controller_get_devdata(controller); in spi_imx_unprepare_message() local
1691 pm_runtime_mark_last_busy(spi_imx->dev); in spi_imx_unprepare_message()
1692 pm_runtime_put_autosuspend(spi_imx->dev); in spi_imx_unprepare_message()
1698 struct spi_imx_data *spi_imx = spi_controller_get_devdata(controller); in spi_imx_target_abort() local
1700 spi_imx->target_aborted = true; in spi_imx_target_abort()
1701 complete(&spi_imx->xfer_done); in spi_imx_target_abort()
1710 struct spi_imx_data *spi_imx; in spi_imx_probe() local
1741 spi_imx = spi_controller_get_devdata(controller); in spi_imx_probe()
1742 spi_imx->controller = controller; in spi_imx_probe()
1743 spi_imx->dev = &pdev->dev; in spi_imx_probe()
1744 spi_imx->target_mode = target_mode; in spi_imx_probe()
1746 spi_imx->devtype_data = devtype_data; in spi_imx_probe()
1768 if (is_imx35_cspi(spi_imx) || is_imx51_ecspi(spi_imx) || in spi_imx_probe()
1769 is_imx53_ecspi(spi_imx)) in spi_imx_probe()
1772 if (is_imx51_ecspi(spi_imx) || is_imx53_ecspi(spi_imx)) in spi_imx_probe()
1775 if (is_imx51_ecspi(spi_imx) && in spi_imx_probe()
1784 if (is_imx51_ecspi(spi_imx) || is_imx53_ecspi(spi_imx)) { in spi_imx_probe()
1789 spi_imx->spi_drctl = spi_drctl; in spi_imx_probe()
1791 init_completion(&spi_imx->xfer_done); in spi_imx_probe()
1793 spi_imx->base = devm_platform_get_and_ioremap_resource(pdev, 0, &res); in spi_imx_probe()
1794 if (IS_ERR(spi_imx->base)) { in spi_imx_probe()
1795 ret = PTR_ERR(spi_imx->base); in spi_imx_probe()
1798 spi_imx->base_phys = res->start; in spi_imx_probe()
1807 dev_name(&pdev->dev), spi_imx); in spi_imx_probe()
1813 spi_imx->clk_ipg = devm_clk_get(&pdev->dev, "ipg"); in spi_imx_probe()
1814 if (IS_ERR(spi_imx->clk_ipg)) { in spi_imx_probe()
1815 ret = PTR_ERR(spi_imx->clk_ipg); in spi_imx_probe()
1819 spi_imx->clk_per = devm_clk_get(&pdev->dev, "per"); in spi_imx_probe()
1820 if (IS_ERR(spi_imx->clk_per)) { in spi_imx_probe()
1821 ret = PTR_ERR(spi_imx->clk_per); in spi_imx_probe()
1825 ret = clk_prepare_enable(spi_imx->clk_per); in spi_imx_probe()
1829 ret = clk_prepare_enable(spi_imx->clk_ipg); in spi_imx_probe()
1833 pm_runtime_set_autosuspend_delay(spi_imx->dev, MXC_RPM_TIMEOUT); in spi_imx_probe()
1834 pm_runtime_use_autosuspend(spi_imx->dev); in spi_imx_probe()
1835 pm_runtime_get_noresume(spi_imx->dev); in spi_imx_probe()
1836 pm_runtime_set_active(spi_imx->dev); in spi_imx_probe()
1837 pm_runtime_enable(spi_imx->dev); in spi_imx_probe()
1839 spi_imx->spi_clk = clk_get_rate(spi_imx->clk_per); in spi_imx_probe()
1844 if (spi_imx->devtype_data->has_dmamode) { in spi_imx_probe()
1845 ret = spi_imx_sdma_init(&pdev->dev, spi_imx, controller); in spi_imx_probe()
1854 spi_imx->devtype_data->reset(spi_imx); in spi_imx_probe()
1856 spi_imx->devtype_data->intctrl(spi_imx, 0); in spi_imx_probe()
1865 pm_runtime_mark_last_busy(spi_imx->dev); in spi_imx_probe()
1866 pm_runtime_put_autosuspend(spi_imx->dev); in spi_imx_probe()
1871 if (spi_imx->devtype_data->has_dmamode) in spi_imx_probe()
1872 spi_imx_sdma_exit(spi_imx); in spi_imx_probe()
1874 pm_runtime_dont_use_autosuspend(spi_imx->dev); in spi_imx_probe()
1876 pm_runtime_disable(spi_imx->dev); in spi_imx_probe()
1878 clk_disable_unprepare(spi_imx->clk_ipg); in spi_imx_probe()
1880 clk_disable_unprepare(spi_imx->clk_per); in spi_imx_probe()
1890 struct spi_imx_data *spi_imx = spi_controller_get_devdata(controller); in spi_imx_remove() local
1895 ret = pm_runtime_get_sync(spi_imx->dev); in spi_imx_remove()
1897 writel(0, spi_imx->base + MXC_CSPICTRL); in spi_imx_remove()
1899 dev_warn(spi_imx->dev, "failed to enable clock, skip hw disable\n"); in spi_imx_remove()
1901 pm_runtime_dont_use_autosuspend(spi_imx->dev); in spi_imx_remove()
1902 pm_runtime_put_sync(spi_imx->dev); in spi_imx_remove()
1903 pm_runtime_disable(spi_imx->dev); in spi_imx_remove()
1905 spi_imx_sdma_exit(spi_imx); in spi_imx_remove()
1911 struct spi_imx_data *spi_imx; in spi_imx_runtime_resume() local
1914 spi_imx = spi_controller_get_devdata(controller); in spi_imx_runtime_resume()
1916 ret = clk_prepare_enable(spi_imx->clk_per); in spi_imx_runtime_resume()
1920 ret = clk_prepare_enable(spi_imx->clk_ipg); in spi_imx_runtime_resume()
1922 clk_disable_unprepare(spi_imx->clk_per); in spi_imx_runtime_resume()
1932 struct spi_imx_data *spi_imx; in spi_imx_runtime_suspend() local
1934 spi_imx = spi_controller_get_devdata(controller); in spi_imx_runtime_suspend()
1936 clk_disable_unprepare(spi_imx->clk_per); in spi_imx_runtime_suspend()
1937 clk_disable_unprepare(spi_imx->clk_ipg); in spi_imx_runtime_suspend()