505 static void tegra_pmc_writel(struct tegra_pmc *pmc, u32 value,  in tegra_pmc_writel()  function
538 		tegra_pmc_writel(pmc, value, offset);  in tegra_pmc_scratch_writel()
597 		tegra_pmc_writel(pmc, PWRGATE_TOGGLE_START | id, PWRGATE_TOGGLE);  in tegra20_powergate_set()
624 	tegra_pmc_writel(pmc, PWRGATE_TOGGLE_START | id, PWRGATE_TOGGLE);  in tegra114_powergate_set()
682 			tegra_pmc_writel(pmc, 0, GPU_RG_CNTRL);  in __tegra_powergate_remove_clamping()
698 	tegra_pmc_writel(pmc, mask, REMOVE_CLAMPING);  in __tegra_powergate_remove_clamping()
1142 	tegra_pmc_writel(pmc, value, PMC_CNTRL);  in tegra_pmc_restart()
1162 		tegra_pmc_writel(pmc, go_to_charger_mode, PMC_SCRATCH37);  in tegra_pmc_power_off_handler()
1573 		tegra_pmc_writel(pmc, DPD_SAMPLE_ENABLE, DPD_SAMPLE);  in tegra_io_pad_prepare()
1578 		tegra_pmc_writel(pmc, value, SEL_DPD_TIM);  in tegra_io_pad_prepare()
1605 		tegra_pmc_writel(pmc, DPD_SAMPLE_DISABLE, DPD_SAMPLE);  in tegra_io_pad_unprepare()
1635 	tegra_pmc_writel(pmc, IO_DPD_REQ_CODE_OFF | mask, request);  in tegra_io_pad_power_enable()
1678 	tegra_pmc_writel(pmc, IO_DPD_REQ_CODE_ON | mask, request);  in tegra_io_pad_power_disable()
1740 		tegra_pmc_writel(pmc, value, PMC_IMPL_E_33V_PWR);  in tegra_io_pad_set_voltage()
1745 		tegra_pmc_writel(pmc, value, PMC_PWR_DET);  in tegra_io_pad_set_voltage()
1755 		tegra_pmc_writel(pmc, value, PMC_PWR_DET_VALUE);  in tegra_io_pad_set_voltage()
1850 	tegra_pmc_writel(pmc, ticks, PMC_CPUPWRGOOD_TIMER);  in tegra_pmc_enter_suspend_mode()
1854 	tegra_pmc_writel(pmc, ticks, PMC_CPUPWROFF_TIMER);  in tegra_pmc_enter_suspend_mode()
1859 	tegra_pmc_writel(pmc, value, PMC_CNTRL);  in tegra_pmc_enter_suspend_mode()
2004 	tegra_pmc_writel(pmc, value, PMC_SENSOR_CTRL);  in tegra_pmc_init_tsense_reset()
2008 	tegra_pmc_writel(pmc, value, PMC_SCRATCH54);  in tegra_pmc_init_tsense_reset()
2026 	tegra_pmc_writel(pmc, value, PMC_SCRATCH55);  in tegra_pmc_init_tsense_reset()
2030 	tegra_pmc_writel(pmc, value, PMC_SENSOR_CTRL);  in tegra_pmc_init_tsense_reset()
2347 	tegra_pmc_writel(pmc, 0, PMC_SW_WAKE_STATUS);  in tegra210_pmc_irq_set_wake()
2348 	tegra_pmc_writel(pmc, 0, PMC_SW_WAKE2_STATUS);  in tegra210_pmc_irq_set_wake()
2350 	tegra_pmc_writel(pmc, 0, PMC_WAKE_STATUS);  in tegra210_pmc_irq_set_wake()
2351 	tegra_pmc_writel(pmc, 0, PMC_WAKE2_STATUS);  in tegra210_pmc_irq_set_wake()
2366 	tegra_pmc_writel(pmc, value, offset);  in tegra210_pmc_irq_set_wake()
2406 	tegra_pmc_writel(pmc, value, offset);  in tegra210_pmc_irq_set_type()
2600 	tegra_pmc_writel(pmc, val, clk->offs);  in pmc_clk_mux_set_parent()
2622 	tegra_pmc_writel(pmc, val, offs);  in pmc_clk_set_state()
2785 		tegra_pmc_writel(pmc, 0x0, PMC_BLINK_TIMER);  in tegra_pmc_clock_register()
2854 	tegra_pmc_writel(pmc, value, offset);  in tegra_pmc_regmap_writel()
3215 	tegra_pmc_writel(pmc, virt_to_phys(tegra_resume), PMC_SCRATCH41);  in tegra_pmc_suspend()
3224 	tegra_pmc_writel(pmc, 0x0, PMC_SCRATCH41);  in tegra_pmc_resume()
3259 	tegra_pmc_writel(pmc, value, PMC_CNTRL);  in tegra20_pmc_init()
3274 	tegra_pmc_writel(pmc, value, PMC_CNTRL);  in tegra20_pmc_init()
3279 	tegra_pmc_writel(pmc, value, PMC_CNTRL);  in tegra20_pmc_init()
3286 		tegra_pmc_writel(pmc, ((osc << 8) & 0xff00) | (pmu & 0xff),  in tegra20_pmc_init()
3288 		tegra_pmc_writel(pmc, off, PMC_COREPWROFF_TIMER);  in tegra20_pmc_init()
3305 	tegra_pmc_writel(pmc, value, PMC_CNTRL);  in tegra20_pmc_setup_irq_polarity()