1 // SPDX-License-Identifier: GPL-2.0-only
3  * Copyright (c) 2013-2023, NVIDIA CORPORATION.  All rights reserved.
11 #include <linux/nvmem-consumer.h>
12 #include <linux/nvmem-provider.h>
52 	{ .compatible = "nvidia,tegra20-car", },
53 	{ .compatible = "nvidia,tegra30-car", },
54 	{ .compatible = "nvidia,tegra114-car", },
55 	{ .compatible = "nvidia,tegra124-car", },
56 	{ .compatible = "nvidia,tegra132-car", },
57 	{ .compatible = "nvidia,tegra210-car", },
68 	{ .compatible = "nvidia,tegra234-efuse", .data = &tegra234_fuse_soc },
71 	{ .compatible = "nvidia,tegra194-efuse", .data = &tegra194_fuse_soc },
74 	{ .compatible = "nvidia,tegra186-efuse", .data = &tegra186_fuse_soc },
77 	{ .compatible = "nvidia,tegra210-efuse", .data = &tegra210_fuse_soc },
80 	{ .compatible = "nvidia,tegra132-efuse", .data = &tegra124_fuse_soc },
83 	{ .compatible = "nvidia,tegra124-efuse", .data = &tegra124_fuse_soc },
86 	{ .compatible = "nvidia,tegra114-efuse", .data = &tegra114_fuse_soc },
89 	{ .compatible = "nvidia,tegra30-efuse", .data = &tegra30_fuse_soc },
92 	{ .compatible = "nvidia,tegra20-efuse", .data = &tegra20_fuse_soc },
105 		buffer[i] = fuse->read(fuse, offset + i * 4);  in tegra_fuse_read()
112 	fuse->base = (void __iomem *)base;  in tegra_fuse_restore()
113 	fuse->clk = NULL;  in tegra_fuse_restore()
118 	void __iomem *base = fuse->base;  in tegra_fuse_probe()
123 	err = devm_add_action(&pdev->dev, tegra_fuse_restore, (void __force *)base);  in tegra_fuse_probe()
128 	fuse->base = devm_platform_get_and_ioremap_resource(pdev, 0, &res);  in tegra_fuse_probe()
129 	if (IS_ERR(fuse->base))  in tegra_fuse_probe()
130 		return PTR_ERR(fuse->base);  in tegra_fuse_probe()
131 	fuse->phys = res->start;  in tegra_fuse_probe()
133 	fuse->clk = devm_clk_get(&pdev->dev, "fuse");  in tegra_fuse_probe()
134 	if (IS_ERR(fuse->clk)) {  in tegra_fuse_probe()
135 		if (PTR_ERR(fuse->clk) != -EPROBE_DEFER)  in tegra_fuse_probe()
136 			dev_err(&pdev->dev, "failed to get FUSE clock: %ld",  in tegra_fuse_probe()
137 				PTR_ERR(fuse->clk));  in tegra_fuse_probe()
139 		return PTR_ERR(fuse->clk);  in tegra_fuse_probe()
143 	fuse->dev = &pdev->dev;  in tegra_fuse_probe()
145 	err = devm_pm_runtime_enable(&pdev->dev);  in tegra_fuse_probe()
149 	if (fuse->soc->probe) {  in tegra_fuse_probe()
150 		err = fuse->soc->probe(fuse);  in tegra_fuse_probe()
156 	nvmem.dev = &pdev->dev;  in tegra_fuse_probe()
158 	nvmem.id = -1;  in tegra_fuse_probe()
160 	nvmem.cells = fuse->soc->cells;  in tegra_fuse_probe()
161 	nvmem.ncells = fuse->soc->num_cells;  in tegra_fuse_probe()
162 	nvmem.keepout = fuse->soc->keepouts;  in tegra_fuse_probe()
163 	nvmem.nkeepout = fuse->soc->num_keepouts;  in tegra_fuse_probe()
168 	nvmem.size = fuse->soc->info->size;  in tegra_fuse_probe()
173 	fuse->nvmem = devm_nvmem_register(&pdev->dev, &nvmem);  in tegra_fuse_probe()
174 	if (IS_ERR(fuse->nvmem)) {  in tegra_fuse_probe()
175 		err = PTR_ERR(fuse->nvmem);  in tegra_fuse_probe()
176 		dev_err(&pdev->dev, "failed to register NVMEM device: %d\n",  in tegra_fuse_probe()
181 	fuse->rst = devm_reset_control_get_optional(&pdev->dev, "fuse");  in tegra_fuse_probe()
182 	if (IS_ERR(fuse->rst)) {  in tegra_fuse_probe()
183 		err = PTR_ERR(fuse->rst);  in tegra_fuse_probe()
184 		dev_err(&pdev->dev, "failed to get FUSE reset: %pe\n",  in tegra_fuse_probe()
185 			fuse->rst);  in tegra_fuse_probe()
193 	err = pm_runtime_resume_and_get(&pdev->dev);  in tegra_fuse_probe()
197 	err = reset_control_reset(fuse->rst);  in tegra_fuse_probe()
198 	pm_runtime_put(&pdev->dev);  in tegra_fuse_probe()
201 		dev_err(&pdev->dev, "failed to reset FUSE: %d\n", err);  in tegra_fuse_probe()
215 	err = clk_prepare_enable(fuse->clk);  in tegra_fuse_runtime_resume()
226 	clk_disable_unprepare(fuse->clk);  in tegra_fuse_runtime_suspend()
236 	 * Critical for RAM re-repair operation, which must occur on resume  in tegra_fuse_suspend()
239 	if (fuse->soc->clk_suspend_on)  in tegra_fuse_suspend()
251 	if (fuse->soc->clk_suspend_on)  in tegra_fuse_resume()
267 		.name = "tegra-fuse",
278 	unsigned int offset = fuse->soc->info->spare + spare * 4;  in tegra_fuse_read_spare()
280 	return fuse->read_early(fuse, offset) & 1;  in tegra_fuse_read_spare()
285 	return fuse->read_early(fuse, offset);  in tegra_fuse_read_early()
290 	if (!fuse->read || !fuse->clk)  in tegra_fuse_readl()
291 		return -EPROBE_DEFER;  in tegra_fuse_readl()
293 	if (IS_ERR(fuse->clk))  in tegra_fuse_readl()
294 		return PTR_ERR(fuse->clk);  in tegra_fuse_readl()
296 	*value = fuse->read(fuse, offset);  in tegra_fuse_readl()
319 static ssize_t major_show(struct device *dev, struct device_attribute *attr,  in major_show()  argument
327 static ssize_t minor_show(struct device *dev, struct device_attribute *attr,  in minor_show()  argument
336 	&dev_attr_major.attr,
337 	&dev_attr_minor.attr,
347 static ssize_t platform_show(struct device *dev, struct device_attribute *attr,  in platform_show()  argument
353 	 * platform type is silicon and all other non-zero values indicate  in platform_show()
362 	&dev_attr_major.attr,
363 	&dev_attr_minor.attr,
364 	&dev_attr_platform.attr,
375 	struct soc_device_attribute *attr;  in tegra_soc_device_register()  local
378 	attr = kzalloc(sizeof(*attr), GFP_KERNEL);  in tegra_soc_device_register()
379 	if (!attr)  in tegra_soc_device_register()
382 	attr->family = kasprintf(GFP_KERNEL, "Tegra");  in tegra_soc_device_register()
384 		attr->revision = kasprintf(GFP_KERNEL, "%s %s",  in tegra_soc_device_register()
388 		attr->revision = kasprintf(GFP_KERNEL, "%s",  in tegra_soc_device_register()
390 	attr->soc_id = kasprintf(GFP_KERNEL, "%u", tegra_get_chip_id());  in tegra_soc_device_register()
391 	attr->custom_attr_group = fuse->soc->soc_attr_group;  in tegra_soc_device_register()
393 	dev = soc_device_register(attr);  in tegra_soc_device_register()
395 		kfree(attr->soc_id);  in tegra_soc_device_register()
396 		kfree(attr->revision);  in tegra_soc_device_register()
397 		kfree(attr->family);  in tegra_soc_device_register()
398 		kfree(attr);  in tegra_soc_device_register()
416 		 * Fall back to legacy initialization for 32-bit ARM only. All  in tegra_init_fuse()
417 		 * 64-bit ARM device tree files for Tegra are required to have  in tegra_init_fuse()
420 		 * This is for backwards-compatibility with old device trees  in tegra_init_fuse()
433 				fuse->soc = &tegra20_fuse_soc;  in tegra_init_fuse()
439 				fuse->soc = &tegra30_fuse_soc;  in tegra_init_fuse()
445 				fuse->soc = &tegra114_fuse_soc;  in tegra_init_fuse()
451 				fuse->soc = &tegra124_fuse_soc;  in tegra_init_fuse()
462 			 * nice with multi-platform kernels.  in tegra_init_fuse()
473 			return -ENXIO;  in tegra_init_fuse()
476 		fuse->soc = match->data;  in tegra_init_fuse()
488 			return -ENXIO;  in tegra_init_fuse()
492 	fuse->base = ioremap(regs.start, resource_size(&regs));  in tegra_init_fuse()
493 	if (!fuse->base) {  in tegra_init_fuse()
495 		return -ENXIO;  in tegra_init_fuse()
498 	fuse->soc->init(fuse);  in tegra_init_fuse()
507 	if (fuse->soc->lookups) {  in tegra_init_fuse()
508 		size_t size = sizeof(*fuse->lookups) * fuse->soc->num_lookups;  in tegra_init_fuse()
510 		fuse->lookups = kmemdup(fuse->soc->lookups, size, GFP_KERNEL);  in tegra_init_fuse()
511 		if (fuse->lookups)  in tegra_init_fuse()
512 			nvmem_add_cell_lookups(fuse->lookups, fuse->soc->num_lookups);  in tegra_init_fuse()