309 		reg_val = readw(&ha->reg->ctrl_status);  in qla4xxx_isp_check_reg()
4670 	uint32_t ctrl_status;  in qla4xxx_hw_reset()  local
4684 	ctrl_status = readw(&ha->reg->ctrl_status);  in qla4xxx_hw_reset()
4685 	if ((ctrl_status & CSR_SCSI_RESET_INTR) != 0)  in qla4xxx_hw_reset()
4686 		writel(set_rmask(CSR_SCSI_RESET_INTR), &ha->reg->ctrl_status);  in qla4xxx_hw_reset()
4689 	writel(set_rmask(CSR_SOFT_RESET), &ha->reg->ctrl_status);  in qla4xxx_hw_reset()
4690 	readl(&ha->reg->ctrl_status);  in qla4xxx_hw_reset()
4705 	uint32_t ctrl_status;  in qla4xxx_soft_reset()  local
4716 		ctrl_status = readw(&ha->reg->ctrl_status);  in qla4xxx_soft_reset()
4719 		if ((ctrl_status & CSR_NET_RESET_INTR) == 0)  in qla4xxx_soft_reset()
4725 	if ((ctrl_status & CSR_NET_RESET_INTR) != 0) {  in qla4xxx_soft_reset()
4731 		writel(set_rmask(CSR_NET_RESET_INTR), &ha->reg->ctrl_status);  in qla4xxx_soft_reset()
4732 		readl(&ha->reg->ctrl_status);  in qla4xxx_soft_reset()
4740 		ctrl_status = readw(&ha->reg->ctrl_status);  in qla4xxx_soft_reset()
4743 		if ((ctrl_status & CSR_SOFT_RESET) == 0) {  in qla4xxx_soft_reset()
4756 	ctrl_status = readw(&ha->reg->ctrl_status);  in qla4xxx_soft_reset()
4757 	if ((ctrl_status & CSR_SCSI_RESET_INTR) != 0) {  in qla4xxx_soft_reset()
4758 		writel(set_rmask(CSR_SCSI_RESET_INTR), &ha->reg->ctrl_status);  in qla4xxx_soft_reset()
4759 		readl(&ha->reg->ctrl_status);  in qla4xxx_soft_reset()
4772 		writel(set_rmask(CSR_FORCE_SOFT_RESET), &ha->reg->ctrl_status);  in qla4xxx_soft_reset()
4773 		readl(&ha->reg->ctrl_status);  in qla4xxx_soft_reset()
4779 			ctrl_status = readw(&ha->reg->ctrl_status);  in qla4xxx_soft_reset()
4782 			if ((ctrl_status & CSR_FORCE_SOFT_RESET) == 0) {  in qla4xxx_soft_reset()
5409 			while ((readw(&ha->reg->ctrl_status) &  in qla4xxx_do_dpc()
5486 		       &ha->reg->ctrl_status);  in qla4xxx_free_adapter()
5487 		readl(&ha->reg->ctrl_status);  in qla4xxx_free_adapter()