1012 		if ((tgtdev->dev_spec.pcie_inf.dev_info &  in mpi3mr_update_sdev()
1016 			    tgtdev->dev_spec.pcie_inf.mdts / 512);  in mpi3mr_update_sdev()
1017 			if (tgtdev->dev_spec.pcie_inf.pgsz == 0)  in mpi3mr_update_sdev()
1022 				    ((1 << tgtdev->dev_spec.pcie_inf.pgsz) - 1));  in mpi3mr_update_sdev()
1169 		tgtdev->dev_spec.sas_sata_inf.dev_info = dev_info;  in mpi3mr_update_tgtdev()
1170 		tgtdev->dev_spec.sas_sata_inf.sas_address =  in mpi3mr_update_tgtdev()
1172 		tgtdev->dev_spec.sas_sata_inf.phy_id = sasinf->phy_num;  in mpi3mr_update_tgtdev()
1173 		tgtdev->dev_spec.sas_sata_inf.attached_phy_id =  in mpi3mr_update_tgtdev()
1188 		if (tgtdev->dev_spec.sas_sata_inf.hba_port)  in mpi3mr_update_tgtdev()
1189 			tgtdev->dev_spec.sas_sata_inf.hba_port->port_id =  in mpi3mr_update_tgtdev()
1199 		tgtdev->dev_spec.pcie_inf.dev_info = dev_info;  in mpi3mr_update_tgtdev()
1200 		tgtdev->dev_spec.pcie_inf.capb =  in mpi3mr_update_tgtdev()
1202 		tgtdev->dev_spec.pcie_inf.mdts = MPI3MR_DEFAULT_MDTS;  in mpi3mr_update_tgtdev()
1204 		tgtdev->dev_spec.pcie_inf.pgsz = 12;  in mpi3mr_update_tgtdev()
1206 			tgtdev->dev_spec.pcie_inf.mdts =  in mpi3mr_update_tgtdev()
1208 			tgtdev->dev_spec.pcie_inf.pgsz = pcieinf->page_size;  in mpi3mr_update_tgtdev()
1209 			tgtdev->dev_spec.pcie_inf.reset_to =  in mpi3mr_update_tgtdev()
1212 			tgtdev->dev_spec.pcie_inf.abort_to =  in mpi3mr_update_tgtdev()
1216 		if (tgtdev->dev_spec.pcie_inf.mdts > (1024 * 1024))  in mpi3mr_update_tgtdev()
1217 			tgtdev->dev_spec.pcie_inf.mdts = (1024 * 1024);  in mpi3mr_update_tgtdev()
1244 		tgtdev->dev_spec.vd_inf.state = vdinf->vd_state;  in mpi3mr_update_tgtdev()
1248 		tgtdev->dev_spec.vd_inf.tg_id = vdinf_io_throttle_group;  in mpi3mr_update_tgtdev()
1249 		tgtdev->dev_spec.vd_inf.tg_high =  in mpi3mr_update_tgtdev()
1251 		tgtdev->dev_spec.vd_inf.tg_low =  in mpi3mr_update_tgtdev()
1256 			tg->high = tgtdev->dev_spec.vd_inf.tg_high;  in mpi3mr_update_tgtdev()
1257 			tg->low = tgtdev->dev_spec.vd_inf.tg_low;  in mpi3mr_update_tgtdev()
1259 			    tgtdev->dev_spec.vd_inf.tg_qd_reduction;  in mpi3mr_update_tgtdev()
1264 		tgtdev->dev_spec.vd_inf.tg = tg;  in mpi3mr_update_tgtdev()
3699 		if (cmd_priv && tgtdev->dev_spec.pcie_inf.abort_to)  in mpi3mr_issue_tm()
3700 			timeout = tgtdev->dev_spec.pcie_inf.abort_to;  in mpi3mr_issue_tm()
3701 		else if (!cmd_priv && tgtdev->dev_spec.pcie_inf.reset_to)  in mpi3mr_issue_tm()
3702 			timeout = tgtdev->dev_spec.pcie_inf.reset_to;  in mpi3mr_issue_tm()
4409 		if ((tgt_dev->dev_spec.pcie_inf.dev_info &  in mpi3mr_slave_configure()
4413 			    tgt_dev->dev_spec.pcie_inf.mdts / 512);  in mpi3mr_slave_configure()
4414 			if (tgt_dev->dev_spec.pcie_inf.pgsz == 0)  in mpi3mr_slave_configure()
4419 				    ((1 << tgt_dev->dev_spec.pcie_inf.pgsz) - 1));  in mpi3mr_slave_configure()
4528 			    ((tgt_dev->dev_spec.pcie_inf.dev_info &  in mpi3mr_target_alloc()
4531 			    ((tgt_dev->dev_spec.pcie_inf.dev_info &  in mpi3mr_target_alloc()
4538 				scsi_tgt_priv_data->throttle_group = tgt_dev->dev_spec.vd_inf.tg;  in mpi3mr_target_alloc()