Lines Matching refs:uint32_t
80 uint32_t Revision:8;
81 uint32_t InId:24;
83 uint32_t word;
92 uint32_t word;
155 uint32_t PortId; /* For RNN_ID requests */
164 uint32_t port_id;
167 uint32_t PortId;
172 uint32_t PortId;
178 uint32_t PortId;
181 uint32_t fc4_types[8];
185 uint32_t PortId;
441 uint32_t r_a_tov; /* R_A_TOV must be in B.E. format */
444 uint32_t e_d_tov; /* E_D_TOV must be in B.E. format */
525 uint32_t vid;
527 uint32_t flags;
537 uint32_t word0;
556 uint32_t word1;
666 uint32_t lsRjtError;
718 uint32_t nPortId32; /* Access nPortId as a word */
771 uint32_t origProcAssoc; /* FC Parm Word 1, bit 0:31 */
773 uint32_t respProcAssoc; /* FC Parm Word 2, bit 0:31 */
843 uint32_t origProcAssoc; /* FC Parm Word 1, bit 0:31 */
845 uint32_t respProcAssoc; /* FC Parm Word 2, bit 0:31 */
847 uint32_t word3Reserved1; /* FC Parm Word 3, bit 0:31 */
851 uint32_t hardAL_PA;
854 uint32_t DID;
858 uint32_t Mflags:8;
859 uint32_t Odid:24;
869 uint32_t Rflags:8;
870 uint32_t Rdid:24;
882 uint32_t Fdid;
901 uint32_t unitType;
905 uint32_t physPort;
906 uint32_t attachedNodes;
932 uint32_t rls;
942 uint32_t linkFailureCnt;
943 uint32_t lossSyncCnt;
944 uint32_t lossSignalCnt;
945 uint32_t primSeqErrCnt;
946 uint32_t invalidXmitWord;
947 uint32_t crcCnt;
951 uint32_t rrq;
958 uint32_t rrq_exchg;
971 uint32_t ratov;
972 uint32_t edtov;
973 uint32_t qtov;
993 uint32_t maxsize;
994 uint32_t index;
998 uint32_t portNum;
999 uint32_t portID;
1004 uint32_t listLen;
1005 uint32_t index;
1012 uint32_t word;
1064 uint32_t lcb_command; /* ELS command opcode (0x81) */
1084 uint32_t lcb_ls_acc; /* Acceptance of LCB request (0x02) */
1129 uint32_t link_failure_cnt;
1130 uint32_t loss_of_synch_cnt;
1131 uint32_t loss_of_signal_cnt;
1132 uint32_t primitive_seq_proto_err;
1133 uint32_t invalid_trans_word;
1134 uint32_t invalid_crc_cnt;
1140 uint32_t tag; /* 0001 0003h */
1141 uint32_t length; /* set to size of payload struct */
1147 uint32_t CorrectedBlocks;
1148 uint32_t UncorrectableBlocks;
1153 uint32_t tag;
1154 uint32_t length;
1160 uint32_t port_type; /* bits 31-30 only */
1165 uint32_t tag; /* 0001 0002h */
1166 uint32_t length; /* set to size of payload struct */
1202 uint32_t tag; /* 00010001h */
1203 uint32_t length; /* set to size of payload struct */
1210 uint32_t tag; /* 0000 0003h, big endian */
1211 uint32_t length; /* size of RDP_N_PORT_ID struct */
1212 uint32_t nport_id : 12;
1213 uint32_t reserved : 8;
1218 uint32_t els_req; /* Request payload word 0 value.*/
1223 uint32_t tag; /* Descriptor tag 1 */
1224 uint32_t length; /* set to size of payload struct. */
1240 uint32_t tag;
1241 uint32_t length; /* set to size of sfp_info struct */
1247 uint32_t port_bbc; /* FC_Port buffer-to-buffer credit */
1248 uint32_t attached_port_bbc;
1249 uint32_t rtt; /* Round trip time */
1253 uint32_t tag;
1254 uint32_t length;
1277 uint32_t function_flags;
1281 uint32_t tag;
1282 uint32_t length;
1297 uint32_t tag;
1298 uint32_t length;
1303 uint32_t rdp_command; /* ELS command opcode (0x18)*/
1304 uint32_t rdp_des_length; /* RDP Payload Word 1 */
1310 uint32_t reply_sequence; /* FC word0 LS_ACC or LS_RJT */
1311 uint32_t length; /* FC Word 1 */
1337 uint32_t tag;
1338 uint32_t length;
1346 uint32_t tag;
1347 uint32_t length;
1349 uint32_t word6;
1360 uint32_t tag;
1361 uint32_t length;
1363 uint32_t word6;
1376 uint32_t tag;
1377 uint32_t length;
1385 uint32_t reply_sequence; /* LS_ACC or LS_RJT */
1386 uint32_t length; /* FC Word 1 */
1495 uint32_t EntryCnt; /* Number of HBA attribute entries */
1810 uint32_t hostAtt; /* See definitions for Host Attention
1812 uint32_t chipAtt; /* See definitions for Chip Attention
1814 uint32_t hostStatus; /* See definitions for Host Status register */
1815 uint32_t hostControl; /* See definitions for Host Control register */
1816 uint32_t buiConfig; /* See definitions for BIU configuration
2155 uint32_t bdeAddress;
2157 uint32_t bdeReserved:4;
2158 uint32_t bdeAddrHigh:4;
2159 uint32_t bdeSize:24;
2161 uint32_t bdeSize:24;
2162 uint32_t bdeAddrHigh:4;
2163 uint32_t bdeReserved:4;
2169 uint32_t bdeFlags:8; /* BDL Flags */
2170 uint32_t bdeSize:24; /* Size of BDL array in host memory (bytes) */
2172 uint32_t bdeSize:24; /* Size of BDL array in host memory (bytes) */
2173 uint32_t bdeFlags:8; /* BDL Flags */
2176 uint32_t addrLow; /* Address 0:31 */
2177 uint32_t addrHigh; /* Address 32:63 */
2178 uint32_t ulpIoTag32; /* Can be used for 32 bit I/O Tag */
2209 uint32_t word0;
2216 uint32_t reftag; /* Reference Tag Value */
2217 uint32_t reftagtr; /* Reference Tag Translation Value */
2221 uint32_t word0;
2228 uint32_t word1;
2241 uint32_t word2;
2272 uint32_t word0;
2279 uint32_t addrHigh;
2280 uint32_t addrLow;
2287 uint32_t rsvd2:25;
2288 uint32_t acknowledgment:1;
2289 uint32_t version:1;
2290 uint32_t erase_or_prog:1;
2291 uint32_t update_flash:1;
2292 uint32_t update_ram:1;
2293 uint32_t method:1;
2294 uint32_t load_cmplt:1;
2296 uint32_t load_cmplt:1;
2297 uint32_t method:1;
2298 uint32_t update_ram:1;
2299 uint32_t update_flash:1;
2300 uint32_t erase_or_prog:1;
2301 uint32_t version:1;
2302 uint32_t acknowledgment:1;
2303 uint32_t rsvd2:25;
2306 uint32_t dl_to_adr_low;
2307 uint32_t dl_to_adr_high;
2308 uint32_t dl_len;
2310 uint32_t dl_from_mbx_offset;
2320 uint32_t rsvd1[3]; /* Read as all one's */
2321 uint32_t rsvd2; /* Read as all zero's */
2322 uint32_t portname[2]; /* N_PORT name */
2323 uint32_t nodename[2]; /* NODE name */
2326 uint32_t pref_DID:24;
2327 uint32_t hardAL_PA:8;
2329 uint32_t hardAL_PA:8;
2330 uint32_t pref_DID:24;
2333 uint32_t rsvd3[21]; /* Read as all one's */
2339 uint32_t rsvd1[3]; /* Must be all one's */
2340 uint32_t rsvd2; /* Must be all zero's */
2341 uint32_t portname[2]; /* N_PORT name */
2342 uint32_t nodename[2]; /* NODE name */
2345 uint32_t pref_DID:24;
2346 uint32_t hardAL_PA:8;
2348 uint32_t hardAL_PA:8;
2349 uint32_t pref_DID:24;
2352 uint32_t rsvd3[21]; /* Must be all one's */
2359 uint32_t rsvd1;
2374 uint32_t word1;
2379 uint32_t offset;
2387 uint32_t rsvd1:24;
2388 uint32_t lipsr_AL_PA:8; /* AL_PA to issue Lip Selective Reset to */
2390 uint32_t lipsr_AL_PA:8; /* AL_PA to issue Lip Selective Reset to */
2391 uint32_t rsvd1:24;
2416 uint32_t link_speed;
2434 uint32_t rsvd1;
2441 uint32_t cr:1;
2442 uint32_t ci:1;
2443 uint32_t cr_delay:6;
2444 uint32_t cr_count:8;
2445 uint32_t rsvd1:8;
2446 uint32_t MaxBBC:8;
2448 uint32_t MaxBBC:8;
2449 uint32_t rsvd1:8;
2450 uint32_t cr_count:8;
2451 uint32_t cr_delay:6;
2452 uint32_t ci:1;
2453 uint32_t cr:1;
2456 uint32_t myId;
2457 uint32_t rsvd2;
2458 uint32_t edtov;
2459 uint32_t arbtov;
2460 uint32_t ratov;
2461 uint32_t rttov;
2462 uint32_t altov;
2463 uint32_t crtov;
2466 uint32_t rsvd4:19;
2467 uint32_t cscn:1;
2468 uint32_t bbscn:4;
2469 uint32_t rsvd3:8;
2471 uint32_t rsvd3:8;
2472 uint32_t bbscn:4;
2473 uint32_t cscn:1;
2474 uint32_t rsvd4:19;
2478 uint32_t rrq_enable:1;
2479 uint32_t rrq_immed:1;
2480 uint32_t rsvd5:29;
2481 uint32_t ack0_enable:1;
2483 uint32_t ack0_enable:1;
2484 uint32_t rsvd5:29;
2485 uint32_t rrq_immed:1;
2486 uint32_t rrq_enable:1;
2509 uint32_t unused1:24;
2510 uint32_t numRing:8;
2512 uint32_t numRing:8;
2513 uint32_t unused1:24;
2517 uint32_t hbainit;
2524 uint32_t unused2:6;
2525 uint32_t recvSeq:1;
2526 uint32_t recvNotify:1;
2527 uint32_t numMask:8;
2528 uint32_t profile:8;
2529 uint32_t unused1:4;
2530 uint32_t ring:4;
2532 uint32_t ring:4;
2533 uint32_t unused1:4;
2534 uint32_t profile:8;
2535 uint32_t numMask:8;
2536 uint32_t recvNotify:1;
2537 uint32_t recvSeq:1;
2538 uint32_t unused2:6;
2555 uint32_t ring_no;
2562 uint32_t cr:1;
2563 uint32_t ci:1;
2564 uint32_t cr_delay:6;
2565 uint32_t cr_count:8;
2566 uint32_t InitBBC:8;
2567 uint32_t MaxBBC:8;
2569 uint32_t MaxBBC:8;
2570 uint32_t InitBBC:8;
2571 uint32_t cr_count:8;
2572 uint32_t cr_delay:6;
2573 uint32_t ci:1;
2574 uint32_t cr:1;
2578 uint32_t topology:8;
2579 uint32_t myDid:24;
2581 uint32_t myDid:24;
2582 uint32_t topology:8;
2587 uint32_t AR:1;
2588 uint32_t IR:1;
2589 uint32_t rsvd1:29;
2590 uint32_t ack0:1;
2592 uint32_t ack0:1;
2593 uint32_t rsvd1:29;
2594 uint32_t IR:1;
2595 uint32_t AR:1;
2598 uint32_t edtov;
2599 uint32_t arbtov;
2600 uint32_t ratov;
2601 uint32_t rttov;
2602 uint32_t altov;
2603 uint32_t lmt;
2615 uint32_t rsvd2;
2616 uint32_t rsvd3;
2617 uint32_t max_xri;
2618 uint32_t max_iocb;
2619 uint32_t max_rpi;
2620 uint32_t avail_xri;
2621 uint32_t avail_iocb;
2622 uint32_t avail_rpi;
2623 uint32_t max_vpi;
2624 uint32_t rsvd4;
2625 uint32_t rsvd5;
2626 uint32_t avail_vpi;
2633 uint32_t rsvd2:7;
2634 uint32_t recvNotify:1;
2635 uint32_t numMask:8;
2636 uint32_t profile:8;
2637 uint32_t rsvd1:4;
2638 uint32_t ring:4;
2640 uint32_t ring:4;
2641 uint32_t rsvd1:4;
2642 uint32_t profile:8;
2643 uint32_t numMask:8;
2644 uint32_t recvNotify:1;
2645 uint32_t rsvd2:7;
2683 uint32_t rsvd1;
2684 uint32_t rsvd2;
2721 uint32_t xmitByteCnt;
2722 uint32_t rcvByteCnt;
2723 uint32_t xmitFrameCnt;
2724 uint32_t rcvFrameCnt;
2725 uint32_t xmitSeqCnt;
2726 uint32_t rcvSeqCnt;
2727 uint32_t totalOrigExchanges;
2728 uint32_t totalRespExchanges;
2729 uint32_t rcvPbsyCnt;
2730 uint32_t rcvFbsyCnt;
2748 uint32_t rsvd2:8;
2749 uint32_t DID:24;
2753 uint32_t DID:24;
2754 uint32_t rsvd2:8;
2772 uint32_t rsvd2:8;
2773 uint32_t DID:24;
2774 uint32_t rsvd3:8;
2775 uint32_t SID:24;
2776 uint32_t rsvd4;
2782 uint32_t rsvd6:30;
2783 uint32_t si:1;
2784 uint32_t exchOrig:1;
2790 uint32_t DID:24;
2791 uint32_t rsvd2:8;
2792 uint32_t SID:24;
2793 uint32_t rsvd3:8;
2794 uint32_t rsvd4;
2800 uint32_t exchOrig:1;
2801 uint32_t si:1;
2802 uint32_t rsvd6:30;
2810 uint32_t cv:1;
2811 uint32_t rr:1;
2812 uint32_t rsvd2:2;
2813 uint32_t v3req:1;
2814 uint32_t v3rsp:1;
2815 uint32_t rsvd1:25;
2816 uint32_t rv:1;
2818 uint32_t rv:1;
2819 uint32_t rsvd1:25;
2820 uint32_t v3rsp:1;
2821 uint32_t v3req:1;
2822 uint32_t rsvd2:2;
2823 uint32_t rr:1;
2824 uint32_t cv:1;
2827 uint32_t biuRev;
2828 uint32_t smRev;
2830 uint32_t smFwRev;
2852 uint32_t endecRev;
2865 uint32_t postKernRev;
2866 uint32_t opFwRev;
2868 uint32_t sli1FwRev;
2870 uint32_t sli2FwRev;
2872 uint32_t sli3Feat;
2873 uint32_t RandomData[6];
2879 uint32_t word0;
2909 uint32_t linkFailureCnt;
2910 uint32_t lossSyncCnt;
2911 uint32_t lossSignalCnt;
2912 uint32_t primSeqErrCnt;
2913 uint32_t invalidXmitWord;
2914 uint32_t crcCnt;
2915 uint32_t primSeqTimeout;
2916 uint32_t elasticOverrun;
2917 uint32_t arbTimeout;
2918 uint32_t advRecBufCredit;
2919 uint32_t curRecBufCredit;
2920 uint32_t advTransBufCredit;
2921 uint32_t curTransBufCredit;
2922 uint32_t recEofCount;
2923 uint32_t recEofdtiCount;
2924 uint32_t recEofniCount;
2925 uint32_t recSofcount;
2926 uint32_t rsvd1;
2927 uint32_t rsvd2;
2928 uint32_t recDrpXriCount;
2929 uint32_t fecCorrBlkCount;
2930 uint32_t fecUncorrBlkCount;
2940 uint32_t rsvd2:8;
2941 uint32_t did:24;
2945 uint32_t did:24;
2946 uint32_t rsvd2:8;
2977 uint32_t word;
2986 uint32_t rsvd2;
2987 uint32_t rsvd3;
2988 uint32_t rsvd4;
2989 uint32_t rsvd5;
2995 uint32_t rsvd2;
2996 uint32_t rsvd3;
2997 uint32_t rsvd4;
2998 uint32_t rsvd5;
3007 uint32_t rsvd1;
3008 uint32_t rsvd2:7;
3009 uint32_t upd:1;
3010 uint32_t sid:24;
3011 uint32_t wwn[2];
3012 uint32_t rsvd5;
3016 uint32_t rsvd1;
3017 uint32_t sid:24;
3018 uint32_t upd:1;
3019 uint32_t rsvd2:7;
3020 uint32_t wwn[2];
3021 uint32_t rsvd5;
3029 uint32_t rsvd1;
3037 uint32_t rsvd3;
3038 uint32_t rsvd4;
3039 uint32_t rsvd5;
3052 uint32_t did;
3053 uint32_t rsvd2;
3054 uint32_t rsvd3;
3055 uint32_t rsvd4;
3056 uint32_t rsvd5;
3068 uint32_t eventTag; /* Event tag */
3069 uint32_t word2;
3089 uint32_t word3;
3107 uint32_t word7;
3126 uint32_t word8;
3161 uint32_t eventTag; /* Event tag */
3162 uint32_t rsvd1;
3169 uint32_t rsvd:25;
3170 uint32_t ra:1;
3171 uint32_t co:1;
3172 uint32_t cv:1;
3173 uint32_t type:4;
3174 uint32_t entry_index:16;
3175 uint32_t region_id:16;
3177 uint32_t type:4;
3178 uint32_t cv:1;
3179 uint32_t co:1;
3180 uint32_t ra:1;
3181 uint32_t rsvd:25;
3182 uint32_t region_id:16;
3183 uint32_t entry_index:16;
3186 uint32_t sli4_length;
3187 uint32_t word_cnt;
3188 uint32_t resp_offset;
3221 uint32_t signature;
3222 uint32_t rev;
3224 uint32_t resvd[66];
3232 uint32_t ver:4; /* Major Version */
3233 uint32_t rev:4; /* Revision */
3234 uint32_t lev:2; /* Level */
3235 uint32_t dist:2; /* Dist Type */
3236 uint32_t num:4; /* number after dist type */
3238 uint32_t num:4; /* number after dist type */
3239 uint32_t dist:2; /* Dist Type */
3240 uint32_t lev:2; /* Level */
3241 uint32_t rev:4; /* Revision */
3242 uint32_t ver:4; /* Major Version */
3252 uint32_t rsvd2:16;
3253 uint32_t type:8;
3254 uint32_t rsvd:1;
3255 uint32_t ra:1;
3256 uint32_t co:1;
3257 uint32_t cv:1;
3258 uint32_t req:4;
3259 uint32_t entry_length:16;
3260 uint32_t region_id:16;
3262 uint32_t req:4;
3263 uint32_t cv:1;
3264 uint32_t co:1;
3265 uint32_t ra:1;
3266 uint32_t rsvd:1;
3267 uint32_t type:8;
3268 uint32_t rsvd2:16;
3269 uint32_t region_id:16;
3270 uint32_t entry_length:16;
3273 uint32_t resp_info;
3274 uint32_t byte_cnt;
3275 uint32_t data_offset;
3297 uint32_t rsvd1 :7;
3298 uint32_t recvNotify :1; /* Receive Notification */
3299 uint32_t numMask :8; /* # Mask Entries */
3300 uint32_t profile :8; /* Selection Profile */
3301 uint32_t rsvd2 :8;
3303 uint32_t rsvd2 :8;
3304 uint32_t profile :8; /* Selection Profile */
3305 uint32_t numMask :8; /* # Mask Entries */
3306 uint32_t recvNotify :1; /* Receive Notification */
3307 uint32_t rsvd1 :7;
3311 uint32_t hbqId :16;
3312 uint32_t rsvd3 :12;
3313 uint32_t ringMask :4;
3315 uint32_t ringMask :4;
3316 uint32_t rsvd3 :12;
3317 uint32_t hbqId :16;
3321 uint32_t entry_count :16;
3322 uint32_t rsvd4 :8;
3323 uint32_t headerLen :8;
3325 uint32_t headerLen :8;
3326 uint32_t rsvd4 :8;
3327 uint32_t entry_count :16;
3330 uint32_t hbqaddrLow;
3331 uint32_t hbqaddrHigh;
3334 uint32_t rsvd5 :31;
3335 uint32_t logEntry :1;
3337 uint32_t logEntry :1;
3338 uint32_t rsvd5 :31;
3341 uint32_t rsvd6; /* w7 */
3342 uint32_t rsvd7; /* w8 */
3343 uint32_t rsvd8; /* w9 */
3349 uint32_t allprofiles[12];
3353 uint32_t seqlenoff :16;
3354 uint32_t maxlen :16;
3356 uint32_t maxlen :16;
3357 uint32_t seqlenoff :16;
3360 uint32_t rsvd1 :28;
3361 uint32_t seqlenbcnt :4;
3363 uint32_t seqlenbcnt :4;
3364 uint32_t rsvd1 :28;
3366 uint32_t rsvd[10];
3371 uint32_t seqlenoff :16;
3372 uint32_t maxlen :16;
3374 uint32_t maxlen :16;
3375 uint32_t seqlenoff :16;
3378 uint32_t cmdcodeoff :28;
3379 uint32_t rsvd1 :12;
3380 uint32_t seqlenbcnt :4;
3382 uint32_t seqlenbcnt :4;
3383 uint32_t rsvd1 :12;
3384 uint32_t cmdcodeoff :28;
3386 uint32_t cmdmatch[8];
3388 uint32_t rsvd[2];
3393 uint32_t seqlenoff :16;
3394 uint32_t maxlen :16;
3396 uint32_t maxlen :16;
3397 uint32_t seqlenoff :16;
3400 uint32_t cmdcodeoff :28;
3401 uint32_t rsvd1 :12;
3402 uint32_t seqlenbcnt :4;
3404 uint32_t seqlenbcnt :4;
3405 uint32_t rsvd1 :12;
3406 uint32_t cmdcodeoff :28;
3408 uint32_t cmdmatch[8];
3410 uint32_t rsvd[2];
3422 uint32_t cBE : 1;
3423 uint32_t cET : 1;
3424 uint32_t cHpcb : 1;
3425 uint32_t cMA : 1;
3426 uint32_t sli_mode : 4;
3427 uint32_t pcbLen : 24; /* bit 23:0 of memory based port
3430 uint32_t pcbLen : 24; /* bit 23:0 of memory based port
3432 uint32_t sli_mode : 4;
3433 uint32_t cMA : 1;
3434 uint32_t cHpcb : 1;
3435 uint32_t cET : 1;
3436 uint32_t cBE : 1;
3439 uint32_t pcbLow; /* bit 31:0 of memory based port config block */
3440 uint32_t pcbHigh; /* bit 63:32 of memory based port config block */
3441 uint32_t hbainit[5];
3443 uint32_t hps : 1; /* bit 31 word9 Host Pointer in slim */
3444 uint32_t rsvd : 31; /* least significant 31 bits of word 9 */
3446 uint32_t rsvd : 31; /* least significant 31 bits of word 9 */
3447 uint32_t hps : 1; /* bit 31 word9 Host Pointer in slim */
3451 uint32_t rsvd1 : 20; /* Reserved */
3452 uint32_t casabt : 1; /* Configure async abts status notice */
3453 uint32_t rsvd2 : 2; /* Reserved */
3454 uint32_t cbg : 1; /* Configure BlockGuard */
3455 uint32_t cmv : 1; /* Configure Max VPIs */
3456 uint32_t ccrp : 1; /* Config Command Ring Polling */
3457 uint32_t csah : 1; /* Configure Synchronous Abort Handling */
3458 uint32_t chbs : 1; /* Cofigure Host Backing store */
3459 uint32_t cinb : 1; /* Enable Interrupt Notification Block */
3460 uint32_t cerbm : 1; /* Configure Enhanced Receive Buf Mgmt */
3461 uint32_t cmx : 1; /* Configure Max XRIs */
3462 uint32_t cmr : 1; /* Configure Max RPIs */
3464 uint32_t cmr : 1; /* Configure Max RPIs */
3465 uint32_t cmx : 1; /* Configure Max XRIs */
3466 uint32_t cerbm : 1; /* Configure Enhanced Receive Buf Mgmt */
3467 uint32_t cinb : 1; /* Enable Interrupt Notification Block */
3468 uint32_t chbs : 1; /* Cofigure Host Backing store */
3469 uint32_t csah : 1; /* Configure Synchronous Abort Handling */
3470 uint32_t ccrp : 1; /* Config Command Ring Polling */
3471 uint32_t cmv : 1; /* Configure Max VPIs */
3472 uint32_t cbg : 1; /* Configure BlockGuard */
3473 uint32_t rsvd2 : 2; /* Reserved */
3474 uint32_t casabt : 1; /* Configure async abts status notice */
3475 uint32_t rsvd1 : 20; /* Reserved */
3478 uint32_t rsvd3 : 20; /* Reserved */
3479 uint32_t gasabt : 1; /* Grant async abts status notice */
3480 uint32_t rsvd4 : 2; /* Reserved */
3481 uint32_t gbg : 1; /* Grant BlockGuard */
3482 uint32_t gmv : 1; /* Grant Max VPIs */
3483 uint32_t gcrp : 1; /* Grant Command Ring Polling */
3484 uint32_t gsah : 1; /* Grant Synchronous Abort Handling */
3485 uint32_t ghbs : 1; /* Grant Host Backing Store */
3486 uint32_t ginb : 1; /* Grant Interrupt Notification Block */
3487 uint32_t gerbm : 1; /* Grant ERBM Request */
3488 uint32_t gmx : 1; /* Grant Max XRIs */
3489 uint32_t gmr : 1; /* Grant Max RPIs */
3491 uint32_t gmr : 1; /* Grant Max RPIs */
3492 uint32_t gmx : 1; /* Grant Max XRIs */
3493 uint32_t gerbm : 1; /* Grant ERBM Request */
3494 uint32_t ginb : 1; /* Grant Interrupt Notification Block */
3495 uint32_t ghbs : 1; /* Grant Host Backing Store */
3496 uint32_t gsah : 1; /* Grant Synchronous Abort Handling */
3497 uint32_t gcrp : 1; /* Grant Command Ring Polling */
3498 uint32_t gmv : 1; /* Grant Max VPIs */
3499 uint32_t gbg : 1; /* Grant BlockGuard */
3500 uint32_t rsvd4 : 2; /* Reserved */
3501 uint32_t gasabt : 1; /* Grant async abts status notice */
3502 uint32_t rsvd3 : 20; /* Reserved */
3506 uint32_t max_rpi : 16; /* Max RPIs Port should configure */
3507 uint32_t max_xri : 16; /* Max XRIs Port should configure */
3509 uint32_t max_xri : 16; /* Max XRIs Port should configure */
3510 uint32_t max_rpi : 16; /* Max RPIs Port should configure */
3514 uint32_t max_hbq : 16; /* Max HBQs Host expect to configure */
3515 uint32_t rsvd5 : 16; /* Max HBQs Host expect to configure */
3517 uint32_t rsvd5 : 16; /* Max HBQs Host expect to configure */
3518 uint32_t max_hbq : 16; /* Max HBQs Host expect to configure */
3521 uint32_t rsvd6; /* Reserved */
3524 uint32_t rsvd7 : 16;
3525 uint32_t max_vpi : 16; /* Max number of virt N-Ports */
3527 uint32_t max_vpi : 16; /* Max number of virt N-Ports */
3528 uint32_t rsvd7 : 16;
3536 uint32_t dfltMsgNum:8; /* Default message number */
3537 uint32_t rsvd1:11; /* Reserved */
3538 uint32_t NID:5; /* Number of secondary attention IDs */
3539 uint32_t rsvd2:5; /* Reserved */
3540 uint32_t dfltPresent:1; /* Default message number present */
3541 uint32_t addFlag:1; /* Add association flag */
3542 uint32_t reportFlag:1; /* Report association flag */
3544 uint32_t reportFlag:1; /* Report association flag */
3545 uint32_t addFlag:1; /* Add association flag */
3546 uint32_t dfltPresent:1; /* Default message number present */
3547 uint32_t rsvd2:5; /* Reserved */
3548 uint32_t NID:5; /* Number of secondary attention IDs */
3549 uint32_t rsvd1:11; /* Reserved */
3550 uint32_t dfltMsgNum:8; /* Default message number */
3552 uint32_t attentionConditions[2];
3556 uint32_t autoClearHA[2];
3558 uint32_t rsvd3:16;
3559 uint32_t autoClearID:16;
3561 uint32_t autoClearID:16;
3562 uint32_t rsvd3:16;
3564 uint32_t rsvd4;
3573 uint32_t cmdEntries;
3574 uint32_t cmdAddrLow;
3575 uint32_t cmdAddrHigh;
3577 uint32_t rspEntries;
3578 uint32_t rspAddrLow;
3579 uint32_t rspAddrHigh;
3584 uint32_t type:8;
3586 uint32_t feature:8;
3588 uint32_t rsvd:12;
3589 uint32_t maxRing:4;
3591 uint32_t maxRing:4;
3592 uint32_t rsvd:12;
3593 uint32_t feature:8;
3595 uint32_t type:8;
3599 uint32_t mailBoxSize;
3600 uint32_t mbAddrLow;
3601 uint32_t mbAddrHigh;
3603 uint32_t hgpAddrLow;
3604 uint32_t hgpAddrHigh;
3606 uint32_t pgpAddrLow;
3607 uint32_t pgpAddrHigh;
3614 uint32_t rsvd0:27;
3615 uint32_t discardFarp:1;
3616 uint32_t IPEnable:1;
3617 uint32_t nodeName:1;
3618 uint32_t portName:1;
3619 uint32_t filterEnable:1;
3621 uint32_t filterEnable:1;
3622 uint32_t portName:1;
3623 uint32_t nodeName:1;
3624 uint32_t IPEnable:1;
3625 uint32_t discardFarp:1;
3626 uint32_t rsvd:27;
3631 uint32_t rsvd1;
3632 uint32_t rsvd2;
3633 uint32_t rsvd3;
3634 uint32_t IPAddress;
3641 uint32_t rsvd:30;
3642 uint32_t ring:2; /* Ring for ASYNC_EVENT iocb Bits 0-1*/
3644 uint32_t ring:2; /* Ring for ASYNC_EVENT iocb Bits 0-1*/
3645 uint32_t rsvd:30;
3651 #define MAILBOX_CMD_SIZE (MAILBOX_CMD_WSIZE * sizeof(uint32_t))
3654 #define MAILBOX_EXT_SIZE (MAILBOX_EXT_WSIZE * sizeof(uint32_t))
3660 uint32_t varWords[MAILBOX_CMD_WSIZE - 1]; /* first word is type/
3717 uint32_t unused1[16];
3724 uint32_t reserved[8];
3725 uint32_t hbq_put[16];
3730 uint32_t hbq_get[16];
3888 uint32_t reserved;
3893 uint32_t reserved[4];
3900 uint32_t xrsqRo; /* Starting Relative Offset */
3910 uint32_t word4Rsvd:7;
3911 uint32_t fl:1;
3912 uint32_t myID:24;
3913 uint32_t word5Rsvd:8;
3914 uint32_t remoteID:24;
3916 uint32_t myID:24;
3917 uint32_t fl:1;
3918 uint32_t word4Rsvd:7;
3919 uint32_t remoteID:24;
3920 uint32_t word5Rsvd:8;
3927 uint32_t parmRo;
3930 uint32_t word5Rsvd:8;
3931 uint32_t remoteID:24;
3933 uint32_t remoteID:24;
3934 uint32_t word5Rsvd:8;
3940 uint32_t rsvd[3];
3941 uint32_t abortType;
3944 uint32_t parm;
3956 uint32_t rsvd[3];
3957 uint32_t abortType;
3958 uint32_t parm;
3959 uint32_t iotag32;
3964 uint32_t rsvd[4];
3965 uint32_t parmRo;
3967 uint32_t word5Rsvd:8;
3968 uint32_t remoteID:24;
3970 uint32_t remoteID:24;
3971 uint32_t word5Rsvd:8;
3979 uint32_t fcpi_parm;
3980 uint32_t fcpi_XRdy; /* transfer ready for IWRITE */
3986 uint32_t fcpt_Offset;
3987 uint32_t fcpt_Length; /* transfer ready for IWRITE */
3995 uint32_t xrsqRo; /* Starting Relative Offset */
4005 uint32_t rsvd1;
4006 uint32_t xrsqRo; /* Starting Relative Offset */
4014 uint32_t word4Rsvd:7;
4015 uint32_t fl:1;
4016 uint32_t myID:24;
4017 uint32_t word5Rsvd:8;
4018 uint32_t remoteID:24;
4020 uint32_t myID:24;
4021 uint32_t fl:1;
4022 uint32_t word4Rsvd:7;
4023 uint32_t remoteID:24;
4024 uint32_t word5Rsvd:8;
4031 uint32_t xrsqRo; /* Starting Relative Offset */
4038 uint32_t rcvd1;
4039 uint32_t parmRo;
4042 uint32_t word5Rsvd:8;
4043 uint32_t remoteID:24;
4045 uint32_t remoteID:24;
4046 uint32_t word5Rsvd:8;
4053 uint32_t hbq_1;
4054 uint32_t parmRo;
4056 uint32_t rctl:8;
4057 uint32_t type:8;
4058 uint32_t dfctl:8;
4059 uint32_t ls:1;
4060 uint32_t fs:1;
4061 uint32_t rsvd2:3;
4062 uint32_t si:1;
4063 uint32_t bc:1;
4064 uint32_t rsvd3:1;
4066 uint32_t rsvd3:1;
4067 uint32_t bc:1;
4068 uint32_t si:1;
4069 uint32_t rsvd2:3;
4070 uint32_t fs:1;
4071 uint32_t ls:1;
4072 uint32_t dfctl:8;
4073 uint32_t type:8;
4074 uint32_t rctl:8;
4081 uint32_t fcpi_parm;
4082 uint32_t fcpi_XRdy; /* transfer ready for IWRITE */
4088 uint32_t fcpt_Offset;
4089 uint32_t fcpt_Length; /* transfer ready for IWRITE */
4094 uint32_t rsvd[4];
4095 uint32_t param;
4125 uint32_t word10Rsvd;
4126 uint32_t acc_len; /* accumulated length */
4133 uint32_t buffer_tag;
4139 uint32_t rsvd;
4140 uint32_t rsvd1;
4144 uint32_t iotag64_low;
4145 uint32_t iotag64_high;
4146 uint32_t ebde_count;
4147 uint32_t rsvd;
4152 uint32_t filler[6]; /* word 8-13 in IOCB */
4153 uint32_t bghm; /* word 14 - BlockGuard High Water Mark */
4173 uint32_t bgstat; /* word 15 - BlockGuard Status */
4176 static inline uint32_t
4177 lpfc_bgs_get_bidir_bg_prof(uint32_t bgstat) in lpfc_bgs_get_bidir_bg_prof()
4183 static inline uint32_t
4184 lpfc_bgs_get_bidir_err_cond(uint32_t bgstat) in lpfc_bgs_get_bidir_err_cond()
4190 static inline uint32_t
4191 lpfc_bgs_get_bg_prof(uint32_t bgstat) in lpfc_bgs_get_bg_prof()
4197 static inline uint32_t
4198 lpfc_bgs_get_invalid_prof(uint32_t bgstat) in lpfc_bgs_get_invalid_prof()
4204 static inline uint32_t
4205 lpfc_bgs_get_uninit_dif_block(uint32_t bgstat) in lpfc_bgs_get_uninit_dif_block()
4211 static inline uint32_t
4212 lpfc_bgs_get_hi_water_mark_present(uint32_t bgstat) in lpfc_bgs_get_hi_water_mark_present()
4218 static inline uint32_t
4219 lpfc_bgs_get_reftag_err(uint32_t bgstat) in lpfc_bgs_get_reftag_err()
4225 static inline uint32_t
4226 lpfc_bgs_get_apptag_err(uint32_t bgstat) in lpfc_bgs_get_apptag_err()
4232 static inline uint32_t
4233 lpfc_bgs_get_guard_err(uint32_t bgstat) in lpfc_bgs_get_guard_err()
4241 uint32_t io_tag64_low;
4242 uint32_t io_tag64_high;
4254 uint32_t reserved4;
4286 uint32_t ulpWord[IOCB_WORD_SZ - 2]; /* generic 6 'words' */
4315 uint32_t ulpTimeout:8;
4316 uint32_t ulpXS:1;
4317 uint32_t ulpFCP2Rcvy:1;
4318 uint32_t ulpPU:2;
4319 uint32_t ulpIr:1;
4320 uint32_t ulpClass:3;
4321 uint32_t ulpCommand:8;
4322 uint32_t ulpStatus:4;
4323 uint32_t ulpBdeCount:2;
4324 uint32_t ulpLe:1;
4325 uint32_t ulpOwner:1; /* Low order bit word 7 */
4327 uint32_t ulpOwner:1; /* Low order bit word 7 */
4328 uint32_t ulpLe:1;
4329 uint32_t ulpBdeCount:2;
4330 uint32_t ulpStatus:4;
4331 uint32_t ulpCommand:8;
4332 uint32_t ulpClass:3;
4333 uint32_t ulpIr:1;
4334 uint32_t ulpPU:2;
4335 uint32_t ulpFCP2Rcvy:1;
4336 uint32_t ulpXS:1;
4337 uint32_t ulpTimeout:8;
4346 uint32_t sli3Words[24]; /* 96 extra bytes for SLI-3 */
4400 sizeof(uint32_t) * MAILBOX_EXT_WSIZE))
4408 uint32_t mbx_ext_words[MAILBOX_EXT_WSIZE];