5326 					      u32 int_reg)  in ipr_handle_other_interrupt()  argument
5332 	int_reg &= ~int_mask_reg;  in ipr_handle_other_interrupt()
5337 	if ((int_reg & IPR_PCII_OPER_INTERRUPTS) == 0) {  in ipr_handle_other_interrupt()
5340 			int_reg = readl(ioa_cfg->regs.sense_interrupt_reg) & ~int_mask_reg;  in ipr_handle_other_interrupt()
5341 			if (int_reg & IPR_PCII_IPL_STAGE_CHANGE) {  in ipr_handle_other_interrupt()
5345 				int_reg = readl(ioa_cfg->regs.sense_interrupt_reg) & ~int_mask_reg;  in ipr_handle_other_interrupt()
5356 	if (int_reg & IPR_PCII_IOA_TRANS_TO_OPER) {  in ipr_handle_other_interrupt()
5359 		int_reg = readl(ioa_cfg->regs.sense_interrupt_reg);  in ipr_handle_other_interrupt()
5364 	} else if ((int_reg & IPR_PCII_HRRQ_UPDATED) == int_reg) {  in ipr_handle_other_interrupt()
5368 					"Spurious interrupt detected. 0x%08X\n", int_reg);  in ipr_handle_other_interrupt()
5370 			int_reg = readl(ioa_cfg->regs.sense_interrupt_reg32);  in ipr_handle_other_interrupt()
5374 		if (int_reg & IPR_PCII_IOA_UNIT_CHECKED)  in ipr_handle_other_interrupt()
5376 		else if (int_reg & IPR_PCII_NO_HOST_RRQ)  in ipr_handle_other_interrupt()
5378 				"No Host RRQ. 0x%08X\n", int_reg);  in ipr_handle_other_interrupt()
5381 				"Permanent IOA failure. 0x%08X\n", int_reg);  in ipr_handle_other_interrupt()
5501 	u32 int_reg = 0;  in ipr_isr()  local
5527 				int_reg = readl(ioa_cfg->regs.sense_interrupt_reg32);  in ipr_isr()
5528 			} while (int_reg & IPR_PCII_HRRQ_UPDATED &&  in ipr_isr()
5532 			int_reg = readl(ioa_cfg->regs.sense_interrupt_reg32);  in ipr_isr()
5535 			   int_reg & IPR_PCII_HRRQ_UPDATED) {  in ipr_isr()
5545 		rc = ipr_handle_other_interrupt(ioa_cfg, int_reg);  in ipr_isr()
7614 	volatile u32 int_reg;  in ipr_reset_next_stage()  local
7634 		int_reg = readl(ioa_cfg->regs.sense_interrupt_mask_reg);  in ipr_reset_next_stage()
7638 		int_reg = readl(ioa_cfg->regs.sense_interrupt_reg32);  in ipr_reset_next_stage()
7639 		if (int_reg & IPR_PCII_IOA_TRANS_TO_OPER) {  in ipr_reset_next_stage()
7644 			int_reg = readl(ioa_cfg->regs.sense_interrupt_mask_reg);  in ipr_reset_next_stage()
7672 	volatile u32 int_reg;  in ipr_reset_enable_ioa()  local
7688 		int_reg = readl(ioa_cfg->regs.endian_swap_reg);  in ipr_reset_enable_ioa()
7691 	int_reg = readl(ioa_cfg->regs.sense_interrupt_reg32);  in ipr_reset_enable_ioa()
7693 	if (int_reg & IPR_PCII_IOA_TRANS_TO_OPER) {  in ipr_reset_enable_ioa()
7696 		int_reg = readl(ioa_cfg->regs.sense_interrupt_mask_reg);  in ipr_reset_enable_ioa()
7710 	int_reg = readl(ioa_cfg->regs.sense_interrupt_mask_reg);  in ipr_reset_enable_ioa()