Lines Matching +full:slew +full:- +full:time +full:- +full:us

4  * Copyright (c) 1994-2001, 2004 Justin T. Gibbs.
5  * Copyright (c) 2000-2002 Adaptec Inc.
19  * 3. Neither the names of the above-listed copyright holders nor the names
62 	if ((ahd->bugs & AHD_SET_MODE_BUG) != 0) {			\
69 	if ((ahd->bugs & AHD_SET_MODE_BUG) != 0) {			\
76 	if ((ahd->bugs & AHD_INTCOLLISION_BUG) != 0) {			\
187 						 * A command with a non-zero
839  * PCI-X Control
2564  * SCSI I/O Cell Power-down Control
2607  * Data Transfer Negotiation Data - Period Byte
2628  * Data Transfer Negotiation Data - Offset Byte
2639  * Data Transfer Negotiation Data - PPR Options
2654  * Data Transfer Negotiation Data -  Connection Options
2712  * Rev A has only a single bit (high bit of field) of slew adjustment.
2747  * 960MHz Phase-Locked Loop Control 0
2774  * 960MHz Phase-Locked Loop Control 1
2815  * 960-MHz Phase-Locked Loop Test Count
2825  * 400-MHz Phase-Locked Loop Control 0
2851  * 400-MHz Phase-Locked Loop Control 1
2873  * 400-MHz Phase-Locked Loop Test Count
2906  * SCB-Next Address Snooping logic.  When an SCB is transferred to
2942  * CMC SCB Ram Back-up Address Pointer
3590  * (0-7 only) to the top nibble and retrieve the bit indexed by that value
3669 /* ---------------------- Scratch RAM Offsets ------------------------- */
3722 	 * Per "other-id" execution queues.  We use an array of
3723 	 * tail pointers into lists of SCBs sorted by "other-id".
3792 	 * Counting semaphore to prevent new select-outs
3827 		field	DIRECTION	0x04	/* Set indicates PCI->SCSI */
3947 	 * Sequences the kernel driver has okayed for us.  This allows
3985 	 * The maximum amount of time to wait, when interrupt coalescing
4014 	 * Number of commands "in-flight".
4031 	 * this position in scratch ram every time it changes.
4038 	 * Target-mode CDB type to CDB length table used
4039 	 * in non-packetized operation.
4141 		 * Overloaded field for non-packetized