Lines Matching refs:rio_write_config_32
226 rio_write_config_32(rdev, IDT_PW_INFO_CSR, 0x0000e000); in idtg2_em_init()
233 rio_write_config_32(rdev, IDT_LT_ERR_REPORT_EN, in idtg2_em_init()
241 rio_write_config_32(rdev, IDT_DEV_CTRL_1, in idtg2_em_init()
249 rio_write_config_32(rdev, IDT_PORT_ERR_REPORT_EN_BC, 0x807e8037); in idtg2_em_init()
252 rio_write_config_32(rdev, IDT_PORT_ISERR_REPORT_EN_BC, in idtg2_em_init()
259 rio_write_config_32(rdev, in idtg2_em_init()
266 rio_write_config_32(rdev, IDT_ERR_CAP, IDT_ERR_CAP_LOG_OVERWR); in idtg2_em_init()
273 rio_write_config_32(rdev, IDT_LANE_ERR_REPORT_EN_BC, 0); in idtg2_em_init()
281 rio_write_config_32(rdev, IDT_LANE_CTRL(i), in idtg2_em_init()
290 rio_write_config_32(rdev, IDT_AUX_PORT_ERR_CAP_EN, 0); in idtg2_em_init()
293 rio_write_config_32(rdev, IDT_AUX_ERR_REPORT_EN, 0); in idtg2_em_init()
296 rio_write_config_32(rdev, IDT_JTAG_CTRL, 0); in idtg2_em_init()
300 rio_write_config_32(rdev, IDT_I2C_MCTRL, regval & ~IDT_I2C_MCTRL_GENPW); in idtg2_em_init()
307 rio_write_config_32(rdev, IDT_CFGBLK_ERR_CAPTURE_EN, 0); in idtg2_em_init()
311 rio_write_config_32(rdev, IDT_CFGBLK_ERR_REPORT, in idtg2_em_init()
315 rio_write_config_32(rdev, in idtg2_em_init()
340 rio_write_config_32(rdev, IDT_ISLTL_ADDRESS_CAP, 0); in idtg2_em_handler()
360 rio_write_config_32(rdev, in idtg2_em_handler()
431 rio_write_config_32(rdev, in idtg2_probe()