Lines Matching +full:max +full:- +full:outbound +full:- +full:regions
1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * RapidIO mport driver for Tsi721 PCIExpress-to-SRIO bridge
19 #include <linux/dma-mapping.h>
32 static int pcie_mrrs = -1;
47 * tsi721_lcread - read from local SREP config space
55 * success or %-EINVAL on failure.
60 struct tsi721_device *priv = mport->priv; in tsi721_lcread()
63 return -EINVAL; /* only 32-bit access is supported */ in tsi721_lcread()
65 *data = ioread32(priv->regs + offset); in tsi721_lcread()
71 * tsi721_lcwrite - write into local SREP config space
79 * success or %-EINVAL on failure.
84 struct tsi721_device *priv = mport->priv; in tsi721_lcwrite()
87 return -EINVAL; /* only 32-bit access is supported */ in tsi721_lcwrite()
89 iowrite32(data, priv->regs + offset); in tsi721_lcwrite()
95 * tsi721_maint_dma - Helper function to generate RapidIO maintenance
107 * Returns %0 on success and %-EINVAL or %-EFAULT on failure.
113 void __iomem *regs = priv->regs + TSI721_DMAC_BASE(priv->mdma.ch_id); in tsi721_maint_dma()
120 if (offset > (RIO_MAINT_SPACE_SZ - len) || (len != sizeof(u32))) in tsi721_maint_dma()
121 return -EINVAL; in tsi721_maint_dma()
125 bd_ptr = priv->mdma.bd_base; in tsi721_maint_dma()
151 tsi_debug(MAINT, &priv->pdev->dev, in tsi721_maint_dma()
153 priv->mdma.ch_id, ch_stat); in tsi721_maint_dma()
156 err = -EIO; in tsi721_maint_dma()
165 tsi_debug(MAINT, &priv->pdev->dev, "DMA ABORT ch_stat=%x", in tsi721_maint_dma()
167 tsi_debug(MAINT, &priv->pdev->dev, in tsi721_maint_dma()
178 err = -EIO; in tsi721_maint_dma()
200 * tsi721_cread_dma - Generate a RapidIO maintenance read transaction
211 * Returns %0 on success and %-EINVAL or %-EFAULT on failure.
216 struct tsi721_device *priv = mport->priv; in tsi721_cread_dma()
218 return tsi721_maint_dma(priv, mport->sys_size, destid, hopcount, in tsi721_cread_dma()
223 * tsi721_cwrite_dma - Generate a RapidIO maintenance write transaction
234 * Returns %0 on success and %-EINVAL or %-EFAULT on failure.
239 struct tsi721_device *priv = mport->priv; in tsi721_cwrite_dma()
242 return tsi721_maint_dma(priv, mport->sys_size, destid, hopcount, in tsi721_cwrite_dma()
247 * tsi721_pw_handler - Tsi721 inbound port-write interrupt handler
250 * Handles inbound port-write interrupts. Copies PW message from an internal
261 pw_stat = ioread32(priv->regs + TSI721_RIO_PW_RX_STAT); in tsi721_pw_handler()
264 pw_buf[0] = ioread32(priv->regs + TSI721_RIO_PW_RX_CAPT(0)); in tsi721_pw_handler()
265 pw_buf[1] = ioread32(priv->regs + TSI721_RIO_PW_RX_CAPT(1)); in tsi721_pw_handler()
266 pw_buf[2] = ioread32(priv->regs + TSI721_RIO_PW_RX_CAPT(2)); in tsi721_pw_handler()
267 pw_buf[3] = ioread32(priv->regs + TSI721_RIO_PW_RX_CAPT(3)); in tsi721_pw_handler()
272 spin_lock(&priv->pw_fifo_lock); in tsi721_pw_handler()
273 if (kfifo_avail(&priv->pw_fifo) >= TSI721_RIO_PW_MSG_SIZE) in tsi721_pw_handler()
274 kfifo_in(&priv->pw_fifo, pw_buf, in tsi721_pw_handler()
277 priv->pw_discard_count++; in tsi721_pw_handler()
278 spin_unlock(&priv->pw_fifo_lock); in tsi721_pw_handler()
283 priv->regs + TSI721_RIO_PW_RX_STAT); in tsi721_pw_handler()
285 schedule_work(&priv->pw_work); in tsi721_pw_handler()
297 * Process port-write messages in tsi721_pw_dpc()
299 while (kfifo_out_spinlocked(&priv->pw_fifo, (unsigned char *)&pwmsg, in tsi721_pw_dpc()
300 TSI721_RIO_PW_MSG_SIZE, &priv->pw_fifo_lock)) { in tsi721_pw_dpc()
301 /* Pass the port-write message to RIO core for processing */ in tsi721_pw_dpc()
302 rio_inb_pwrite_handler(&priv->mport, &pwmsg); in tsi721_pw_dpc()
307 * tsi721_pw_enable - enable/disable port-write interface init
309 * @enable: 1=enable; 0=disable port-write message handling
313 struct tsi721_device *priv = mport->priv; in tsi721_pw_enable()
316 rval = ioread32(priv->regs + TSI721_RIO_EM_INT_ENABLE); in tsi721_pw_enable()
325 priv->regs + TSI721_RIO_PW_RX_STAT); in tsi721_pw_enable()
327 iowrite32(rval, priv->regs + TSI721_RIO_EM_INT_ENABLE); in tsi721_pw_enable()
333 * tsi721_dsend - Send a RapidIO doorbell
337 * @data: 16-bit info field of RapidIO doorbell
344 struct tsi721_device *priv = mport->priv; in tsi721_dsend()
347 offset = (((mport->sys_size) ? RIO_TT_CODE_16 : RIO_TT_CODE_8) << 18) | in tsi721_dsend()
350 tsi_debug(DBELL, &priv->pdev->dev, in tsi721_dsend()
352 iowrite16be(data, priv->odb_base + offset); in tsi721_dsend()
358 * tsi721_dbell_handler - Tsi721 doorbell interrupt handler
359 * @priv: tsi721 device-specific data structure
371 regval = ioread32(priv->regs + TSI721_SR_CHINTE(IDB_QUEUE)); in tsi721_dbell_handler()
374 priv->regs + TSI721_SR_CHINTE(IDB_QUEUE)); in tsi721_dbell_handler()
376 schedule_work(&priv->idb_work); in tsi721_dbell_handler()
399 mport = &priv->mport; in tsi721_db_dpc()
401 wr_ptr = ioread32(priv->regs + TSI721_IDQ_WP(IDB_QUEUE)) % IDB_QSIZE; in tsi721_db_dpc()
402 rd_ptr = ioread32(priv->regs + TSI721_IDQ_RP(IDB_QUEUE)) % IDB_QSIZE; in tsi721_db_dpc()
405 idb_entry = (u64 *)(priv->idb_base + in tsi721_db_dpc()
413 list_for_each_entry(dbell, &mport->dbells, node) { in tsi721_db_dpc()
414 if ((dbell->res->start <= DBELL_INF(idb.bytes)) && in tsi721_db_dpc()
415 (dbell->res->end >= DBELL_INF(idb.bytes))) { in tsi721_db_dpc()
422 dbell->dinb(mport, dbell->dev_id, DBELL_SID(idb.bytes), in tsi721_db_dpc()
425 tsi_debug(DBELL, &priv->pdev->dev, in tsi721_db_dpc()
431 wr_ptr = ioread32(priv->regs + in tsi721_db_dpc()
435 iowrite32(rd_ptr & (IDB_QSIZE - 1), in tsi721_db_dpc()
436 priv->regs + TSI721_IDQ_RP(IDB_QUEUE)); in tsi721_db_dpc()
438 /* Re-enable IDB interrupts */ in tsi721_db_dpc()
439 regval = ioread32(priv->regs + TSI721_SR_CHINTE(IDB_QUEUE)); in tsi721_db_dpc()
442 priv->regs + TSI721_SR_CHINTE(IDB_QUEUE)); in tsi721_db_dpc()
444 wr_ptr = ioread32(priv->regs + TSI721_IDQ_WP(IDB_QUEUE)) % IDB_QSIZE; in tsi721_db_dpc()
446 schedule_work(&priv->idb_work); in tsi721_db_dpc()
450 * tsi721_irqhandler - Tsi721 interrupt handler
452 * @ptr: Pointer to interrupt-specific data (tsi721_device structure)
455 * interrupt events and calls an event-specific handler(s).
465 /* For MSI mode disable all device-level interrupts */ in tsi721_irqhandler()
466 if (priv->flags & TSI721_USING_MSI) in tsi721_irqhandler()
467 iowrite32(0, priv->regs + TSI721_DEV_INTE); in tsi721_irqhandler()
469 dev_int = ioread32(priv->regs + TSI721_DEV_INT); in tsi721_irqhandler()
473 dev_ch_int = ioread32(priv->regs + TSI721_DEV_CHAN_INT); in tsi721_irqhandler()
479 intval = ioread32(priv->regs + in tsi721_irqhandler()
484 tsi_info(&priv->pdev->dev, in tsi721_irqhandler()
489 priv->regs + TSI721_SR_CHINT(IDB_QUEUE)); in tsi721_irqhandler()
490 ioread32(priv->regs + TSI721_SR_CHINT(IDB_QUEUE)); in tsi721_irqhandler()
503 ch_inte = ioread32(priv->regs + TSI721_DEV_CHAN_INTE); in tsi721_irqhandler()
505 iowrite32(ch_inte, priv->regs + TSI721_DEV_CHAN_INTE); in tsi721_irqhandler()
517 if (dev_ch_int & TSI721_INT_OMSG_CHAN_M) { /* Outbound Msg */ in tsi721_irqhandler()
519 ch_inte = ioread32(priv->regs + TSI721_DEV_CHAN_INTE); in tsi721_irqhandler()
521 iowrite32(ch_inte, priv->regs + TSI721_DEV_CHAN_INTE); in tsi721_irqhandler()
524 * Process Outbound Message interrupts for each MBOX in tsi721_irqhandler()
537 intval = ioread32(priv->regs + TSI721_RIO_EM_INT_STAT); in tsi721_irqhandler()
547 tsi_debug(DMA, &priv->pdev->dev, in tsi721_irqhandler()
553 tsi721_bdma_handler(&priv->bdma[ch]); in tsi721_irqhandler()
559 /* For MSI mode re-enable device-level interrupts */ in tsi721_irqhandler()
560 if (priv->flags & TSI721_USING_MSI) { in tsi721_irqhandler()
563 iowrite32(dev_int, priv->regs + TSI721_DEV_INTE); in tsi721_irqhandler()
575 priv->regs + TSI721_SR_CHINT(IDB_QUEUE)); in tsi721_interrupts_init()
577 priv->regs + TSI721_SR_CHINTE(IDB_QUEUE)); in tsi721_interrupts_init()
581 priv->regs + TSI721_RIO_EM_DEV_INT_EN); in tsi721_interrupts_init()
591 iowrite32(intr, priv->regs + TSI721_DEV_CHAN_INTE); in tsi721_interrupts_init()
593 if (priv->flags & TSI721_USING_MSIX) in tsi721_interrupts_init()
599 iowrite32(intr, priv->regs + TSI721_DEV_INTE); in tsi721_interrupts_init()
600 ioread32(priv->regs + TSI721_DEV_INTE); in tsi721_interrupts_init()
605 * tsi721_omsg_msix - MSI-X interrupt handler for outbound messaging
607 * @ptr: Pointer to interrupt-specific data (tsi721_device structure)
609 * Handles outbound messaging interrupts signaled using MSI-X.
616 mbox = (irq - priv->msix[TSI721_VECT_OMB0_DONE].vector) % RIO_MAX_MBOX; in tsi721_omsg_msix()
622 * tsi721_imsg_msix - MSI-X interrupt handler for inbound messaging
624 * @ptr: Pointer to interrupt-specific data (tsi721_device structure)
626 * Handles inbound messaging interrupts signaled using MSI-X.
633 mbox = (irq - priv->msix[TSI721_VECT_IMB0_RCV].vector) % RIO_MAX_MBOX; in tsi721_imsg_msix()
639 * tsi721_srio_msix - Tsi721 MSI-X SRIO MAC interrupt handler
641 * @ptr: Pointer to interrupt-specific data (tsi721_device structure)
651 srio_int = ioread32(priv->regs + TSI721_RIO_EM_INT_STAT); in tsi721_srio_msix()
659 * tsi721_sr2pc_ch_msix - Tsi721 MSI-X SR2PC Channel interrupt handler
661 * @ptr: Pointer to interrupt-specific data (tsi721_device structure)
673 sr_ch_int = ioread32(priv->regs + TSI721_SR_CHINT(IDB_QUEUE)); in tsi721_sr2pc_ch_msix()
678 iowrite32(sr_ch_int, priv->regs + TSI721_SR_CHINT(IDB_QUEUE)); in tsi721_sr2pc_ch_msix()
680 sr_ch_int = ioread32(priv->regs + TSI721_SR_CHINT(IDB_QUEUE)); in tsi721_sr2pc_ch_msix()
686 * tsi721_request_msix - register interrupt service for MSI-X mode.
687 * @priv: tsi721 device-specific data structure
689 * Registers MSI-X interrupt service routines for interrupts that are active
697 err = request_irq(priv->msix[TSI721_VECT_IDB].vector, in tsi721_request_msix()
699 priv->msix[TSI721_VECT_IDB].irq_name, (void *)priv); in tsi721_request_msix()
703 err = request_irq(priv->msix[TSI721_VECT_PWRX].vector, in tsi721_request_msix()
705 priv->msix[TSI721_VECT_PWRX].irq_name, (void *)priv); in tsi721_request_msix()
707 free_irq(priv->msix[TSI721_VECT_IDB].vector, (void *)priv); in tsi721_request_msix()
715 * tsi721_enable_msix - Attempts to enable MSI-X support for Tsi721.
718 * Configures MSI-X support for Tsi721. Supports only an exact number
731 * Initialize MSI-X entries for Messaging Engine: in tsi721_enable_msix()
732 * this driver supports four RIO mailboxes (inbound and outbound) in tsi721_enable_msix()
749 * Initialize MSI-X entries for Block DMA Engine: in tsi721_enable_msix()
761 err = pci_enable_msix_exact(priv->pdev, entries, ARRAY_SIZE(entries)); in tsi721_enable_msix()
763 tsi_err(&priv->pdev->dev, in tsi721_enable_msix()
764 "Failed to enable MSI-X (err=%d)", err); in tsi721_enable_msix()
769 * Copy MSI-X vector information into tsi721 private structure in tsi721_enable_msix()
771 priv->msix[TSI721_VECT_IDB].vector = entries[TSI721_VECT_IDB].vector; in tsi721_enable_msix()
772 snprintf(priv->msix[TSI721_VECT_IDB].irq_name, IRQ_DEVICE_NAME_MAX, in tsi721_enable_msix()
773 DRV_NAME "-idb@pci:%s", pci_name(priv->pdev)); in tsi721_enable_msix()
774 priv->msix[TSI721_VECT_PWRX].vector = entries[TSI721_VECT_PWRX].vector; in tsi721_enable_msix()
775 snprintf(priv->msix[TSI721_VECT_PWRX].irq_name, IRQ_DEVICE_NAME_MAX, in tsi721_enable_msix()
776 DRV_NAME "-pwrx@pci:%s", pci_name(priv->pdev)); in tsi721_enable_msix()
779 priv->msix[TSI721_VECT_IMB0_RCV + i].vector = in tsi721_enable_msix()
781 snprintf(priv->msix[TSI721_VECT_IMB0_RCV + i].irq_name, in tsi721_enable_msix()
782 IRQ_DEVICE_NAME_MAX, DRV_NAME "-imbr%d@pci:%s", in tsi721_enable_msix()
783 i, pci_name(priv->pdev)); in tsi721_enable_msix()
785 priv->msix[TSI721_VECT_IMB0_INT + i].vector = in tsi721_enable_msix()
787 snprintf(priv->msix[TSI721_VECT_IMB0_INT + i].irq_name, in tsi721_enable_msix()
788 IRQ_DEVICE_NAME_MAX, DRV_NAME "-imbi%d@pci:%s", in tsi721_enable_msix()
789 i, pci_name(priv->pdev)); in tsi721_enable_msix()
791 priv->msix[TSI721_VECT_OMB0_DONE + i].vector = in tsi721_enable_msix()
793 snprintf(priv->msix[TSI721_VECT_OMB0_DONE + i].irq_name, in tsi721_enable_msix()
794 IRQ_DEVICE_NAME_MAX, DRV_NAME "-ombd%d@pci:%s", in tsi721_enable_msix()
795 i, pci_name(priv->pdev)); in tsi721_enable_msix()
797 priv->msix[TSI721_VECT_OMB0_INT + i].vector = in tsi721_enable_msix()
799 snprintf(priv->msix[TSI721_VECT_OMB0_INT + i].irq_name, in tsi721_enable_msix()
800 IRQ_DEVICE_NAME_MAX, DRV_NAME "-ombi%d@pci:%s", in tsi721_enable_msix()
801 i, pci_name(priv->pdev)); in tsi721_enable_msix()
806 priv->msix[TSI721_VECT_DMA0_DONE + i].vector = in tsi721_enable_msix()
808 snprintf(priv->msix[TSI721_VECT_DMA0_DONE + i].irq_name, in tsi721_enable_msix()
809 IRQ_DEVICE_NAME_MAX, DRV_NAME "-dmad%d@pci:%s", in tsi721_enable_msix()
810 i, pci_name(priv->pdev)); in tsi721_enable_msix()
812 priv->msix[TSI721_VECT_DMA0_INT + i].vector = in tsi721_enable_msix()
814 snprintf(priv->msix[TSI721_VECT_DMA0_INT + i].irq_name, in tsi721_enable_msix()
815 IRQ_DEVICE_NAME_MAX, DRV_NAME "-dmai%d@pci:%s", in tsi721_enable_msix()
816 i, pci_name(priv->pdev)); in tsi721_enable_msix()
829 if (priv->flags & TSI721_USING_MSIX) in tsi721_request_irq()
833 err = request_irq(priv->pdev->irq, tsi721_irqhandler, in tsi721_request_irq()
834 (priv->flags & TSI721_USING_MSI) ? 0 : IRQF_SHARED, in tsi721_request_irq()
838 tsi_err(&priv->pdev->dev, in tsi721_request_irq()
847 if (priv->flags & TSI721_USING_MSIX) { in tsi721_free_irq()
848 free_irq(priv->msix[TSI721_VECT_IDB].vector, (void *)priv); in tsi721_free_irq()
849 free_irq(priv->msix[TSI721_VECT_PWRX].vector, (void *)priv); in tsi721_free_irq()
852 free_irq(priv->pdev->irq, (void *)priv); in tsi721_free_irq()
865 int new_win_idx = -1; in tsi721_obw_alloc()
868 bar_base = pbar->base; in tsi721_obw_alloc()
869 bar_end = bar_base + pbar->size; in tsi721_obw_alloc()
875 if (!priv->ob_win[i].active) { in tsi721_obw_alloc()
877 new_win = &priv->ob_win[i]; in tsi721_obw_alloc()
887 win = &priv->ob_win[i]; in tsi721_obw_alloc()
889 if (win->base >= bar_base && win->base < bar_end) { in tsi721_obw_alloc()
890 if (win_base < (win->base + win->size) && in tsi721_obw_alloc()
891 (win_base + size) > win->base) { in tsi721_obw_alloc()
893 win_base = win->base + win->size; in tsi721_obw_alloc()
902 return -ENOMEM; in tsi721_obw_alloc()
905 tsi_err(&priv->pdev->dev, "OBW count tracking failed"); in tsi721_obw_alloc()
906 return -EIO; in tsi721_obw_alloc()
909 new_win->active = true; in tsi721_obw_alloc()
910 new_win->base = win_base; in tsi721_obw_alloc()
911 new_win->size = size; in tsi721_obw_alloc()
912 new_win->pbar = pbar; in tsi721_obw_alloc()
913 priv->obwin_cnt--; in tsi721_obw_alloc()
914 pbar->free -= size; in tsi721_obw_alloc()
922 struct tsi721_device *priv = mport->priv; in tsi721_map_outb_win()
926 int obw = -1; in tsi721_map_outb_win()
930 int ret = -ENOMEM; in tsi721_map_outb_win()
932 tsi_debug(OBW, &priv->pdev->dev, in tsi721_map_outb_win()
935 if (!is_power_of_2(size) || (size < 0x8000) || (rstart & (size - 1))) in tsi721_map_outb_win()
936 return -EINVAL; in tsi721_map_outb_win()
938 if (priv->obwin_cnt == 0) in tsi721_map_outb_win()
939 return -EBUSY; in tsi721_map_outb_win()
942 if (priv->p2r_bar[i].free >= size) { in tsi721_map_outb_win()
943 pbar = &priv->p2r_bar[i]; in tsi721_map_outb_win()
953 WARN_ON(obw == -1); in tsi721_map_outb_win()
954 ob_win = &priv->ob_win[obw]; in tsi721_map_outb_win()
955 ob_win->destid = destid; in tsi721_map_outb_win()
956 ob_win->rstart = rstart; in tsi721_map_outb_win()
957 tsi_debug(OBW, &priv->pdev->dev, in tsi721_map_outb_win()
958 "allocated OBW%d @%llx", obw, ob_win->base); in tsi721_map_outb_win()
961 * Configure Outbound Window in tsi721_map_outb_win()
973 while (ioread32(priv->regs + TSI721_ZONE_SEL) & in tsi721_map_outb_win()
980 iowrite32(rval, priv->regs + TSI721_LUT_DATA0); in tsi721_map_outb_win()
982 iowrite32(rval, priv->regs + TSI721_LUT_DATA1); in tsi721_map_outb_win()
984 iowrite32(rval, priv->regs + TSI721_LUT_DATA2); in tsi721_map_outb_win()
987 iowrite32(rval, priv->regs + TSI721_ZONE_SEL); in tsi721_map_outb_win()
993 priv->regs + TSI721_OBWINSZ(obw)); in tsi721_map_outb_win()
994 iowrite32((u32)(ob_win->base >> 32), priv->regs + TSI721_OBWINUB(obw)); in tsi721_map_outb_win()
995 iowrite32((u32)(ob_win->base & TSI721_OBWINLB_BA) | TSI721_OBWINLB_WEN, in tsi721_map_outb_win()
996 priv->regs + TSI721_OBWINLB(obw)); in tsi721_map_outb_win()
998 *laddr = ob_win->base; in tsi721_map_outb_win()
1005 struct tsi721_device *priv = mport->priv; in tsi721_unmap_outb_win()
1009 tsi_debug(OBW, &priv->pdev->dev, "did=%d ra=0x%llx", destid, rstart); in tsi721_unmap_outb_win()
1012 ob_win = &priv->ob_win[i]; in tsi721_unmap_outb_win()
1014 if (ob_win->active && in tsi721_unmap_outb_win()
1015 ob_win->destid == destid && ob_win->rstart == rstart) { in tsi721_unmap_outb_win()
1016 tsi_debug(OBW, &priv->pdev->dev, in tsi721_unmap_outb_win()
1017 "free OBW%d @%llx", i, ob_win->base); in tsi721_unmap_outb_win()
1018 ob_win->active = false; in tsi721_unmap_outb_win()
1019 iowrite32(0, priv->regs + TSI721_OBWINLB(i)); in tsi721_unmap_outb_win()
1020 ob_win->pbar->free += ob_win->size; in tsi721_unmap_outb_win()
1021 priv->obwin_cnt++; in tsi721_unmap_outb_win()
1028 * tsi721_init_pc2sr_mapping - initializes outbound (PCIe->SRIO)
1029 * translation regions.
1032 * Disables SREP translation regions.
1041 iowrite32(0, priv->regs + TSI721_OBWINLB(i)); in tsi721_init_pc2sr_mapping()
1044 iowrite32(0, priv->regs + TSI721_LUT_DATA0); in tsi721_init_pc2sr_mapping()
1045 iowrite32(0, priv->regs + TSI721_LUT_DATA1); in tsi721_init_pc2sr_mapping()
1046 iowrite32(0, priv->regs + TSI721_LUT_DATA2); in tsi721_init_pc2sr_mapping()
1050 while (ioread32(priv->regs + TSI721_ZONE_SEL) & in tsi721_init_pc2sr_mapping()
1055 iowrite32(rval, priv->regs + TSI721_ZONE_SEL); in tsi721_init_pc2sr_mapping()
1059 if (priv->p2r_bar[0].size == 0 && priv->p2r_bar[1].size == 0) { in tsi721_init_pc2sr_mapping()
1060 priv->obwin_cnt = 0; in tsi721_init_pc2sr_mapping()
1064 priv->p2r_bar[0].free = priv->p2r_bar[0].size; in tsi721_init_pc2sr_mapping()
1065 priv->p2r_bar[1].free = priv->p2r_bar[1].size; in tsi721_init_pc2sr_mapping()
1068 priv->ob_win[i].active = false; in tsi721_init_pc2sr_mapping()
1070 priv->obwin_cnt = TSI721_OBWIN_NUM; in tsi721_init_pc2sr_mapping()
1074 * tsi721_rio_map_inb_mem -- Mapping inbound memory region.
1081 * Return: 0 -- Success.
1089 struct tsi721_device *priv = mport->priv; in tsi721_rio_map_inb_mem()
1090 int i, avail = -1; in tsi721_rio_map_inb_mem()
1098 int ret = -EBUSY; in tsi721_rio_map_inb_mem()
1100 /* Max IBW size supported by HW is 16GB */ in tsi721_rio_map_inb_mem()
1102 return -EINVAL; in tsi721_rio_map_inb_mem()
1108 ibw_start = lstart & ~(ibw_size - 1); in tsi721_rio_map_inb_mem()
1110 tsi_debug(IBW, &priv->pdev->dev, in tsi721_rio_map_inb_mem()
1111 "Direct (RIO_0x%llx -> PCIe_%pad), size=0x%llx, ibw_start = 0x%llx", in tsi721_rio_map_inb_mem()
1116 ibw_start = lstart & ~(ibw_size - 1); in tsi721_rio_map_inb_mem()
1117 /* Check for crossing IBW max size 16GB */ in tsi721_rio_map_inb_mem()
1119 return -EBUSY; in tsi721_rio_map_inb_mem()
1126 return -ENOMEM; in tsi721_rio_map_inb_mem()
1129 tsi_debug(IBW, &priv->pdev->dev, in tsi721_rio_map_inb_mem()
1130 "Translated (RIO_0x%llx -> PCIe_%pad), size=0x%llx", in tsi721_rio_map_inb_mem()
1134 ((u64)lstart & (size - 1)) || (rstart & (size - 1))) in tsi721_rio_map_inb_mem()
1135 return -EINVAL; in tsi721_rio_map_inb_mem()
1136 if (priv->ibwin_cnt == 0) in tsi721_rio_map_inb_mem()
1137 return -EBUSY; in tsi721_rio_map_inb_mem()
1144 * Scan for overlapping with active regions and mark the first available in tsi721_rio_map_inb_mem()
1148 ib_win = &priv->ib_win[i]; in tsi721_rio_map_inb_mem()
1150 if (!ib_win->active) { in tsi721_rio_map_inb_mem()
1151 if (avail == -1) { in tsi721_rio_map_inb_mem()
1155 } else if (ibw_start < (ib_win->rstart + ib_win->size) && in tsi721_rio_map_inb_mem()
1156 (ibw_start + ibw_size) > ib_win->rstart) { in tsi721_rio_map_inb_mem()
1158 if (!direct || ib_win->xlat) { in tsi721_rio_map_inb_mem()
1159 ret = -EFAULT; in tsi721_rio_map_inb_mem()
1165 * requested fragments - check if this new request fits in tsi721_rio_map_inb_mem()
1168 if (rstart >= ib_win->rstart && in tsi721_rio_map_inb_mem()
1169 (rstart + size) <= (ib_win->rstart + in tsi721_rio_map_inb_mem()
1170 ib_win->size)) { in tsi721_rio_map_inb_mem()
1171 /* We are in - no further mapping required */ in tsi721_rio_map_inb_mem()
1172 map->lstart = lstart; in tsi721_rio_map_inb_mem()
1173 list_add_tail(&map->node, &ib_win->mappings); in tsi721_rio_map_inb_mem()
1177 ret = -EFAULT; in tsi721_rio_map_inb_mem()
1187 regval = ioread32(priv->regs + TSI721_IBWIN_LB(i)); in tsi721_rio_map_inb_mem()
1189 ret = -EIO; in tsi721_rio_map_inb_mem()
1193 ib_win = &priv->ib_win[i]; in tsi721_rio_map_inb_mem()
1194 ib_win->active = true; in tsi721_rio_map_inb_mem()
1195 ib_win->rstart = ibw_start; in tsi721_rio_map_inb_mem()
1196 ib_win->lstart = loc_start; in tsi721_rio_map_inb_mem()
1197 ib_win->size = ibw_size; in tsi721_rio_map_inb_mem()
1198 ib_win->xlat = (lstart != rstart); in tsi721_rio_map_inb_mem()
1199 INIT_LIST_HEAD(&ib_win->mappings); in tsi721_rio_map_inb_mem()
1207 map->lstart = lstart; in tsi721_rio_map_inb_mem()
1208 list_add_tail(&map->node, &ib_win->mappings); in tsi721_rio_map_inb_mem()
1212 priv->regs + TSI721_IBWIN_SZ(i)); in tsi721_rio_map_inb_mem()
1214 iowrite32(((u64)loc_start >> 32), priv->regs + TSI721_IBWIN_TUA(i)); in tsi721_rio_map_inb_mem()
1216 priv->regs + TSI721_IBWIN_TLA(i)); in tsi721_rio_map_inb_mem()
1218 iowrite32(ibw_start >> 32, priv->regs + TSI721_IBWIN_UB(i)); in tsi721_rio_map_inb_mem()
1220 priv->regs + TSI721_IBWIN_LB(i)); in tsi721_rio_map_inb_mem()
1222 priv->ibwin_cnt--; in tsi721_rio_map_inb_mem()
1224 tsi_debug(IBW, &priv->pdev->dev, in tsi721_rio_map_inb_mem()
1225 "Configured IBWIN%d (RIO_0x%llx -> PCIe_%pad), size=0x%llx", in tsi721_rio_map_inb_mem()
1235 * tsi721_rio_unmap_inb_mem -- Unmapping inbound memory region.
1242 struct tsi721_device *priv = mport->priv; in tsi721_rio_unmap_inb_mem()
1246 tsi_debug(IBW, &priv->pdev->dev, in tsi721_rio_unmap_inb_mem()
1251 ib_win = &priv->ib_win[i]; in tsi721_rio_unmap_inb_mem()
1254 if (!ib_win->active || in tsi721_rio_unmap_inb_mem()
1255 (ib_win->xlat && lstart != ib_win->lstart)) in tsi721_rio_unmap_inb_mem()
1258 if (lstart >= ib_win->lstart && in tsi721_rio_unmap_inb_mem()
1259 lstart < (ib_win->lstart + ib_win->size)) { in tsi721_rio_unmap_inb_mem()
1261 if (!ib_win->xlat) { in tsi721_rio_unmap_inb_mem()
1266 &ib_win->mappings, node) { in tsi721_rio_unmap_inb_mem()
1267 if (map->lstart == lstart) { in tsi721_rio_unmap_inb_mem()
1268 list_del(&map->node); in tsi721_rio_unmap_inb_mem()
1278 if (!list_empty(&ib_win->mappings)) in tsi721_rio_unmap_inb_mem()
1282 tsi_debug(IBW, &priv->pdev->dev, "Disable IBWIN_%d", i); in tsi721_rio_unmap_inb_mem()
1283 iowrite32(0, priv->regs + TSI721_IBWIN_LB(i)); in tsi721_rio_unmap_inb_mem()
1284 ib_win->active = false; in tsi721_rio_unmap_inb_mem()
1285 priv->ibwin_cnt++; in tsi721_rio_unmap_inb_mem()
1291 tsi_debug(IBW, &priv->pdev->dev, in tsi721_rio_unmap_inb_mem()
1296 * tsi721_init_sr2pc_mapping - initializes inbound (SRIO->PCIe)
1297 * translation regions.
1308 iowrite32(0, priv->regs + TSI721_IBWIN_LB(i)); in tsi721_init_sr2pc_mapping()
1309 priv->ibwin_cnt = TSI721_IBWIN_NUM; in tsi721_init_sr2pc_mapping()
1313 * tsi721_close_sr2pc_mapping - closes all active inbound (SRIO->PCIe)
1314 * translation regions.
1324 ib_win = &priv->ib_win[i]; in tsi721_close_sr2pc_mapping()
1325 if (ib_win->active) { in tsi721_close_sr2pc_mapping()
1326 iowrite32(0, priv->regs + TSI721_IBWIN_LB(i)); in tsi721_close_sr2pc_mapping()
1327 ib_win->active = false; in tsi721_close_sr2pc_mapping()
1333 * tsi721_port_write_init - Inbound port write interface init
1337 * Returns %0 on success or %-ENOMEM on failure.
1341 priv->pw_discard_count = 0; in tsi721_port_write_init()
1342 INIT_WORK(&priv->pw_work, tsi721_pw_dpc); in tsi721_port_write_init()
1343 spin_lock_init(&priv->pw_fifo_lock); in tsi721_port_write_init()
1344 if (kfifo_alloc(&priv->pw_fifo, in tsi721_port_write_init()
1346 tsi_err(&priv->pdev->dev, "PW FIFO allocation failed"); in tsi721_port_write_init()
1347 return -ENOMEM; in tsi721_port_write_init()
1350 /* Use reliable port-write capture mode */ in tsi721_port_write_init()
1351 iowrite32(TSI721_RIO_PW_CTL_PWC_REL, priv->regs + TSI721_RIO_PW_CTL); in tsi721_port_write_init()
1357 kfifo_free(&priv->pw_fifo); in tsi721_port_write_free()
1362 /* Outbound Doorbells do not require any setup. in tsi721_doorbell_init()
1368 priv->db_discard_count = 0; in tsi721_doorbell_init()
1369 INIT_WORK(&priv->idb_work, tsi721_db_dpc); in tsi721_doorbell_init()
1372 priv->idb_base = dma_alloc_coherent(&priv->pdev->dev, in tsi721_doorbell_init()
1374 &priv->idb_dma, GFP_KERNEL); in tsi721_doorbell_init()
1375 if (!priv->idb_base) in tsi721_doorbell_init()
1376 return -ENOMEM; in tsi721_doorbell_init()
1378 tsi_debug(DBELL, &priv->pdev->dev, in tsi721_doorbell_init()
1380 priv->idb_base, &priv->idb_dma); in tsi721_doorbell_init()
1383 priv->regs + TSI721_IDQ_SIZE(IDB_QUEUE)); in tsi721_doorbell_init()
1384 iowrite32(((u64)priv->idb_dma >> 32), in tsi721_doorbell_init()
1385 priv->regs + TSI721_IDQ_BASEU(IDB_QUEUE)); in tsi721_doorbell_init()
1386 iowrite32(((u64)priv->idb_dma & TSI721_IDQ_BASEL_ADDR), in tsi721_doorbell_init()
1387 priv->regs + TSI721_IDQ_BASEL(IDB_QUEUE)); in tsi721_doorbell_init()
1389 iowrite32(0, priv->regs + TSI721_IDQ_MASK(IDB_QUEUE)); in tsi721_doorbell_init()
1391 iowrite32(TSI721_IDQ_INIT, priv->regs + TSI721_IDQ_CTL(IDB_QUEUE)); in tsi721_doorbell_init()
1393 iowrite32(0, priv->regs + TSI721_IDQ_RP(IDB_QUEUE)); in tsi721_doorbell_init()
1400 if (priv->idb_base == NULL) in tsi721_doorbell_free()
1404 dma_free_coherent(&priv->pdev->dev, IDB_QSIZE * TSI721_IDB_ENTRY_SIZE, in tsi721_doorbell_free()
1405 priv->idb_base, priv->idb_dma); in tsi721_doorbell_free()
1406 priv->idb_base = NULL; in tsi721_doorbell_free()
1410 * tsi721_bdma_maint_init - Initialize maintenance request BDMA channel.
1415 * Returns %0 on success or %-ENOMEM on failure.
1426 tsi_debug(MAINT, &priv->pdev->dev, in tsi721_bdma_maint_init()
1433 priv->mdma.ch_id = TSI721_DMACH_MAINT; in tsi721_bdma_maint_init()
1434 regs = priv->regs + TSI721_DMAC_BASE(TSI721_DMACH_MAINT); in tsi721_bdma_maint_init()
1437 bd_ptr = dma_alloc_coherent(&priv->pdev->dev, in tsi721_bdma_maint_init()
1441 return -ENOMEM; in tsi721_bdma_maint_init()
1443 priv->mdma.bd_num = bd_num; in tsi721_bdma_maint_init()
1444 priv->mdma.bd_phys = bd_phys; in tsi721_bdma_maint_init()
1445 priv->mdma.bd_base = bd_ptr; in tsi721_bdma_maint_init()
1447 tsi_debug(MAINT, &priv->pdev->dev, "DMA descriptors @ %p (phys = %pad)", in tsi721_bdma_maint_init()
1454 sts_ptr = dma_alloc_coherent(&priv->pdev->dev, in tsi721_bdma_maint_init()
1459 dma_free_coherent(&priv->pdev->dev, in tsi721_bdma_maint_init()
1462 priv->mdma.bd_base = NULL; in tsi721_bdma_maint_init()
1463 return -ENOMEM; in tsi721_bdma_maint_init()
1466 priv->mdma.sts_phys = sts_phys; in tsi721_bdma_maint_init()
1467 priv->mdma.sts_base = sts_ptr; in tsi721_bdma_maint_init()
1468 priv->mdma.sts_size = sts_size; in tsi721_bdma_maint_init()
1470 tsi_debug(MAINT, &priv->pdev->dev, in tsi721_bdma_maint_init()
1475 bd_ptr[bd_num - 1].type_id = cpu_to_le32(DTYPE3 << 29); in tsi721_bdma_maint_init()
1476 bd_ptr[bd_num - 1].next_lo = cpu_to_le32((u64)bd_phys & in tsi721_bdma_maint_init()
1478 bd_ptr[bd_num - 1].next_hi = cpu_to_le32((u64)bd_phys >> 32); in tsi721_bdma_maint_init()
1508 struct tsi721_bdma_maint *mdma = &priv->mdma; in tsi721_bdma_maint_free()
1509 void __iomem *regs = priv->regs + TSI721_DMAC_BASE(mdma->ch_id); in tsi721_bdma_maint_free()
1511 if (mdma->bd_base == NULL) in tsi721_bdma_maint_free()
1517 return -EFAULT; in tsi721_bdma_maint_free()
1523 dma_free_coherent(&priv->pdev->dev, in tsi721_bdma_maint_free()
1524 mdma->bd_num * sizeof(struct tsi721_dma_desc), in tsi721_bdma_maint_free()
1525 mdma->bd_base, mdma->bd_phys); in tsi721_bdma_maint_free()
1526 mdma->bd_base = NULL; in tsi721_bdma_maint_free()
1529 dma_free_coherent(&priv->pdev->dev, in tsi721_bdma_maint_free()
1530 mdma->sts_size * sizeof(struct tsi721_dma_sts), in tsi721_bdma_maint_free()
1531 mdma->sts_base, mdma->sts_phys); in tsi721_bdma_maint_free()
1532 mdma->sts_base = NULL; in tsi721_bdma_maint_free()
1547 iowrite32(inte_mask, priv->regs + TSI721_IBDMAC_INT(ch)); in tsi721_imsg_interrupt_enable()
1550 rval = ioread32(priv->regs + TSI721_IBDMAC_INTE(ch)); in tsi721_imsg_interrupt_enable()
1551 iowrite32(rval | inte_mask, priv->regs + TSI721_IBDMAC_INTE(ch)); in tsi721_imsg_interrupt_enable()
1553 if (priv->flags & TSI721_USING_MSIX) in tsi721_imsg_interrupt_enable()
1554 return; /* Finished if we are in MSI-X mode */ in tsi721_imsg_interrupt_enable()
1561 rval = ioread32(priv->regs + TSI721_DEV_CHAN_INTE); in tsi721_imsg_interrupt_enable()
1563 priv->regs + TSI721_DEV_CHAN_INTE); in tsi721_imsg_interrupt_enable()
1577 iowrite32(inte_mask, priv->regs + TSI721_IBDMAC_INT(ch)); in tsi721_imsg_interrupt_disable()
1580 rval = ioread32(priv->regs + TSI721_IBDMAC_INTE(ch)); in tsi721_imsg_interrupt_disable()
1582 iowrite32(rval, priv->regs + TSI721_IBDMAC_INTE(ch)); in tsi721_imsg_interrupt_disable()
1584 if (priv->flags & TSI721_USING_MSIX) in tsi721_imsg_interrupt_disable()
1585 return; /* Finished if we are in MSI-X mode */ in tsi721_imsg_interrupt_disable()
1592 rval = ioread32(priv->regs + TSI721_DEV_CHAN_INTE); in tsi721_imsg_interrupt_disable()
1594 iowrite32(rval, priv->regs + TSI721_DEV_CHAN_INTE); in tsi721_imsg_interrupt_disable()
1597 /* Enable Outbound Messaging interrupts */
1607 /* Clear pending Outbound Messaging interrupts */ in tsi721_omsg_interrupt_enable()
1608 iowrite32(inte_mask, priv->regs + TSI721_OBDMAC_INT(ch)); in tsi721_omsg_interrupt_enable()
1610 /* Enable Outbound Messaging channel interrupts */ in tsi721_omsg_interrupt_enable()
1611 rval = ioread32(priv->regs + TSI721_OBDMAC_INTE(ch)); in tsi721_omsg_interrupt_enable()
1612 iowrite32(rval | inte_mask, priv->regs + TSI721_OBDMAC_INTE(ch)); in tsi721_omsg_interrupt_enable()
1614 if (priv->flags & TSI721_USING_MSIX) in tsi721_omsg_interrupt_enable()
1615 return; /* Finished if we are in MSI-X mode */ in tsi721_omsg_interrupt_enable()
1622 rval = ioread32(priv->regs + TSI721_DEV_CHAN_INTE); in tsi721_omsg_interrupt_enable()
1624 priv->regs + TSI721_DEV_CHAN_INTE); in tsi721_omsg_interrupt_enable()
1627 /* Disable Outbound Messaging interrupts */
1637 /* Clear pending Outbound Messaging interrupts */ in tsi721_omsg_interrupt_disable()
1638 iowrite32(inte_mask, priv->regs + TSI721_OBDMAC_INT(ch)); in tsi721_omsg_interrupt_disable()
1640 /* Disable Outbound Messaging interrupts */ in tsi721_omsg_interrupt_disable()
1641 rval = ioread32(priv->regs + TSI721_OBDMAC_INTE(ch)); in tsi721_omsg_interrupt_disable()
1643 iowrite32(rval, priv->regs + TSI721_OBDMAC_INTE(ch)); in tsi721_omsg_interrupt_disable()
1645 if (priv->flags & TSI721_USING_MSIX) in tsi721_omsg_interrupt_disable()
1646 return; /* Finished if we are in MSI-X mode */ in tsi721_omsg_interrupt_disable()
1653 rval = ioread32(priv->regs + TSI721_DEV_CHAN_INTE); in tsi721_omsg_interrupt_disable()
1655 iowrite32(rval, priv->regs + TSI721_DEV_CHAN_INTE); in tsi721_omsg_interrupt_disable()
1659 * tsi721_add_outb_message - Add message to the Tsi721 outbound message queue
1660 * @mport: Master port with outbound message queue
1661 * @rdev: Target of outbound message
1662 * @mbox: Outbound mailbox
1663 * @buffer: Message to add to outbound queue
1670 struct tsi721_device *priv = mport->priv; in tsi721_add_outb_message()
1675 if (!priv->omsg_init[mbox] || in tsi721_add_outb_message()
1677 return -EINVAL; in tsi721_add_outb_message()
1679 spin_lock_irqsave(&priv->omsg_ring[mbox].lock, flags); in tsi721_add_outb_message()
1681 tx_slot = priv->omsg_ring[mbox].tx_slot; in tsi721_add_outb_message()
1684 memcpy(priv->omsg_ring[mbox].omq_base[tx_slot], buffer, len); in tsi721_add_outb_message()
1690 desc = priv->omsg_ring[mbox].omd_base; in tsi721_add_outb_message()
1691 desc[tx_slot].type_id = cpu_to_le32((DTYPE4 << 29) | rdev->destid); in tsi721_add_outb_message()
1693 /* Request IOF_DONE interrupt generation for each N-th frame in queue */ in tsi721_add_outb_message()
1698 cpu_to_le32((mport->sys_size << 26) | (mbox << 22) | in tsi721_add_outb_message()
1701 cpu_to_le32((u64)priv->omsg_ring[mbox].omq_phys[tx_slot] & in tsi721_add_outb_message()
1704 cpu_to_le32((u64)priv->omsg_ring[mbox].omq_phys[tx_slot] >> 32); in tsi721_add_outb_message()
1706 priv->omsg_ring[mbox].wr_count++; in tsi721_add_outb_message()
1709 if (++priv->omsg_ring[mbox].tx_slot == priv->omsg_ring[mbox].size) { in tsi721_add_outb_message()
1710 priv->omsg_ring[mbox].tx_slot = 0; in tsi721_add_outb_message()
1712 priv->omsg_ring[mbox].wr_count++; in tsi721_add_outb_message()
1718 iowrite32(priv->omsg_ring[mbox].wr_count, in tsi721_add_outb_message()
1719 priv->regs + TSI721_OBDMAC_DWRCNT(mbox)); in tsi721_add_outb_message()
1720 ioread32(priv->regs + TSI721_OBDMAC_DWRCNT(mbox)); in tsi721_add_outb_message()
1722 spin_unlock_irqrestore(&priv->omsg_ring[mbox].lock, flags); in tsi721_add_outb_message()
1728 * tsi721_omsg_handler - Outbound Message Interrupt Handler
1732 * Services channel interrupts from outbound messaging engine.
1737 struct rio_mport *mport = &priv->mport; in tsi721_omsg_handler()
1742 spin_lock(&priv->omsg_ring[ch].lock); in tsi721_omsg_handler()
1744 omsg_int = ioread32(priv->regs + TSI721_OBDMAC_INT(ch)); in tsi721_omsg_handler()
1747 tsi_info(&priv->pdev->dev, in tsi721_omsg_handler()
1760 srd_ptr = priv->omsg_ring[ch].sts_rdptr; in tsi721_omsg_handler()
1761 sts_ptr = priv->omsg_ring[ch].sts_base; in tsi721_omsg_handler()
1771 srd_ptr %= priv->omsg_ring[ch].sts_size; in tsi721_omsg_handler()
1778 priv->omsg_ring[ch].sts_rdptr = srd_ptr; in tsi721_omsg_handler()
1779 iowrite32(srd_ptr, priv->regs + TSI721_OBDMAC_DSRP(ch)); in tsi721_omsg_handler()
1781 if (!mport->outb_msg[ch].mcback) in tsi721_omsg_handler()
1786 tx_slot = (last_ptr - (u64)priv->omsg_ring[ch].omd_phys)/ in tsi721_omsg_handler()
1794 if (tx_slot == priv->omsg_ring[ch].size) { in tsi721_omsg_handler()
1796 tx_slot = (prev_ptr - in tsi721_omsg_handler()
1797 (u64)priv->omsg_ring[ch].omd_phys)/ in tsi721_omsg_handler()
1803 if (tx_slot >= priv->omsg_ring[ch].size) in tsi721_omsg_handler()
1804 tsi_debug(OMSG, &priv->pdev->dev, in tsi721_omsg_handler()
1806 tx_slot, priv->omsg_ring[ch].size); in tsi721_omsg_handler()
1807 WARN_ON(tx_slot >= priv->omsg_ring[ch].size); in tsi721_omsg_handler()
1811 if (tx_slot == priv->omsg_ring[ch].size) in tsi721_omsg_handler()
1814 dev_id = priv->omsg_ring[ch].dev_id; in tsi721_omsg_handler()
1822 * Outbound message operation aborted due to error, in tsi721_omsg_handler()
1826 tsi_debug(OMSG, &priv->pdev->dev, "OB MSG ABORT ch_stat=%x", in tsi721_omsg_handler()
1827 ioread32(priv->regs + TSI721_OBDMAC_STS(ch))); in tsi721_omsg_handler()
1830 priv->regs + TSI721_OBDMAC_INT(ch)); in tsi721_omsg_handler()
1832 priv->regs + TSI721_OBDMAC_CTL(ch)); in tsi721_omsg_handler()
1833 ioread32(priv->regs + TSI721_OBDMAC_CTL(ch)); in tsi721_omsg_handler()
1836 dev_id = priv->omsg_ring[ch].dev_id; in tsi721_omsg_handler()
1837 tx_slot = priv->omsg_ring[ch].tx_slot; in tsi721_omsg_handler()
1841 iowrite32(priv->omsg_ring[ch].tx_slot, in tsi721_omsg_handler()
1842 priv->regs + TSI721_OBDMAC_DRDCNT(ch)); in tsi721_omsg_handler()
1843 ioread32(priv->regs + TSI721_OBDMAC_DRDCNT(ch)); in tsi721_omsg_handler()
1844 priv->omsg_ring[ch].wr_count = priv->omsg_ring[ch].tx_slot; in tsi721_omsg_handler()
1845 priv->omsg_ring[ch].sts_rdptr = 0; in tsi721_omsg_handler()
1849 iowrite32(omsg_int, priv->regs + TSI721_OBDMAC_INT(ch)); in tsi721_omsg_handler()
1851 if (!(priv->flags & TSI721_USING_MSIX)) { in tsi721_omsg_handler()
1854 /* Re-enable channel interrupts */ in tsi721_omsg_handler()
1855 ch_inte = ioread32(priv->regs + TSI721_DEV_CHAN_INTE); in tsi721_omsg_handler()
1857 iowrite32(ch_inte, priv->regs + TSI721_DEV_CHAN_INTE); in tsi721_omsg_handler()
1860 spin_unlock(&priv->omsg_ring[ch].lock); in tsi721_omsg_handler()
1862 if (mport->outb_msg[ch].mcback && do_callback) in tsi721_omsg_handler()
1863 mport->outb_msg[ch].mcback(mport, dev_id, ch, tx_slot); in tsi721_omsg_handler()
1867 * tsi721_open_outb_mbox - Initialize Tsi721 outbound mailbox
1868 * @mport: Master port implementing Outbound Messaging Engine
1871 * @entries: Number of entries in the outbound mailbox ring
1876 struct tsi721_device *priv = mport->priv; in tsi721_open_outb_mbox()
1883 rc = -EINVAL; in tsi721_open_outb_mbox()
1888 rc = -ENODEV; in tsi721_open_outb_mbox()
1892 priv->omsg_ring[mbox].dev_id = dev_id; in tsi721_open_outb_mbox()
1893 priv->omsg_ring[mbox].size = entries; in tsi721_open_outb_mbox()
1894 priv->omsg_ring[mbox].sts_rdptr = 0; in tsi721_open_outb_mbox()
1895 spin_lock_init(&priv->omsg_ring[mbox].lock); in tsi721_open_outb_mbox()
1897 /* Outbound Msg Buffer allocation based on in tsi721_open_outb_mbox()
1900 priv->omsg_ring[mbox].omq_base[i] = in tsi721_open_outb_mbox()
1902 &priv->pdev->dev, TSI721_MSG_BUFFER_SIZE, in tsi721_open_outb_mbox()
1903 &priv->omsg_ring[mbox].omq_phys[i], in tsi721_open_outb_mbox()
1905 if (priv->omsg_ring[mbox].omq_base[i] == NULL) { in tsi721_open_outb_mbox()
1906 tsi_debug(OMSG, &priv->pdev->dev, in tsi721_open_outb_mbox()
1908 rc = -ENOMEM; in tsi721_open_outb_mbox()
1913 /* Outbound message descriptor allocation */ in tsi721_open_outb_mbox()
1914 priv->omsg_ring[mbox].omd_base = dma_alloc_coherent( in tsi721_open_outb_mbox()
1915 &priv->pdev->dev, in tsi721_open_outb_mbox()
1917 &priv->omsg_ring[mbox].omd_phys, GFP_KERNEL); in tsi721_open_outb_mbox()
1918 if (priv->omsg_ring[mbox].omd_base == NULL) { in tsi721_open_outb_mbox()
1919 tsi_debug(OMSG, &priv->pdev->dev, in tsi721_open_outb_mbox()
1921 rc = -ENOMEM; in tsi721_open_outb_mbox()
1925 priv->omsg_ring[mbox].tx_slot = 0; in tsi721_open_outb_mbox()
1927 /* Outbound message descriptor status FIFO allocation */ in tsi721_open_outb_mbox()
1928 priv->omsg_ring[mbox].sts_size = roundup_pow_of_two(entries + 1); in tsi721_open_outb_mbox()
1929 priv->omsg_ring[mbox].sts_base = dma_alloc_coherent(&priv->pdev->dev, in tsi721_open_outb_mbox()
1930 priv->omsg_ring[mbox].sts_size * sizeof(struct tsi721_dma_sts), in tsi721_open_outb_mbox()
1931 &priv->omsg_ring[mbox].sts_phys, in tsi721_open_outb_mbox()
1933 if (priv->omsg_ring[mbox].sts_base == NULL) { in tsi721_open_outb_mbox()
1934 tsi_debug(OMSG, &priv->pdev->dev, in tsi721_open_outb_mbox()
1936 rc = -ENOMEM; in tsi721_open_outb_mbox()
1941 * Configure Outbound Messaging Engine in tsi721_open_outb_mbox()
1944 /* Setup Outbound Message descriptor pointer */ in tsi721_open_outb_mbox()
1945 iowrite32(((u64)priv->omsg_ring[mbox].omd_phys >> 32), in tsi721_open_outb_mbox()
1946 priv->regs + TSI721_OBDMAC_DPTRH(mbox)); in tsi721_open_outb_mbox()
1947 iowrite32(((u64)priv->omsg_ring[mbox].omd_phys & in tsi721_open_outb_mbox()
1949 priv->regs + TSI721_OBDMAC_DPTRL(mbox)); in tsi721_open_outb_mbox()
1951 /* Setup Outbound Message descriptor status FIFO */ in tsi721_open_outb_mbox()
1952 iowrite32(((u64)priv->omsg_ring[mbox].sts_phys >> 32), in tsi721_open_outb_mbox()
1953 priv->regs + TSI721_OBDMAC_DSBH(mbox)); in tsi721_open_outb_mbox()
1954 iowrite32(((u64)priv->omsg_ring[mbox].sts_phys & in tsi721_open_outb_mbox()
1956 priv->regs + TSI721_OBDMAC_DSBL(mbox)); in tsi721_open_outb_mbox()
1957 iowrite32(TSI721_DMAC_DSSZ_SIZE(priv->omsg_ring[mbox].sts_size), in tsi721_open_outb_mbox()
1958 priv->regs + (u32)TSI721_OBDMAC_DSSZ(mbox)); in tsi721_open_outb_mbox()
1963 if (priv->flags & TSI721_USING_MSIX) { in tsi721_open_outb_mbox()
1966 /* Request interrupt service if we are in MSI-X mode */ in tsi721_open_outb_mbox()
1967 rc = request_irq(priv->msix[idx].vector, tsi721_omsg_msix, 0, in tsi721_open_outb_mbox()
1968 priv->msix[idx].irq_name, (void *)priv); in tsi721_open_outb_mbox()
1971 tsi_debug(OMSG, &priv->pdev->dev, in tsi721_open_outb_mbox()
1972 "Unable to get MSI-X IRQ for OBOX%d-DONE", in tsi721_open_outb_mbox()
1978 rc = request_irq(priv->msix[idx].vector, tsi721_omsg_msix, 0, in tsi721_open_outb_mbox()
1979 priv->msix[idx].irq_name, (void *)priv); in tsi721_open_outb_mbox()
1982 tsi_debug(OMSG, &priv->pdev->dev, in tsi721_open_outb_mbox()
1983 "Unable to get MSI-X IRQ for MBOX%d-INT", mbox); in tsi721_open_outb_mbox()
1985 free_irq(priv->msix[idx].vector, (void *)priv); in tsi721_open_outb_mbox()
1993 /* Initialize Outbound Message descriptors ring */ in tsi721_open_outb_mbox()
1994 bd_ptr = priv->omsg_ring[mbox].omd_base; in tsi721_open_outb_mbox()
1998 cpu_to_le32((u64)priv->omsg_ring[mbox].omd_phys & in tsi721_open_outb_mbox()
2001 cpu_to_le32((u64)priv->omsg_ring[mbox].omd_phys >> 32); in tsi721_open_outb_mbox()
2002 priv->omsg_ring[mbox].wr_count = 0; in tsi721_open_outb_mbox()
2005 /* Initialize Outbound Message engine */ in tsi721_open_outb_mbox()
2007 priv->regs + TSI721_OBDMAC_CTL(mbox)); in tsi721_open_outb_mbox()
2008 ioread32(priv->regs + TSI721_OBDMAC_DWRCNT(mbox)); in tsi721_open_outb_mbox()
2011 priv->omsg_init[mbox] = 1; in tsi721_open_outb_mbox()
2017 dma_free_coherent(&priv->pdev->dev, in tsi721_open_outb_mbox()
2018 priv->omsg_ring[mbox].sts_size * sizeof(struct tsi721_dma_sts), in tsi721_open_outb_mbox()
2019 priv->omsg_ring[mbox].sts_base, in tsi721_open_outb_mbox()
2020 priv->omsg_ring[mbox].sts_phys); in tsi721_open_outb_mbox()
2022 priv->omsg_ring[mbox].sts_base = NULL; in tsi721_open_outb_mbox()
2026 dma_free_coherent(&priv->pdev->dev, in tsi721_open_outb_mbox()
2028 priv->omsg_ring[mbox].omd_base, in tsi721_open_outb_mbox()
2029 priv->omsg_ring[mbox].omd_phys); in tsi721_open_outb_mbox()
2031 priv->omsg_ring[mbox].omd_base = NULL; in tsi721_open_outb_mbox()
2034 for (i = 0; i < priv->omsg_ring[mbox].size; i++) { in tsi721_open_outb_mbox()
2035 if (priv->omsg_ring[mbox].omq_base[i]) { in tsi721_open_outb_mbox()
2036 dma_free_coherent(&priv->pdev->dev, in tsi721_open_outb_mbox()
2038 priv->omsg_ring[mbox].omq_base[i], in tsi721_open_outb_mbox()
2039 priv->omsg_ring[mbox].omq_phys[i]); in tsi721_open_outb_mbox()
2041 priv->omsg_ring[mbox].omq_base[i] = NULL; in tsi721_open_outb_mbox()
2050 * tsi721_close_outb_mbox - Close Tsi721 outbound mailbox
2051 * @mport: Master port implementing the outbound message unit
2056 struct tsi721_device *priv = mport->priv; in tsi721_close_outb_mbox()
2059 if (!priv->omsg_init[mbox]) in tsi721_close_outb_mbox()
2061 priv->omsg_init[mbox] = 0; in tsi721_close_outb_mbox()
2068 if (priv->flags & TSI721_USING_MSIX) { in tsi721_close_outb_mbox()
2069 free_irq(priv->msix[TSI721_VECT_OMB0_DONE + mbox].vector, in tsi721_close_outb_mbox()
2071 free_irq(priv->msix[TSI721_VECT_OMB0_INT + mbox].vector, in tsi721_close_outb_mbox()
2077 dma_free_coherent(&priv->pdev->dev, in tsi721_close_outb_mbox()
2078 priv->omsg_ring[mbox].sts_size * sizeof(struct tsi721_dma_sts), in tsi721_close_outb_mbox()
2079 priv->omsg_ring[mbox].sts_base, in tsi721_close_outb_mbox()
2080 priv->omsg_ring[mbox].sts_phys); in tsi721_close_outb_mbox()
2082 priv->omsg_ring[mbox].sts_base = NULL; in tsi721_close_outb_mbox()
2085 dma_free_coherent(&priv->pdev->dev, in tsi721_close_outb_mbox()
2086 (priv->omsg_ring[mbox].size + 1) * in tsi721_close_outb_mbox()
2088 priv->omsg_ring[mbox].omd_base, in tsi721_close_outb_mbox()
2089 priv->omsg_ring[mbox].omd_phys); in tsi721_close_outb_mbox()
2091 priv->omsg_ring[mbox].omd_base = NULL; in tsi721_close_outb_mbox()
2094 for (i = 0; i < priv->omsg_ring[mbox].size; i++) { in tsi721_close_outb_mbox()
2095 if (priv->omsg_ring[mbox].omq_base[i]) { in tsi721_close_outb_mbox()
2096 dma_free_coherent(&priv->pdev->dev, in tsi721_close_outb_mbox()
2098 priv->omsg_ring[mbox].omq_base[i], in tsi721_close_outb_mbox()
2099 priv->omsg_ring[mbox].omq_phys[i]); in tsi721_close_outb_mbox()
2101 priv->omsg_ring[mbox].omq_base[i] = NULL; in tsi721_close_outb_mbox()
2107 * tsi721_imsg_handler - Inbound Message Interrupt Handler
2115 u32 mbox = ch - 4; in tsi721_imsg_handler()
2117 struct rio_mport *mport = &priv->mport; in tsi721_imsg_handler()
2119 spin_lock(&priv->imsg_ring[mbox].lock); in tsi721_imsg_handler()
2121 imsg_int = ioread32(priv->regs + TSI721_IBDMAC_INT(ch)); in tsi721_imsg_handler()
2124 tsi_info(&priv->pdev->dev, "IB MBOX%d SRIO timeout", mbox); in tsi721_imsg_handler()
2127 tsi_info(&priv->pdev->dev, "IB MBOX%d PCIe error", mbox); in tsi721_imsg_handler()
2130 tsi_info(&priv->pdev->dev, "IB MBOX%d IB free queue low", mbox); in tsi721_imsg_handler()
2133 iowrite32(imsg_int, priv->regs + TSI721_IBDMAC_INT(ch)); in tsi721_imsg_handler()
2137 mport->inb_msg[mbox].mcback) in tsi721_imsg_handler()
2138 mport->inb_msg[mbox].mcback(mport, in tsi721_imsg_handler()
2139 priv->imsg_ring[mbox].dev_id, mbox, -1); in tsi721_imsg_handler()
2141 if (!(priv->flags & TSI721_USING_MSIX)) { in tsi721_imsg_handler()
2144 /* Re-enable channel interrupts */ in tsi721_imsg_handler()
2145 ch_inte = ioread32(priv->regs + TSI721_DEV_CHAN_INTE); in tsi721_imsg_handler()
2147 iowrite32(ch_inte, priv->regs + TSI721_DEV_CHAN_INTE); in tsi721_imsg_handler()
2150 spin_unlock(&priv->imsg_ring[mbox].lock); in tsi721_imsg_handler()
2154 * tsi721_open_inb_mbox - Initialize Tsi721 inbound mailbox
2163 struct tsi721_device *priv = mport->priv; in tsi721_open_inb_mbox()
2172 rc = -EINVAL; in tsi721_open_inb_mbox()
2177 rc = -ENODEV; in tsi721_open_inb_mbox()
2182 priv->imsg_ring[mbox].dev_id = dev_id; in tsi721_open_inb_mbox()
2183 priv->imsg_ring[mbox].size = entries; in tsi721_open_inb_mbox()
2184 priv->imsg_ring[mbox].rx_slot = 0; in tsi721_open_inb_mbox()
2185 priv->imsg_ring[mbox].desc_rdptr = 0; in tsi721_open_inb_mbox()
2186 priv->imsg_ring[mbox].fq_wrptr = 0; in tsi721_open_inb_mbox()
2187 for (i = 0; i < priv->imsg_ring[mbox].size; i++) in tsi721_open_inb_mbox()
2188 priv->imsg_ring[mbox].imq_base[i] = NULL; in tsi721_open_inb_mbox()
2189 spin_lock_init(&priv->imsg_ring[mbox].lock); in tsi721_open_inb_mbox()
2192 priv->imsg_ring[mbox].buf_base = in tsi721_open_inb_mbox()
2193 dma_alloc_coherent(&priv->pdev->dev, in tsi721_open_inb_mbox()
2195 &priv->imsg_ring[mbox].buf_phys, in tsi721_open_inb_mbox()
2198 if (priv->imsg_ring[mbox].buf_base == NULL) { in tsi721_open_inb_mbox()
2199 tsi_err(&priv->pdev->dev, in tsi721_open_inb_mbox()
2201 rc = -ENOMEM; in tsi721_open_inb_mbox()
2206 priv->imsg_ring[mbox].imfq_base = in tsi721_open_inb_mbox()
2207 dma_alloc_coherent(&priv->pdev->dev, in tsi721_open_inb_mbox()
2209 &priv->imsg_ring[mbox].imfq_phys, in tsi721_open_inb_mbox()
2212 if (priv->imsg_ring[mbox].imfq_base == NULL) { in tsi721_open_inb_mbox()
2213 tsi_err(&priv->pdev->dev, in tsi721_open_inb_mbox()
2215 rc = -ENOMEM; in tsi721_open_inb_mbox()
2220 priv->imsg_ring[mbox].imd_base = in tsi721_open_inb_mbox()
2221 dma_alloc_coherent(&priv->pdev->dev, in tsi721_open_inb_mbox()
2223 &priv->imsg_ring[mbox].imd_phys, GFP_KERNEL); in tsi721_open_inb_mbox()
2225 if (priv->imsg_ring[mbox].imd_base == NULL) { in tsi721_open_inb_mbox()
2226 tsi_err(&priv->pdev->dev, in tsi721_open_inb_mbox()
2229 rc = -ENOMEM; in tsi721_open_inb_mbox()
2234 free_ptr = priv->imsg_ring[mbox].imfq_base; in tsi721_open_inb_mbox()
2237 (u64)(priv->imsg_ring[mbox].buf_phys) + in tsi721_open_inb_mbox()
2247 if (!(priv->flags & TSI721_IMSGID_SET)) { in tsi721_open_inb_mbox()
2248 iowrite32((u32)priv->mport.host_deviceid, in tsi721_open_inb_mbox()
2249 priv->regs + TSI721_IB_DEVID); in tsi721_open_inb_mbox()
2250 priv->flags |= TSI721_IMSGID_SET; in tsi721_open_inb_mbox()
2258 iowrite32(((u64)priv->imsg_ring[mbox].imfq_phys >> 32), in tsi721_open_inb_mbox()
2259 priv->regs + TSI721_IBDMAC_FQBH(ch)); in tsi721_open_inb_mbox()
2260 iowrite32(((u64)priv->imsg_ring[mbox].imfq_phys & in tsi721_open_inb_mbox()
2262 priv->regs+TSI721_IBDMAC_FQBL(ch)); in tsi721_open_inb_mbox()
2264 priv->regs + TSI721_IBDMAC_FQSZ(ch)); in tsi721_open_inb_mbox()
2267 iowrite32(((u64)priv->imsg_ring[mbox].imd_phys >> 32), in tsi721_open_inb_mbox()
2268 priv->regs + TSI721_IBDMAC_DQBH(ch)); in tsi721_open_inb_mbox()
2269 iowrite32(((u32)priv->imsg_ring[mbox].imd_phys & in tsi721_open_inb_mbox()
2271 priv->regs+TSI721_IBDMAC_DQBL(ch)); in tsi721_open_inb_mbox()
2273 priv->regs + TSI721_IBDMAC_DQSZ(ch)); in tsi721_open_inb_mbox()
2278 if (priv->flags & TSI721_USING_MSIX) { in tsi721_open_inb_mbox()
2281 /* Request interrupt service if we are in MSI-X mode */ in tsi721_open_inb_mbox()
2282 rc = request_irq(priv->msix[idx].vector, tsi721_imsg_msix, 0, in tsi721_open_inb_mbox()
2283 priv->msix[idx].irq_name, (void *)priv); in tsi721_open_inb_mbox()
2286 tsi_debug(IMSG, &priv->pdev->dev, in tsi721_open_inb_mbox()
2287 "Unable to get MSI-X IRQ for IBOX%d-DONE", in tsi721_open_inb_mbox()
2293 rc = request_irq(priv->msix[idx].vector, tsi721_imsg_msix, 0, in tsi721_open_inb_mbox()
2294 priv->msix[idx].irq_name, (void *)priv); in tsi721_open_inb_mbox()
2297 tsi_debug(IMSG, &priv->pdev->dev, in tsi721_open_inb_mbox()
2298 "Unable to get MSI-X IRQ for IBOX%d-INT", mbox); in tsi721_open_inb_mbox()
2300 priv->msix[TSI721_VECT_IMB0_RCV + mbox].vector, in tsi721_open_inb_mbox()
2310 iowrite32(TSI721_IBDMAC_CTL_INIT, priv->regs + TSI721_IBDMAC_CTL(ch)); in tsi721_open_inb_mbox()
2311 ioread32(priv->regs + TSI721_IBDMAC_CTL(ch)); in tsi721_open_inb_mbox()
2313 priv->imsg_ring[mbox].fq_wrptr = entries - 1; in tsi721_open_inb_mbox()
2314 iowrite32(entries - 1, priv->regs + TSI721_IBDMAC_FQWP(ch)); in tsi721_open_inb_mbox()
2316 priv->imsg_init[mbox] = 1; in tsi721_open_inb_mbox()
2321 dma_free_coherent(&priv->pdev->dev, in tsi721_open_inb_mbox()
2322 priv->imsg_ring[mbox].size * sizeof(struct tsi721_imsg_desc), in tsi721_open_inb_mbox()
2323 priv->imsg_ring[mbox].imd_base, in tsi721_open_inb_mbox()
2324 priv->imsg_ring[mbox].imd_phys); in tsi721_open_inb_mbox()
2326 priv->imsg_ring[mbox].imd_base = NULL; in tsi721_open_inb_mbox()
2330 dma_free_coherent(&priv->pdev->dev, in tsi721_open_inb_mbox()
2331 priv->imsg_ring[mbox].size * 8, in tsi721_open_inb_mbox()
2332 priv->imsg_ring[mbox].imfq_base, in tsi721_open_inb_mbox()
2333 priv->imsg_ring[mbox].imfq_phys); in tsi721_open_inb_mbox()
2335 priv->imsg_ring[mbox].imfq_base = NULL; in tsi721_open_inb_mbox()
2338 dma_free_coherent(&priv->pdev->dev, in tsi721_open_inb_mbox()
2339 priv->imsg_ring[mbox].size * TSI721_MSG_BUFFER_SIZE, in tsi721_open_inb_mbox()
2340 priv->imsg_ring[mbox].buf_base, in tsi721_open_inb_mbox()
2341 priv->imsg_ring[mbox].buf_phys); in tsi721_open_inb_mbox()
2343 priv->imsg_ring[mbox].buf_base = NULL; in tsi721_open_inb_mbox()
2350 * tsi721_close_inb_mbox - Shut down Tsi721 inbound mailbox
2356 struct tsi721_device *priv = mport->priv; in tsi721_close_inb_mbox()
2360 if (!priv->imsg_init[mbox]) /* mbox isn't initialized yet */ in tsi721_close_inb_mbox()
2362 priv->imsg_init[mbox] = 0; in tsi721_close_inb_mbox()
2370 if (priv->flags & TSI721_USING_MSIX) { in tsi721_close_inb_mbox()
2371 free_irq(priv->msix[TSI721_VECT_IMB0_RCV + mbox].vector, in tsi721_close_inb_mbox()
2373 free_irq(priv->msix[TSI721_VECT_IMB0_INT + mbox].vector, in tsi721_close_inb_mbox()
2379 for (rx_slot = 0; rx_slot < priv->imsg_ring[mbox].size; rx_slot++) in tsi721_close_inb_mbox()
2380 priv->imsg_ring[mbox].imq_base[rx_slot] = NULL; in tsi721_close_inb_mbox()
2383 dma_free_coherent(&priv->pdev->dev, in tsi721_close_inb_mbox()
2384 priv->imsg_ring[mbox].size * TSI721_MSG_BUFFER_SIZE, in tsi721_close_inb_mbox()
2385 priv->imsg_ring[mbox].buf_base, in tsi721_close_inb_mbox()
2386 priv->imsg_ring[mbox].buf_phys); in tsi721_close_inb_mbox()
2388 priv->imsg_ring[mbox].buf_base = NULL; in tsi721_close_inb_mbox()
2391 dma_free_coherent(&priv->pdev->dev, in tsi721_close_inb_mbox()
2392 priv->imsg_ring[mbox].size * 8, in tsi721_close_inb_mbox()
2393 priv->imsg_ring[mbox].imfq_base, in tsi721_close_inb_mbox()
2394 priv->imsg_ring[mbox].imfq_phys); in tsi721_close_inb_mbox()
2396 priv->imsg_ring[mbox].imfq_base = NULL; in tsi721_close_inb_mbox()
2399 dma_free_coherent(&priv->pdev->dev, in tsi721_close_inb_mbox()
2400 priv->imsg_ring[mbox].size * sizeof(struct tsi721_imsg_desc), in tsi721_close_inb_mbox()
2401 priv->imsg_ring[mbox].imd_base, in tsi721_close_inb_mbox()
2402 priv->imsg_ring[mbox].imd_phys); in tsi721_close_inb_mbox()
2404 priv->imsg_ring[mbox].imd_base = NULL; in tsi721_close_inb_mbox()
2408 * tsi721_add_inb_buffer - Add buffer to the Tsi721 inbound message queue
2415 struct tsi721_device *priv = mport->priv; in tsi721_add_inb_buffer()
2419 rx_slot = priv->imsg_ring[mbox].rx_slot; in tsi721_add_inb_buffer()
2420 if (priv->imsg_ring[mbox].imq_base[rx_slot]) { in tsi721_add_inb_buffer()
2421 tsi_err(&priv->pdev->dev, in tsi721_add_inb_buffer()
2424 rc = -EINVAL; in tsi721_add_inb_buffer()
2428 priv->imsg_ring[mbox].imq_base[rx_slot] = buf; in tsi721_add_inb_buffer()
2430 if (++priv->imsg_ring[mbox].rx_slot == priv->imsg_ring[mbox].size) in tsi721_add_inb_buffer()
2431 priv->imsg_ring[mbox].rx_slot = 0; in tsi721_add_inb_buffer()
2438 * tsi721_get_inb_message - Fetch inbound message from the Tsi721 MSG Queue
2446 struct tsi721_device *priv = mport->priv; in tsi721_get_inb_message()
2456 if (!priv->imsg_init[mbox]) in tsi721_get_inb_message()
2459 desc = priv->imsg_ring[mbox].imd_base; in tsi721_get_inb_message()
2460 desc += priv->imsg_ring[mbox].desc_rdptr; in tsi721_get_inb_message()
2462 if (!(le32_to_cpu(desc->msg_info) & TSI721_IMD_HO)) in tsi721_get_inb_message()
2465 rx_slot = priv->imsg_ring[mbox].rx_slot; in tsi721_get_inb_message()
2466 while (priv->imsg_ring[mbox].imq_base[rx_slot] == NULL) { in tsi721_get_inb_message()
2467 if (++rx_slot == priv->imsg_ring[mbox].size) in tsi721_get_inb_message()
2471 rx_phys = ((u64)le32_to_cpu(desc->bufptr_hi) << 32) | in tsi721_get_inb_message()
2472 le32_to_cpu(desc->bufptr_lo); in tsi721_get_inb_message()
2474 rx_virt = priv->imsg_ring[mbox].buf_base + in tsi721_get_inb_message()
2475 (rx_phys - (u64)priv->imsg_ring[mbox].buf_phys); in tsi721_get_inb_message()
2477 buf = priv->imsg_ring[mbox].imq_base[rx_slot]; in tsi721_get_inb_message()
2478 msg_size = le32_to_cpu(desc->msg_info) & TSI721_IMD_BCOUNT; in tsi721_get_inb_message()
2483 priv->imsg_ring[mbox].imq_base[rx_slot] = NULL; in tsi721_get_inb_message()
2485 desc->msg_info &= cpu_to_le32(~TSI721_IMD_HO); in tsi721_get_inb_message()
2486 if (++priv->imsg_ring[mbox].desc_rdptr == priv->imsg_ring[mbox].size) in tsi721_get_inb_message()
2487 priv->imsg_ring[mbox].desc_rdptr = 0; in tsi721_get_inb_message()
2489 iowrite32(priv->imsg_ring[mbox].desc_rdptr, in tsi721_get_inb_message()
2490 priv->regs + TSI721_IBDMAC_DQRP(ch)); in tsi721_get_inb_message()
2493 free_ptr = priv->imsg_ring[mbox].imfq_base; in tsi721_get_inb_message()
2494 free_ptr[priv->imsg_ring[mbox].fq_wrptr] = cpu_to_le64(rx_phys); in tsi721_get_inb_message()
2496 if (++priv->imsg_ring[mbox].fq_wrptr == priv->imsg_ring[mbox].size) in tsi721_get_inb_message()
2497 priv->imsg_ring[mbox].fq_wrptr = 0; in tsi721_get_inb_message()
2499 iowrite32(priv->imsg_ring[mbox].fq_wrptr, in tsi721_get_inb_message()
2500 priv->regs + TSI721_IBDMAC_FQWP(ch)); in tsi721_get_inb_message()
2506 * tsi721_messages_init - Initialization of Messaging Engine
2515 iowrite32(0, priv->regs + TSI721_SMSG_ECC_LOG); in tsi721_messages_init()
2516 iowrite32(0, priv->regs + TSI721_RETRY_GEN_CNT); in tsi721_messages_init()
2517 iowrite32(0, priv->regs + TSI721_RETRY_RX_CNT); in tsi721_messages_init()
2520 iowrite32(TSI721_RQRPTO_VAL, priv->regs + TSI721_RQRPTO); in tsi721_messages_init()
2526 priv->regs + TSI721_IBDMAC_INT(ch)); in tsi721_messages_init()
2528 iowrite32(0, priv->regs + TSI721_IBDMAC_STS(ch)); in tsi721_messages_init()
2531 priv->regs + TSI721_SMSG_ECC_COR_LOG(ch)); in tsi721_messages_init()
2533 priv->regs + TSI721_SMSG_ECC_NCOR(ch)); in tsi721_messages_init()
2540 * tsi721_query_mport - Fetch inbound message from the Tsi721 MSG Queue
2549 struct tsi721_device *priv = mport->priv; in tsi721_query_mport()
2552 rval = ioread32(priv->regs + 0x100 + RIO_PORT_N_ERR_STS_CSR(0, 0)); in tsi721_query_mport()
2554 rval = ioread32(priv->regs + 0x100 + RIO_PORT_N_CTL2_CSR(0, 0)); in tsi721_query_mport()
2555 attr->link_speed = (rval & RIO_PORT_N_CTL2_SEL_BAUD) >> 28; in tsi721_query_mport()
2556 rval = ioread32(priv->regs + 0x100 + RIO_PORT_N_CTL_CSR(0, 0)); in tsi721_query_mport()
2557 attr->link_width = (rval & RIO_PORT_N_CTL_IPW) >> 27; in tsi721_query_mport()
2559 attr->link_speed = RIO_LINK_DOWN; in tsi721_query_mport()
2562 attr->flags = RIO_MPORT_DMA | RIO_MPORT_DMA_SG; in tsi721_query_mport()
2563 attr->dma_max_sge = 0; in tsi721_query_mport()
2564 attr->dma_max_size = TSI721_BDMA_MAX_BCOUNT; in tsi721_query_mport()
2565 attr->dma_align = 0; in tsi721_query_mport()
2567 attr->flags = 0; in tsi721_query_mport()
2573 * tsi721_disable_ints - disables all device interrupts
2581 iowrite32(0, priv->regs + TSI721_DEV_INTE); in tsi721_disable_ints()
2584 iowrite32(0, priv->regs + TSI721_DEV_CHAN_INTE); in tsi721_disable_ints()
2588 iowrite32(0, priv->regs + TSI721_IBDMAC_INTE(ch)); in tsi721_disable_ints()
2590 /* Disable all Outbound Msg Channel interrupts */ in tsi721_disable_ints()
2592 iowrite32(0, priv->regs + TSI721_OBDMAC_INTE(ch)); in tsi721_disable_ints()
2595 iowrite32(0, priv->regs + TSI721_SMSG_INTE); in tsi721_disable_ints()
2600 priv->regs + TSI721_DMAC_BASE(ch) + TSI721_DMAC_INTE); in tsi721_disable_ints()
2603 iowrite32(0, priv->regs + TSI721_BDMA_INTE); in tsi721_disable_ints()
2607 iowrite32(0, priv->regs + TSI721_SR_CHINTE(ch)); in tsi721_disable_ints()
2610 iowrite32(0, priv->regs + TSI721_SR2PC_GEN_INTE); in tsi721_disable_ints()
2613 iowrite32(0, priv->regs + TSI721_PC2SR_INTE); in tsi721_disable_ints()
2616 iowrite32(0, priv->regs + TSI721_I2C_INT_ENABLE); in tsi721_disable_ints()
2619 iowrite32(0, priv->regs + TSI721_RIO_EM_INT_ENABLE); in tsi721_disable_ints()
2620 iowrite32(0, priv->regs + TSI721_RIO_EM_DEV_INT_EN); in tsi721_disable_ints()
2648 tsi_debug(EXIT, dev, "%s id=%d", mport->name, mport->id); in tsi721_mport_release()
2652 * tsi721_setup_mport - Setup Tsi721 as RapidIO subsystem master port
2659 struct pci_dev *pdev = priv->pdev; in tsi721_setup_mport()
2661 struct rio_mport *mport = &priv->mport; in tsi721_setup_mport()
2667 mport->ops = &tsi721_rio_ops; in tsi721_setup_mport()
2668 mport->index = 0; in tsi721_setup_mport()
2669 mport->sys_size = 0; /* small system */ in tsi721_setup_mport()
2670 mport->priv = (void *)priv; in tsi721_setup_mport()
2671 mport->phys_efptr = 0x100; in tsi721_setup_mport()
2672 mport->phys_rmap = 1; in tsi721_setup_mport()
2673 mport->dev.parent = &pdev->dev; in tsi721_setup_mport()
2674 mport->dev.release = tsi721_mport_release; in tsi721_setup_mport()
2676 INIT_LIST_HEAD(&mport->dbells); in tsi721_setup_mport()
2678 rio_init_dbell_res(&mport->riores[RIO_DOORBELL_RESOURCE], 0, 0xffff); in tsi721_setup_mport()
2679 rio_init_mbox_res(&mport->riores[RIO_INB_MBOX_RESOURCE], 0, 3); in tsi721_setup_mport()
2680 rio_init_mbox_res(&mport->riores[RIO_OUTB_MBOX_RESOURCE], 0, 3); in tsi721_setup_mport()
2681 snprintf(mport->name, RIO_MAX_MPORT_NAME, "%s(%s)", in tsi721_setup_mport()
2682 dev_driver_string(&pdev->dev), dev_name(&pdev->dev)); in tsi721_setup_mport()
2688 priv->flags |= TSI721_USING_MSIX; in tsi721_setup_mport()
2690 priv->flags |= TSI721_USING_MSI; in tsi721_setup_mport()
2692 tsi_debug(MPORT, &pdev->dev, in tsi721_setup_mport()
2693 "MSI/MSI-X is not available. Using legacy INTx."); in tsi721_setup_mport()
2699 tsi_err(&pdev->dev, "Unable to get PCI IRQ %02X (err=0x%x)", in tsi721_setup_mport()
2700 pdev->irq, err); in tsi721_setup_mport()
2710 iowrite32(ioread32(priv->regs + TSI721_DEVCTL) | in tsi721_setup_mport()
2712 priv->regs + TSI721_DEVCTL); in tsi721_setup_mport()
2714 if (mport->host_deviceid >= 0) in tsi721_setup_mport()
2717 priv->regs + (0x100 + RIO_PORT_GEN_CTL_CSR)); in tsi721_setup_mport()
2719 iowrite32(0, priv->regs + (0x100 + RIO_PORT_GEN_CTL_CSR)); in tsi721_setup_mport()
2742 err = -ENOMEM; in tsi721_probe()
2748 tsi_err(&pdev->dev, "Failed to enable PCI device"); in tsi721_probe()
2752 priv->pdev = pdev; in tsi721_probe()
2759 tsi_debug(INIT, &pdev->dev, "res%d %pR", in tsi721_probe()
2760 i, &pdev->resource[i]); in tsi721_probe()
2768 /* BAR_0 (registers) must be 512KB+ in 32-bit address space */ in tsi721_probe()
2772 tsi_err(&pdev->dev, "Missing or misconfigured CSR BAR0"); in tsi721_probe()
2773 err = -ENODEV; in tsi721_probe()
2777 /* BAR_1 (outbound doorbells) must be 16MB+ in 32-bit address space */ in tsi721_probe()
2781 tsi_err(&pdev->dev, "Missing or misconfigured Doorbell BAR1"); in tsi721_probe()
2782 err = -ENODEV; in tsi721_probe()
2787 * BAR_2 and BAR_4 (outbound translation) must be in 64-bit PCIe address in tsi721_probe()
2794 priv->p2r_bar[0].size = priv->p2r_bar[1].size = 0; in tsi721_probe()
2798 tsi_debug(INIT, &pdev->dev, in tsi721_probe()
2801 priv->p2r_bar[0].base = pci_resource_start(pdev, BAR_2); in tsi721_probe()
2802 priv->p2r_bar[0].size = pci_resource_len(pdev, BAR_2); in tsi721_probe()
2808 tsi_debug(INIT, &pdev->dev, in tsi721_probe()
2811 priv->p2r_bar[1].base = pci_resource_start(pdev, BAR_4); in tsi721_probe()
2812 priv->p2r_bar[1].size = pci_resource_len(pdev, BAR_4); in tsi721_probe()
2818 tsi_err(&pdev->dev, "Unable to obtain PCI resources"); in tsi721_probe()
2824 priv->regs = pci_ioremap_bar(pdev, BAR_0); in tsi721_probe()
2825 if (!priv->regs) { in tsi721_probe()
2826 tsi_err(&pdev->dev, "Unable to map device registers space"); in tsi721_probe()
2827 err = -ENOMEM; in tsi721_probe()
2831 priv->odb_base = pci_ioremap_bar(pdev, BAR_1); in tsi721_probe()
2832 if (!priv->odb_base) { in tsi721_probe()
2833 tsi_err(&pdev->dev, "Unable to map outbound doorbells space"); in tsi721_probe()
2834 err = -ENOMEM; in tsi721_probe()
2839 if (dma_set_mask(&pdev->dev, DMA_BIT_MASK(64))) { in tsi721_probe()
2840 err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32)); in tsi721_probe()
2842 tsi_err(&pdev->dev, "Unable to set DMA mask"); in tsi721_probe()
2846 if (dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32))) in tsi721_probe()
2847 tsi_info(&pdev->dev, "Unable to set consistent DMA mask"); in tsi721_probe()
2849 err = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64)); in tsi721_probe()
2851 tsi_info(&pdev->dev, "Unable to set consistent DMA mask"); in tsi721_probe()
2866 tsi_info(&pdev->dev, in tsi721_probe()
2870 /* Set PCIe completion timeout to 1-10ms */ in tsi721_probe()
2875 * FIXUP: correct offsets of MSI-X tables in the MSI-X Capability Block in tsi721_probe()
2891 tsi_err(&pdev->dev, "BDMA initialization failed"); in tsi721_probe()
2892 err = -ENOMEM; in tsi721_probe()
2921 if (priv->regs) in tsi721_probe()
2922 iounmap(priv->regs); in tsi721_probe()
2923 if (priv->odb_base) in tsi721_probe()
2924 iounmap(priv->odb_base); in tsi721_probe()
2939 tsi_debug(EXIT, &pdev->dev, "enter"); in tsi721_remove()
2943 flush_work(&priv->idb_work); in tsi721_remove()
2944 flush_work(&priv->pw_work); in tsi721_remove()
2945 rio_unregister_mport(&priv->mport); in tsi721_remove()
2953 if (priv->regs) in tsi721_remove()
2954 iounmap(priv->regs); in tsi721_remove()
2955 if (priv->odb_base) in tsi721_remove()
2956 iounmap(priv->odb_base); in tsi721_remove()
2958 if (priv->flags & TSI721_USING_MSIX) in tsi721_remove()
2959 pci_disable_msix(priv->pdev); in tsi721_remove()
2960 else if (priv->flags & TSI721_USING_MSI) in tsi721_remove()
2961 pci_disable_msi(priv->pdev); in tsi721_remove()
2967 tsi_debug(EXIT, &pdev->dev, "exit"); in tsi721_remove()
2974 tsi_debug(EXIT, &pdev->dev, "enter"); in tsi721_shutdown()
2998 MODULE_DESCRIPTION("IDT Tsi721 PCIExpress-to-SRIO bridge driver");