111 static inline u32 sppctl_get_reg_and_bit_offset(unsigned int offset, u32 *reg_off)  in sppctl_get_reg_and_bit_offset()  argument
116 	*reg_off = (offset / 32) * 4;  in sppctl_get_reg_and_bit_offset()
122 static inline u32 sppctl_get_moon_reg_and_bit_offset(unsigned int offset, u32 *reg_off)  in sppctl_get_moon_reg_and_bit_offset()  argument
132 	*reg_off = (offset / 16) * 4;  in sppctl_get_moon_reg_and_bit_offset()
138 static inline u32 sppctl_prep_moon_reg_and_offset(unsigned int offset, u32 *reg_off, int val)  in sppctl_prep_moon_reg_and_offset()  argument
142 	bit_off = sppctl_get_moon_reg_and_bit_offset(offset, reg_off);  in sppctl_prep_moon_reg_and_offset()
226 static void sppctl_gmx_set(struct sppctl_pdata *pctl, u8 reg_off, u8 bit_off, u8 bit_sz,  in sppctl_gmx_set()  argument
239 	writel(reg, pctl->moon1_base + reg_off * 4);  in sppctl_gmx_set()
263 	u32 reg_off, bit_off, reg;  in sppctl_first_get()  local
265 	bit_off = sppctl_get_reg_and_bit_offset(offset, &reg_off);  in sppctl_first_get()
266 	reg = sppctl_first_readl(spp_gchip, reg_off);  in sppctl_first_get()
298 	u32 reg_off, bit_off, reg;  in sppctl_master_get()  local
300 	bit_off = sppctl_get_moon_reg_and_bit_offset(offset, &reg_off);  in sppctl_master_get()
301 	reg = sppctl_gpio_master_readl(spp_gchip, reg_off);  in sppctl_master_get()
309 	u32 reg_off, bit_off, reg;  in sppctl_first_master_set()  local
314 		bit_off = sppctl_get_reg_and_bit_offset(offset, &reg_off);  in sppctl_first_master_set()
315 		reg = sppctl_first_readl(spp_gchip, reg_off);  in sppctl_first_master_set()
322 				sppctl_first_writel(spp_gchip, reg, reg_off);  in sppctl_first_master_set()
327 				sppctl_first_writel(spp_gchip, reg, reg_off);  in sppctl_first_master_set()
337 		reg = sppctl_prep_moon_reg_and_offset(offset, &reg_off, (master == mux_m_gpio));  in sppctl_first_master_set()
338 		sppctl_gpio_master_writel(spp_gchip, reg, reg_off);  in sppctl_first_master_set()
345 	u32 reg_off, reg;  in sppctl_gpio_input_inv_set()  local
347 	reg = sppctl_prep_moon_reg_and_offset(offset, &reg_off, 1);  in sppctl_gpio_input_inv_set()
348 	sppctl_gpio_iinv_writel(spp_gchip, reg, reg_off);  in sppctl_gpio_input_inv_set()
354 	u32 reg_off, reg;  in sppctl_gpio_output_inv_set()  local
356 	reg = sppctl_prep_moon_reg_and_offset(offset, &reg_off, 1);  in sppctl_gpio_output_inv_set()
357 	sppctl_gpio_oinv_writel(spp_gchip, reg, reg_off);  in sppctl_gpio_output_inv_set()
363 	u32 reg_off, bit_off, reg;  in sppctl_gpio_output_od_get()  local
365 	bit_off = sppctl_get_moon_reg_and_bit_offset(offset, &reg_off);  in sppctl_gpio_output_od_get()
366 	reg = sppctl_gpio_od_readl(spp_gchip, reg_off);  in sppctl_gpio_output_od_get()
375 	u32 reg_off, reg;  in sppctl_gpio_output_od_set()  local
377 	reg = sppctl_prep_moon_reg_and_offset(offset, &reg_off, val);  in sppctl_gpio_output_od_set()
378 	sppctl_gpio_od_writel(spp_gchip, reg, reg_off);  in sppctl_gpio_output_od_set()
384 	u32 reg_off, bit_off, reg;  in sppctl_gpio_get_direction()  local
386 	bit_off = sppctl_get_moon_reg_and_bit_offset(offset, &reg_off);  in sppctl_gpio_get_direction()
387 	reg = sppctl_gpio_oe_readl(spp_gchip, reg_off);  in sppctl_gpio_get_direction()
395 	u32 reg_off, bit_off, reg;  in sppctl_gpio_inv_get()  local
398 	bit_off = sppctl_get_moon_reg_and_bit_offset(offset, &reg_off);  in sppctl_gpio_inv_get()
403 		reg = sppctl_gpio_iinv_readl(spp_gchip, reg_off);  in sppctl_gpio_inv_get()
405 		reg = sppctl_gpio_oinv_readl(spp_gchip, reg_off);  in sppctl_gpio_inv_get()
416 	u32 reg_off, reg;  in sppctl_gpio_direction_input()  local
418 	reg = sppctl_prep_moon_reg_and_offset(offset, &reg_off, 0);  in sppctl_gpio_direction_input()
422 	sppctl_gpio_oe_writel(spp_gchip, reg, reg_off);  in sppctl_gpio_direction_input()
432 	u32 reg_off, reg;  in sppctl_gpio_direction_output()  local
434 	reg = sppctl_prep_moon_reg_and_offset(offset, &reg_off, 1);  in sppctl_gpio_direction_output()
438 	sppctl_gpio_oe_writel(spp_gchip, reg, reg_off);  in sppctl_gpio_direction_output()
445 	reg = sppctl_prep_moon_reg_and_offset(offset, &reg_off, val);  in sppctl_gpio_direction_output()
446 	sppctl_gpio_out_writel(spp_gchip, reg, reg_off);  in sppctl_gpio_direction_output()
455 	u32 reg_off, bit_off, reg;  in sppctl_gpio_get()  local
457 	bit_off = sppctl_get_reg_and_bit_offset(offset, &reg_off);  in sppctl_gpio_get()
458 	reg = sppctl_gpio_in_readl(spp_gchip, reg_off);  in sppctl_gpio_get()
466 	u32 reg_off, reg;  in sppctl_gpio_set()  local
468 	reg = sppctl_prep_moon_reg_and_offset(offset, &reg_off, val);  in sppctl_gpio_set()
469 	sppctl_gpio_out_writel(spp_gchip, reg, reg_off);  in sppctl_gpio_set()
477 	u32 reg_off, reg;  in sppctl_gpio_set_config()  local
481 		reg = sppctl_prep_moon_reg_and_offset(offset, &reg_off, 1);  in sppctl_gpio_set_config()
482 		sppctl_gpio_od_writel(spp_gchip, reg, reg_off);  in sppctl_gpio_set_config()