Lines Matching +full:pinctrl +full:- +full:pin +full:- +full:array

1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * pin-controller/pin-mux/pin-config/gpio-driver for Samsung's SoC's.
16 #include <linux/pinctrl/pinctrl.h>
17 #include <linux/pinctrl/pinmux.h>
18 #include <linux/pinctrl/pinconf.h>
19 #include <linux/pinctrl/consumer.h>
20 #include <linux/pinctrl/machine.h>
25 * enum pincfg_type - possible pin configuration types supported.
27 * @PINCFG_TYPE_DAT: Pin value configuration.
30 * @PINCFG_TYPE_CON_PDN: Pin function in power down mode.
45 * pin configuration (pull up/down and drive strength) type and its value are
46 * packed together into a 16-bits. The upper 8-bits represent the configuration
47 * type and the lower 8-bits hold the value of the configuration type.
57 * Values for the pin CON register, choosing pin function.
65 * enum eint_type - possible external interrupt types.
72 * in a pin bank can support external gpio interrupts or external wakeup
85 /* maximum length of a pin in pin descriptor (example: "gpa0-0") */
106 * struct samsung_pin_bank_type: pin bank type description
116 * struct samsung_pin_bank_data: represent a controller pin-bank (init data).
118 * @pctl_offset: starting offset of the pin-bank registers.
119 * @pctl_res_idx: index of base address for pin-bank registers.
121 * @eint_func: function to set in CON register to configure pin as EINT.
124 * @eint_offset: SoC-specific EINT register or interrupt offset of bank.
125 * @name: name to be prefixed for each pin in this pin bank.
140 * struct samsung_pin_bank: represent a controller pin-bank.
142 * @pctl_base: base address of the pin-bank registers
143 * @pctl_offset: starting offset of the pin-bank registers.
145 * @eint_base: base address of the pin-bank EINT registers.
146 * @eint_func: function to set in CON register to configure pin as EINT.
149 * @eint_offset: SoC-specific EINT register or interrupt offset of bank.
150 * @name: name to be prefixed for each pin in this pin bank.
151 * @pin_base: starting pin number of the bank.
152 * @soc_priv: per-bank private data for SoC-specific code.
157 * @grange: linux gpio pin range supported by this bank.
188 * struct samsung_retention_data: runtime pin-bank retention control data.
189 * @regs: array of PMU registers to control pad retention.
190 * @nr_regs: number of registers in @regs array.
208 * struct samsung_retention_data: represent a pin-bank retention control data.
209 * @regs: array of PMU registers to control pad retention.
210 * @nr_regs: number of registers in @regs array.
225 * struct samsung_pin_ctrl: represent a pin controller.
226 * @pin_banks: list of pin banks included in this controller.
227 * @nr_banks: number of pin banks.
228 * @nr_ext_resources: number of the extra base address for pin banks.
234 * @suspend: platform specific suspend callback, executed during pin controller
236 * @resume: platform specific resume callback, executed during pin controller
258 * to each bank samsung_pin_bank->pctl_base and used on legacy
263 * @ctrl: pin controller instance managed by the driver.
264 * @pctl: pin controller descriptor registered with the pinctrl subsystem.
265 * @pctl_dev: cookie representing pinctrl device instance.
266 * @pin_groups: list of pin groups available to the driver.
267 * @nr_groups: number of such pin groups.
268 * @pmx_functions: list of pin functions available to the driver.
269 * @nr_function: number of such pin functions.
270 * @pin_base: starting system wide pin number.
273 * @suspend: platform specific suspend callback, executed during pin controller
275 * @resume: platform specific resume callback, executed during pin controller
305 * @ctrl: array of pin controller data.
306 * @num_ctrl: size of array @ctrl.
315 * @name: name of the pin group, used to lookup the group.
328 * struct samsung_pmx_func: represent a pin function.
329 * @name: name of the pin function, used to lookup the function.
330 * @groups: one or more names of pin groups that provide this function.