Lines Matching refs:eint_offset
55 unsigned long reg_mask = our_chip->eint_mask + bank->eint_offset; in exynos_irq_mask()
73 unsigned long reg_pend = our_chip->eint_pend + bank->eint_offset; in exynos_irq_ack()
83 unsigned long reg_mask = our_chip->eint_mask + bank->eint_offset; in exynos_irq_unmask()
114 unsigned long reg_con = our_chip->eint_con + bank->eint_offset; in exynos_irq_set_type()
343 unsigned long bit = 1UL << (2 * bank->eint_offset + irqd->hwirq); in exynos_wkup_irq_set_wake()
514 + b->eint_offset); in exynos_irq_demux_eint16_31()
516 + b->eint_offset); in exynos_irq_demux_eint16_31()
644 + bank->eint_offset); in exynos_pinctrl_suspend_bank()
646 + 2 * bank->eint_offset); in exynos_pinctrl_suspend_bank()
648 + 2 * bank->eint_offset + 4); in exynos_pinctrl_suspend_bank()
650 + bank->eint_offset); in exynos_pinctrl_suspend_bank()
686 + bank->eint_offset), save->eint_con); in exynos_pinctrl_resume_bank()
689 + 2 * bank->eint_offset), save->eint_fltcon0); in exynos_pinctrl_resume_bank()
692 + 2 * bank->eint_offset + 4), save->eint_fltcon1); in exynos_pinctrl_resume_bank()
695 + bank->eint_offset), save->eint_mask); in exynos_pinctrl_resume_bank()
698 + bank->eint_offset); in exynos_pinctrl_resume_bank()
700 + 2 * bank->eint_offset); in exynos_pinctrl_resume_bank()
702 + 2 * bank->eint_offset + 4); in exynos_pinctrl_resume_bank()
704 + bank->eint_offset); in exynos_pinctrl_resume_bank()