Lines Matching +full:exynos5410 +full:- +full:clock
1 // SPDX-License-Identifier: GPL-2.0+
20 #include <linux/soc/samsung/exynos-regs-pmu.h>
22 #include "pinctrl-samsung.h"
23 #include "pinctrl-exynos.h"
35 /* Retention control for S5PV210 are located at the end of clock controller */
45 void __iomem *clk_base = (void __iomem *)drvdata->retention_ctrl->priv; in s5pv210_retention_disable()
62 ctrl = devm_kzalloc(drvdata->dev, sizeof(*ctrl), GFP_KERNEL); in s5pv210_retention_init()
64 return ERR_PTR(-ENOMEM); in s5pv210_retention_init()
66 np = of_find_compatible_node(NULL, NULL, "samsung,s5pv210-clock"); in s5pv210_retention_init()
68 pr_err("%s: failed to find clock controller DT node\n", in s5pv210_retention_init()
70 return ERR_PTR(-ENODEV); in s5pv210_retention_init()
76 pr_err("%s: failed to map clock registers\n", __func__); in s5pv210_retention_init()
77 return ERR_PTR(-EINVAL); in s5pv210_retention_init()
80 ctrl->priv = (void __force *)clk_base; in s5pv210_retention_init()
81 ctrl->disable = s5pv210_retention_disable; in s5pv210_retention_init()
90 /* pin banks of s5pv210 pin-controller */
131 /* pin-controller instance 0 data */
150 /* pin banks of exynos3250 pin-controller 0 */
162 /* pin banks of exynos3250 pin-controller 1 */
209 * two gpio/pin-mux/pinconfig controllers.
213 /* pin-controller instance 0 data */
221 /* pin-controller instance 1 data */
237 /* pin banks of exynos4210 pin-controller 0 */
258 /* pin banks of exynos4210 pin-controller 1 */
283 /* pin banks of exynos4210 pin-controller 2 */
321 * three gpio/pin-mux/pinconfig controllers.
325 /* pin-controller instance 0 data */
333 /* pin-controller instance 1 data */
342 /* pin-controller instance 2 data */
354 /* pin banks of exynos4x12 pin-controller 0 */
372 /* pin banks of exynos4x12 pin-controller 1 */
400 /* pin banks of exynos4x12 pin-controller 2 */
406 /* pin banks of exynos4x12 pin-controller 3 */
418 * four gpio/pin-mux/pinconfig controllers.
422 /* pin-controller instance 0 data */
430 /* pin-controller instance 1 data */
439 /* pin-controller instance 2 data */
447 /* pin-controller instance 3 data */
461 /* pin banks of exynos5250 pin-controller 0 */
491 /* pin banks of exynos5250 pin-controller 1 */
505 /* pin banks of exynos5250 pin-controller 2 */
515 /* pin banks of exynos5250 pin-controller 3 */
523 * four gpio/pin-mux/pinconfig controllers.
527 /* pin-controller instance 0 data */
536 /* pin-controller instance 1 data */
544 /* pin-controller instance 2 data */
551 /* pin-controller instance 3 data */
566 /* pin banks of exynos5260 pin-controller 0 */
592 /* pin banks of exynos5260 pin-controller 1 */
602 /* pin banks of exynos5260 pin-controller 2 */
611 * three gpio/pin-mux/pinconfig controllers.
615 /* pin-controller instance 0 data */
623 /* pin-controller instance 1 data */
630 /* pin-controller instance 2 data */
644 /* pin banks of exynos5410 pin-controller 0 */
684 /* pin banks of exynos5410 pin-controller 1 */
698 /* pin banks of exynos5410 pin-controller 2 */
708 /* pin banks of exynos5410 pin-controller 3 */
715 * Samsung pinctrl driver data for Exynos5410 SoC. Exynos5410 SoC includes
716 * four gpio/pin-mux/pinconfig controllers.
720 /* pin-controller instance 0 data */
728 /* pin-controller instance 1 data */
735 /* pin-controller instance 2 data */
742 /* pin-controller instance 3 data */
756 /* pin banks of exynos5420 pin-controller 0 */
766 /* pin banks of exynos5420 pin-controller 1 */
784 /* pin banks of exynos5420 pin-controller 2 */
797 /* pin banks of exynos5420 pin-controller 3 */
811 /* pin banks of exynos5420 pin-controller 4 */
843 * four gpio/pin-mux/pinconfig controllers.
847 /* pin-controller instance 0 data */
856 /* pin-controller instance 1 data */
864 /* pin-controller instance 2 data */
872 /* pin-controller instance 3 data */
880 /* pin-controller instance 4 data */