436 		struct miphy28lp_pll_gen *gen = &sata_pll_gen[i];  in miphy28lp_sata_config_gen()  local
439 		writeb_relaxed(gen->bank, base + MIPHY_CONF);  in miphy28lp_sata_config_gen()
440 		writeb_relaxed(gen->speed, base + MIPHY_SPEED);  in miphy28lp_sata_config_gen()
441 		writeb_relaxed(gen->bias_boost_1, base + MIPHY_BIAS_BOOST_1);  in miphy28lp_sata_config_gen()
442 		writeb_relaxed(gen->bias_boost_2, base + MIPHY_BIAS_BOOST_2);  in miphy28lp_sata_config_gen()
445 		writeb_relaxed(gen->tx_ctrl_2, base + MIPHY_TX_CTRL_2);  in miphy28lp_sata_config_gen()
446 		writeb_relaxed(gen->tx_ctrl_3, base + MIPHY_TX_CTRL_3);  in miphy28lp_sata_config_gen()
449 		writeb_relaxed(gen->rx_buff_ctrl, base + MIPHY_RX_BUFFER_CTRL);  in miphy28lp_sata_config_gen()
450 		writeb_relaxed(gen->rx_vga_gain, base + MIPHY_RX_VGA_GAIN);  in miphy28lp_sata_config_gen()
451 		writeb_relaxed(gen->rx_equ_gain_1, base + MIPHY_RX_EQU_GAIN_1);  in miphy28lp_sata_config_gen()
452 		writeb_relaxed(gen->rx_equ_gain_2, base + MIPHY_RX_EQU_GAIN_2);  in miphy28lp_sata_config_gen()
453 		writeb_relaxed(gen->rx_equ_gain_3, base + MIPHY_RX_EQU_GAIN_3);  in miphy28lp_sata_config_gen()
463 		struct miphy28lp_pll_gen *gen = &pcie_pll_gen[i];  in miphy28lp_pcie_config_gen()  local
466 		writeb_relaxed(gen->bank, base + MIPHY_CONF);  in miphy28lp_pcie_config_gen()
467 		writeb_relaxed(gen->speed, base + MIPHY_SPEED);  in miphy28lp_pcie_config_gen()
468 		writeb_relaxed(gen->bias_boost_1, base + MIPHY_BIAS_BOOST_1);  in miphy28lp_pcie_config_gen()
469 		writeb_relaxed(gen->bias_boost_2, base + MIPHY_BIAS_BOOST_2);  in miphy28lp_pcie_config_gen()
472 		writeb_relaxed(gen->tx_ctrl_1, base + MIPHY_TX_CTRL_1);  in miphy28lp_pcie_config_gen()
473 		writeb_relaxed(gen->tx_ctrl_2, base + MIPHY_TX_CTRL_2);  in miphy28lp_pcie_config_gen()
474 		writeb_relaxed(gen->tx_ctrl_3, base + MIPHY_TX_CTRL_3);  in miphy28lp_pcie_config_gen()
476 		writeb_relaxed(gen->rx_k_gain, base + MIPHY_RX_K_GAIN);  in miphy28lp_pcie_config_gen()
479 		writeb_relaxed(gen->rx_buff_ctrl, base + MIPHY_RX_BUFFER_CTRL);  in miphy28lp_pcie_config_gen()
480 		writeb_relaxed(gen->rx_vga_gain, base + MIPHY_RX_VGA_GAIN);  in miphy28lp_pcie_config_gen()
481 		writeb_relaxed(gen->rx_equ_gain_1, base + MIPHY_RX_EQU_GAIN_1);  in miphy28lp_pcie_config_gen()
482 		writeb_relaxed(gen->rx_equ_gain_2, base + MIPHY_RX_EQU_GAIN_2);  in miphy28lp_pcie_config_gen()