Lines Matching refs:drv_data

137 	const struct dphy_drv_data *drv_data;  member
145 const struct dphy_drv_data *drv_data = priv->drv_data; in write_grf_reg() local
146 const struct dphy_reg *reg = &drv_data->grf_regs[index]; in write_grf_reg()
179 const struct dphy_drv_data *drv_data = priv->drv_data; in rockchip_inno_csidphy_ths_settle() local
182 val = readl(priv->phy_base + drv_data->ths_settle_offset + offset); in rockchip_inno_csidphy_ths_settle()
185 writel(val, priv->phy_base + drv_data->ths_settle_offset + offset); in rockchip_inno_csidphy_ths_settle()
192 const struct dphy_drv_data *drv_data = priv->drv_data; in rockchip_inno_csidphy_configure() local
208 for (i = 0; i < drv_data->num_hsfreq_ranges; i++) { in rockchip_inno_csidphy_configure()
209 if (drv_data->hsfreq_ranges[i].range_h >= data_rate_mbps) { in rockchip_inno_csidphy_configure()
210 hsfreq = drv_data->hsfreq_ranges[i].cfg_bit; in rockchip_inno_csidphy_configure()
225 const struct dphy_drv_data *drv_data = priv->drv_data; in rockchip_inno_csidphy_power_on() local
241 if (drv_data->pwrctl_offset >= 0) in rockchip_inno_csidphy_power_on()
244 priv->phy_base + drv_data->pwrctl_offset); in rockchip_inno_csidphy_power_on()
253 if (drv_data->pwrctl_offset >= 0) in rockchip_inno_csidphy_power_on()
255 priv->phy_base + drv_data->pwrctl_offset); in rockchip_inno_csidphy_power_on()
268 if (data_rate_mbps > 1500 && drv_data->calib_offset >= 0) { in rockchip_inno_csidphy_power_on()
270 priv->phy_base + drv_data->calib_offset + in rockchip_inno_csidphy_power_on()
274 priv->phy_base + drv_data->calib_offset + in rockchip_inno_csidphy_power_on()
294 const struct dphy_drv_data *drv_data = priv->drv_data; in rockchip_inno_csidphy_power_off() local
301 if (drv_data->pwrctl_offset >= 0) in rockchip_inno_csidphy_power_off()
305 priv->phy_base + drv_data->pwrctl_offset); in rockchip_inno_csidphy_power_off()
414 priv->drv_data = of_device_get_match_data(dev); in rockchip_inno_csidphy_probe()
415 if (!priv->drv_data) { in rockchip_inno_csidphy_probe()