1397 	void __iomem *dp_tx2;  member
2005 	writel(voltage_swing_cfg, qmp->dp_tx2 + cfg->regs[QPHY_TX_TX_DRV_LVL]);  in qmp_combo_configure_dp_swing()
2006 	writel(pre_emphasis_cfg, qmp->dp_tx2 + cfg->regs[QPHY_TX_TX_EMP_POST1_LVL]);  in qmp_combo_configure_dp_swing()
2029 	writel(drvr_en, qmp->dp_tx2 + QSERDES_V3_TX_HIGHZ_DRVR_EN);  in qmp_v3_configure_dp_tx()
2030 	writel(bias_en, qmp->dp_tx2 + QSERDES_V3_TX_TRANSCEIVER_BIAS_EN);  in qmp_v3_configure_dp_tx()
2195 	writel(0x27, qmp->dp_tx2 + cfg->regs[QPHY_TX_TX_DRV_LVL]);  in qmp_v4_configure_dp_tx()
2198 	writel(0x20, qmp->dp_tx2 + cfg->regs[QPHY_TX_TX_EMP_POST1_LVL]);  in qmp_v4_configure_dp_tx()
2307 	writel(drvr1_en, qmp->dp_tx2 + cfg->regs[QPHY_TX_HIGHZ_DRVR_EN]);  in qmp_v4_configure_dp_phy()
2308 	writel(bias1_en, qmp->dp_tx2 + cfg->regs[QPHY_TX_TRANSCEIVER_BIAS_EN]);  in qmp_v4_configure_dp_phy()
2322 	writel(0x0a, qmp->dp_tx2 + cfg->regs[QPHY_TX_TX_POL_INV]);  in qmp_v4_configure_dp_phy()
2325 	writel(0x27, qmp->dp_tx2 + cfg->regs[QPHY_TX_TX_DRV_LVL]);  in qmp_v4_configure_dp_phy()
2328 	writel(0x20, qmp->dp_tx2 + cfg->regs[QPHY_TX_TX_EMP_POST1_LVL]);  in qmp_v4_configure_dp_phy()
2514 	void __iomem *tx2 = qmp->dp_tx2;  in qmp_combo_dp_power_on()
3252 	qmp->dp_tx2 = devm_of_iomap(dev, np, 3, NULL);  in qmp_combo_parse_dt_lecacy_dp()
3253 	if (IS_ERR(qmp->dp_tx2))  in qmp_combo_parse_dt_lecacy_dp()
3254 		return PTR_ERR(qmp->dp_tx2);  in qmp_combo_parse_dt_lecacy_dp()
3372 		qmp->dp_tx2 = base + offs->dp_txb;  in qmp_combo_parse_dt()
3375 		qmp->dp_tx2 = base + offs->txb;  in qmp_combo_parse_dt()