296 	void __iomem *com;  member
381 	void __iomem *com = u2_banks->com;  in u2_phy_params_show()  local
393 		tmp = readl(com + U3P_USBPHYACR1);  in u2_phy_params_show()
399 		tmp = readl(com + U3P_USBPHYACR1);  in u2_phy_params_show()
414 		tmp = readl(com + U3P_USBPHYACR1);  in u2_phy_params_show()
420 		tmp = readl(com + U3P_USBPHYACR6);  in u2_phy_params_show()
426 		tmp = readl(com + U3P_USBPHYACR6);  in u2_phy_params_show()
453 	void __iomem *com = u2_banks->com;  in u2_phy_params_write()  local
468 		mtk_phy_update_field(com + U3P_USBPHYACR1, PA1_RG_VRT_SEL, val);  in u2_phy_params_write()
472 		mtk_phy_update_field(com + U3P_USBPHYACR1, PA1_RG_TERM_SEL, val);  in u2_phy_params_write()
482 		mtk_phy_update_field(com + U3P_USBPHYACR1, PA1_RG_INTR_CAL, val);  in u2_phy_params_write()
486 		mtk_phy_update_field(com + U3P_USBPHYACR6, PA6_RG_U2_DISCTH, val);  in u2_phy_params_write()
490 		mtk_phy_update_field(com + U3P_USBPHYACR6, PA6_RG_U2_PRE_EMP, val);  in u2_phy_params_write()
699 	void __iomem *com = u2_banks->com;  in hs_slew_rate_calibrate()  local
713 	mtk_phy_set_bits(com + U3P_USBPHYACR5, PA5_RG_U2_HSTX_SRCAL_EN);  in hs_slew_rate_calibrate()
757 	mtk_phy_update_field(com + U3P_USBPHYACR5, PA5_RG_U2_HSTX_SRCTRL,  in hs_slew_rate_calibrate()
761 	mtk_phy_clear_bits(com + U3P_USBPHYACR5, PA5_RG_U2_HSTX_SRCAL_EN);  in hs_slew_rate_calibrate()
800 	void __iomem *com = u2_banks->com;  in u2_phy_pll_26m_set()  local
805 	mtk_phy_update_field(com + U3P_USBPHYACR0, PA0_USB20_PLL_PREDIV, 0);  in u2_phy_pll_26m_set()
807 	mtk_phy_update_field(com + U3P_USBPHYACR2, PA2_RG_U2PLL_BW, 3);  in u2_phy_pll_26m_set()
809 	writel(P2R_RG_U2PLL_FBDIV_26M, com + U3P_U2PHYA_RESV);  in u2_phy_pll_26m_set()
811 	mtk_phy_set_bits(com + U3P_U2PHYA_RESV1,  in u2_phy_pll_26m_set()
819 	void __iomem *com = u2_banks->com;  in u2_phy_instance_init()  local
823 	mtk_phy_clear_bits(com + U3P_U2PHYDTM0, P2C_FORCE_UART_EN | P2C_FORCE_SUSPENDM);  in u2_phy_instance_init()
825 	mtk_phy_clear_bits(com + U3P_U2PHYDTM0,  in u2_phy_instance_init()
828 	mtk_phy_clear_bits(com + U3P_U2PHYDTM1, P2C_RG_UART_EN);  in u2_phy_instance_init()
830 	mtk_phy_set_bits(com + U3P_USBPHYACR0, PA0_RG_USB20_INTR_EN);  in u2_phy_instance_init()
833 	mtk_phy_clear_bits(com + U3P_USBPHYACR5, PA5_RG_U2_HS_100U_U3_EN);  in u2_phy_instance_init()
835 	mtk_phy_clear_bits(com + U3P_U2PHYACR4, P2C_U2_GPIO_CTR_MSK);  in u2_phy_instance_init()
839 			mtk_phy_set_bits(com + U3P_USBPHYACR2, PA2_RG_SIF_U2PLL_FORCE_EN);  in u2_phy_instance_init()
841 			mtk_phy_clear_bits(com + U3D_U2PHYDCR0, P2C_RG_SIF_U2PLL_FORCE_ON);  in u2_phy_instance_init()
843 			mtk_phy_set_bits(com + U3D_U2PHYDCR0, P2C_RG_SIF_U2PLL_FORCE_ON);  in u2_phy_instance_init()
845 			mtk_phy_set_bits(com + U3P_U2PHYDTM0,  in u2_phy_instance_init()
851 	mtk_phy_clear_bits(com + U3P_USBPHYACR6, PA6_RG_U2_BC11_SW_EN);  in u2_phy_instance_init()
853 	mtk_phy_update_field(com + U3P_USBPHYACR6, PA6_RG_U2_SQTH, 2);  in u2_phy_instance_init()
865 	void __iomem *com = u2_banks->com;  in u2_phy_instance_power_on()  local
869 	mtk_phy_set_bits(com + U3P_USBPHYACR6, PA6_RG_U2_OTG_VBUSCMP_EN);  in u2_phy_instance_power_on()
871 	mtk_phy_set_bits(com + U3P_U2PHYDTM1, P2C_RG_VBUSVALID | P2C_RG_AVALID);  in u2_phy_instance_power_on()
873 	mtk_phy_clear_bits(com + U3P_U2PHYDTM1, P2C_RG_SESSEND);  in u2_phy_instance_power_on()
876 		mtk_phy_set_bits(com + U3D_U2PHYDCR0, P2C_RG_SIF_U2PLL_FORCE_ON);  in u2_phy_instance_power_on()
878 		mtk_phy_set_bits(com + U3P_U2PHYDTM0, P2C_RG_SUSPENDM | P2C_FORCE_SUSPENDM);  in u2_phy_instance_power_on()
887 	void __iomem *com = u2_banks->com;  in u2_phy_instance_power_off()  local
891 	mtk_phy_clear_bits(com + U3P_USBPHYACR6, PA6_RG_U2_OTG_VBUSCMP_EN);  in u2_phy_instance_power_off()
893 	mtk_phy_clear_bits(com + U3P_U2PHYDTM1, P2C_RG_VBUSVALID | P2C_RG_AVALID);  in u2_phy_instance_power_off()
895 	mtk_phy_set_bits(com + U3P_U2PHYDTM1, P2C_RG_SESSEND);  in u2_phy_instance_power_off()
898 		mtk_phy_clear_bits(com + U3P_U2PHYDTM0, P2C_RG_SUSPENDM | P2C_FORCE_SUSPENDM);  in u2_phy_instance_power_off()
900 		mtk_phy_clear_bits(com + U3D_U2PHYDCR0, P2C_RG_SIF_U2PLL_FORCE_ON);  in u2_phy_instance_power_off()
910 	void __iomem *com = u2_banks->com;  in u2_phy_instance_exit()  local
914 		mtk_phy_clear_bits(com + U3D_U2PHYDCR0, P2C_RG_SIF_U2PLL_FORCE_ON);  in u2_phy_instance_exit()
916 		mtk_phy_clear_bits(com + U3P_U2PHYDTM0, P2C_FORCE_SUSPENDM);  in u2_phy_instance_exit()
927 	tmp = readl(u2_banks->com + U3P_U2PHYDTM1);  in u2_phy_instance_set_mode()
942 	writel(tmp, u2_banks->com + U3P_U2PHYDTM1);  in u2_phy_instance_set_mode()
1075 		u2_banks->com = instance->port_base + SSUSB_SIFSLV_V1_U2PHY_COM;  in phy_v1_banks_init()
1103 		u2_banks->com = instance->port_base + SSUSB_SIFSLV_V2_U2PHY_COM;  in phy_v2_banks_init()
1150 	void __iomem *com = u2_banks->com;  in u2_phy_props_set()  local
1153 		mtk_phy_set_bits(com + U3P_U2PHYBC12C, P2C_RG_CHGDT_EN);  in u2_phy_props_set()
1156 		mtk_phy_update_field(com + U3P_USBPHYACR5, PA5_RG_U2_HSTX_SRCTRL,  in u2_phy_props_set()
1160 		mtk_phy_update_field(com + U3P_USBPHYACR1, PA1_RG_VRT_SEL,  in u2_phy_props_set()
1164 		mtk_phy_update_field(com + U3P_USBPHYACR1, PA1_RG_TERM_SEL,  in u2_phy_props_set()
1172 		mtk_phy_update_field(com + U3P_USBPHYACR1, PA1_RG_INTR_CAL,  in u2_phy_props_set()
1177 		mtk_phy_update_field(com + U3P_USBPHYACR6, PA6_RG_U2_DISCTH,  in u2_phy_props_set()
1181 		mtk_phy_update_field(com + U3P_USBPHYACR6, PA6_RG_U2_PRE_EMP,  in u2_phy_props_set()
1331 		mtk_phy_update_field(u2_banks->com + U3P_USBPHYACR1, PA1_RG_INTR_CAL,  in phy_efuse_set()