3  * Enable PCIe link L0s/L1 state and Clock Power Management
46 	struct pci_dev *pdev;		/* Upstream component of the Link */
48 	struct pcie_link_state *root;	/* pointer to the root port link */
49 	struct pcie_link_state *parent;	/* pointer to the parent Link state */
107 static int policy_to_aspm_state(struct pcie_link_state *link)  in policy_to_aspm_state()  argument
120 		return link->aspm_default;  in policy_to_aspm_state()
125 static int policy_to_clkpm_state(struct pcie_link_state *link)  in policy_to_clkpm_state()  argument
136 		return link->clkpm_default;  in policy_to_clkpm_state()
141 static void pcie_set_clkpm_nocheck(struct pcie_link_state *link, int enable)  in pcie_set_clkpm_nocheck()  argument
144 	struct pci_bus *linkbus = link->pdev->subordinate;  in pcie_set_clkpm_nocheck()
151 	link->clkpm_enabled = !!enable;  in pcie_set_clkpm_nocheck()
154 static void pcie_set_clkpm(struct pcie_link_state *link, int enable)  in pcie_set_clkpm()  argument
157 	 * Don't enable Clock PM if the link is not Clock PM capable  in pcie_set_clkpm()
160 	if (!link->clkpm_capable || link->clkpm_disable)  in pcie_set_clkpm()
163 	if (link->clkpm_enabled == enable)  in pcie_set_clkpm()
165 	pcie_set_clkpm_nocheck(link, enable);  in pcie_set_clkpm()
168 static void pcie_clkpm_cap_init(struct pcie_link_state *link, int blacklist)  in pcie_clkpm_cap_init()  argument
174 	struct pci_bus *linkbus = link->pdev->subordinate;  in pcie_clkpm_cap_init()
188 	link->clkpm_enabled = enabled;  in pcie_clkpm_cap_init()
189 	link->clkpm_default = enabled;  in pcie_clkpm_cap_init()
190 	link->clkpm_capable = capable;  in pcie_clkpm_cap_init()
191 	link->clkpm_disable = blacklist ? 1 : 0;  in pcie_clkpm_cap_init()
195  * pcie_aspm_configure_common_clock: check if the 2 ends of a link
199 static void pcie_aspm_configure_common_clock(struct pcie_link_state *link)  in pcie_aspm_configure_common_clock()  argument
203 	struct pci_dev *child, *parent = link->pdev;  in pcie_aspm_configure_common_clock()
254 	if (pcie_retrain_link(link->pdev, true)) {  in pcie_aspm_configure_common_clock()
364 	struct pcie_link_state *link;  in pcie_aspm_check_latency()  local
371 	link = endpoint->bus->self->link_state;  in pcie_aspm_check_latency()
381 	while (link) {  in pcie_aspm_check_latency()
382 		struct pci_dev *dev = pci_function_0(link->pdev->subordinate);  in pcie_aspm_check_latency()
385 		pcie_capability_read_dword(link->pdev, PCI_EXP_LNKCAP,  in pcie_aspm_check_latency()
395 		if ((link->aspm_capable & ASPM_STATE_L0S_UP) &&  in pcie_aspm_check_latency()
397 			link->aspm_capable &= ~ASPM_STATE_L0S_UP;  in pcie_aspm_check_latency()
400 		if ((link->aspm_capable & ASPM_STATE_L0S_DW) &&  in pcie_aspm_check_latency()
402 			link->aspm_capable &= ~ASPM_STATE_L0S_DW;  in pcie_aspm_check_latency()
417 		if ((link->aspm_capable & ASPM_STATE_L1) &&  in pcie_aspm_check_latency()
419 			link->aspm_capable &= ~ASPM_STATE_L1;  in pcie_aspm_check_latency()
422 		link = link->parent;  in pcie_aspm_check_latency()
438 static void aspm_calc_l12_info(struct pcie_link_state *link,  in aspm_calc_l12_info()  argument
441 	struct pci_dev *child = link->downstream, *parent = link->pdev;  in aspm_calc_l12_info()
470 	 * Link from L0 to L1.2 and back to L0 so we enter L1.2 only if  in aspm_calc_l12_info()
527 static void aspm_l1ss_init(struct pcie_link_state *link)  in aspm_l1ss_init()  argument
529 	struct pci_dev *child = link->downstream, *parent = link->pdev;  in aspm_l1ss_init()
556 		link->aspm_support |= ASPM_STATE_L1_1;  in aspm_l1ss_init()
558 		link->aspm_support |= ASPM_STATE_L1_2;  in aspm_l1ss_init()
560 		link->aspm_support |= ASPM_STATE_L1_1_PCIPM;  in aspm_l1ss_init()
562 		link->aspm_support |= ASPM_STATE_L1_2_PCIPM;  in aspm_l1ss_init()
572 		link->aspm_enabled |= ASPM_STATE_L1_1;  in aspm_l1ss_init()
574 		link->aspm_enabled |= ASPM_STATE_L1_2;  in aspm_l1ss_init()
576 		link->aspm_enabled |= ASPM_STATE_L1_1_PCIPM;  in aspm_l1ss_init()
578 		link->aspm_enabled |= ASPM_STATE_L1_2_PCIPM;  in aspm_l1ss_init()
580 	if (link->aspm_support & ASPM_STATE_L1_2_MASK)  in aspm_l1ss_init()
581 		aspm_calc_l12_info(link, parent_l1ss_cap, child_l1ss_cap);  in aspm_l1ss_init()
584 static void pcie_aspm_cap_init(struct pcie_link_state *link, int blacklist)  in pcie_aspm_cap_init()  argument
586 	struct pci_dev *child = link->downstream, *parent = link->pdev;  in pcie_aspm_cap_init()
593 		link->aspm_enabled = ASPM_STATE_ALL;  in pcie_aspm_cap_init()
594 		link->aspm_disable = ASPM_STATE_ALL;  in pcie_aspm_cap_init()
599 	 * If ASPM not supported, don't mess with the clocks and link,  in pcie_aspm_cap_init()
608 	pcie_aspm_configure_common_clock(link);  in pcie_aspm_cap_init()
613 	 * read-only Link Capabilities may change depending on common clock  in pcie_aspm_cap_init()
625 	 * given link unless components on both sides of the link each  in pcie_aspm_cap_init()
629 		link->aspm_support |= ASPM_STATE_L0S;  in pcie_aspm_cap_init()
632 		link->aspm_enabled |= ASPM_STATE_L0S_UP;  in pcie_aspm_cap_init()
634 		link->aspm_enabled |= ASPM_STATE_L0S_DW;  in pcie_aspm_cap_init()
638 		link->aspm_support |= ASPM_STATE_L1;  in pcie_aspm_cap_init()
641 		link->aspm_enabled |= ASPM_STATE_L1;  in pcie_aspm_cap_init()
643 	aspm_l1ss_init(link);  in pcie_aspm_cap_init()
646 	link->aspm_default = link->aspm_enabled;  in pcie_aspm_cap_init()
649 	link->aspm_capable = link->aspm_support;  in pcie_aspm_cap_init()
662 static void pcie_config_aspm_l1ss(struct pcie_link_state *link, u32 state)  in pcie_config_aspm_l1ss()  argument
665 	struct pci_dev *child = link->downstream, *parent = link->pdev;  in pcie_config_aspm_l1ss()
667 	enable_req = (link->aspm_enabled ^ state) & state;  in pcie_config_aspm_l1ss()
721 static void pcie_config_aspm_link(struct pcie_link_state *link, u32 state)  in pcie_config_aspm_link()  argument
724 	struct pci_dev *child = link->downstream, *parent = link->pdev;  in pcie_config_aspm_link()
728 	state &= (link->aspm_capable & ~link->aspm_disable);  in pcie_config_aspm_link()
737 		state |= (link->aspm_enabled & ASPM_STATE_L1_SS_PCIPM);  in pcie_config_aspm_link()
740 	/* Nothing to do if the link is already in the requested state */  in pcie_config_aspm_link()
741 	if (link->aspm_enabled == state)  in pcie_config_aspm_link()
753 	if (link->aspm_capable & ASPM_STATE_L1SS)  in pcie_config_aspm_link()
754 		pcie_config_aspm_l1ss(link, state);  in pcie_config_aspm_link()
769 	link->aspm_enabled = state;  in pcie_config_aspm_link()
772 static void pcie_config_aspm_path(struct pcie_link_state *link)  in pcie_config_aspm_path()  argument
774 	while (link) {  in pcie_config_aspm_path()
775 		pcie_config_aspm_link(link, policy_to_aspm_state(link));  in pcie_config_aspm_path()
776 		link = link->parent;  in pcie_config_aspm_path()
780 static void free_link_state(struct pcie_link_state *link)  in free_link_state()  argument
782 	link->pdev->link_state = NULL;  in free_link_state()
783 	kfree(link);  in free_link_state()
823 	struct pcie_link_state *link;  in alloc_pcie_link_state()  local
825 	link = kzalloc(sizeof(*link), GFP_KERNEL);  in alloc_pcie_link_state()
826 	if (!link)  in alloc_pcie_link_state()
829 	INIT_LIST_HEAD(&link->sibling);  in alloc_pcie_link_state()
830 	link->pdev = pdev;  in alloc_pcie_link_state()
831 	link->downstream = pci_function_0(pdev->subordinate);  in alloc_pcie_link_state()
837 	 * a switch may become the root of the link state chain for all  in alloc_pcie_link_state()
843 		link->root = link;  in alloc_pcie_link_state()
849 			kfree(link);  in alloc_pcie_link_state()
853 		link->parent = parent;  in alloc_pcie_link_state()
854 		link->root = link->parent->root;  in alloc_pcie_link_state()
857 	list_add(&link->sibling, &link_list);  in alloc_pcie_link_state()
858 	pdev->link_state = link;  in alloc_pcie_link_state()
859 	return link;  in alloc_pcie_link_state()
871  * pcie_aspm_init_link_state: Initiate PCI express link state.
877 	struct pcie_link_state *link;  in pcie_aspm_init_link_state()  local
888 	 * end of a Link, so there's nothing to do unless this device is  in pcie_aspm_init_link_state()
904 	link = alloc_pcie_link_state(pdev);  in pcie_aspm_init_link_state()
905 	if (!link)  in pcie_aspm_init_link_state()
912 	pcie_aspm_cap_init(link, blacklist);  in pcie_aspm_init_link_state()
915 	pcie_clkpm_cap_init(link, blacklist);  in pcie_aspm_init_link_state()
919 	 * link policy setting. Enabling ASPM on broken hardware can cripple  in pcie_aspm_init_link_state()
927 		pcie_config_aspm_path(link);  in pcie_aspm_init_link_state()
928 		pcie_set_clkpm(link, policy_to_clkpm_state(link));  in pcie_aspm_init_link_state()
942 	struct pcie_link_state *link;  in pcie_update_aspm_capable()  local
944 	list_for_each_entry(link, &link_list, sibling) {  in pcie_update_aspm_capable()
945 		if (link->root != root)  in pcie_update_aspm_capable()
947 		link->aspm_capable = link->aspm_support;  in pcie_update_aspm_capable()
949 	list_for_each_entry(link, &link_list, sibling) {  in pcie_update_aspm_capable()
951 		struct pci_bus *linkbus = link->pdev->subordinate;  in pcie_update_aspm_capable()
952 		if (link->root != root)  in pcie_update_aspm_capable()
967 	struct pcie_link_state *link, *root, *parent_link;  in pcie_aspm_exit_link_state()  local
975 	link = parent->link_state;  in pcie_aspm_exit_link_state()
976 	root = link->root;  in pcie_aspm_exit_link_state()
977 	parent_link = link->parent;  in pcie_aspm_exit_link_state()
980 	 * link->downstream is a pointer to the pci_dev of function 0.  If  in pcie_aspm_exit_link_state()
982 	 * so we can't use link->downstream again.  Free the link state to  in pcie_aspm_exit_link_state()
986 	 * retain the link state, but PCIe r6.0, sec 7.5.3.7, recommends  in pcie_aspm_exit_link_state()
990 	pcie_config_aspm_link(link, 0);  in pcie_aspm_exit_link_state()
991 	list_del(&link->sibling);  in pcie_aspm_exit_link_state()
992 	free_link_state(link);  in pcie_aspm_exit_link_state()
1006 	struct pcie_link_state *link = pdev->link_state;  in pcie_aspm_powersave_config_link()  local
1008 	if (aspm_disabled || !link)  in pcie_aspm_powersave_config_link()
1017 	pcie_config_aspm_path(link);  in pcie_aspm_powersave_config_link()
1018 	pcie_set_clkpm(link, policy_to_clkpm_state(link));  in pcie_aspm_powersave_config_link()
1039 	struct pcie_link_state *link = pcie_aspm_get_link(pdev);  in __pci_disable_link_state()  local
1041 	if (!link)  in __pci_disable_link_state()
1060 		link->aspm_disable |= ASPM_STATE_L0S;  in __pci_disable_link_state()
1062 		link->aspm_disable |= ASPM_STATE_L1;  in __pci_disable_link_state()
1064 		link->aspm_disable |= ASPM_STATE_L1_1;  in __pci_disable_link_state()
1066 		link->aspm_disable |= ASPM_STATE_L1_2;  in __pci_disable_link_state()
1068 		link->aspm_disable |= ASPM_STATE_L1_1_PCIPM;  in __pci_disable_link_state()
1070 		link->aspm_disable |= ASPM_STATE_L1_2_PCIPM;  in __pci_disable_link_state()
1071 	pcie_config_aspm_link(link, policy_to_aspm_state(link));  in __pci_disable_link_state()
1074 		link->clkpm_disable = 1;  in __pci_disable_link_state()
1075 	pcie_set_clkpm(link, policy_to_clkpm_state(link));  in __pci_disable_link_state()
1090  * pci_disable_link_state - Disable device's link state, so the link will
1096  * @state: ASPM link state to disable
1105  * pci_enable_link_state - Clear and set the default device link state so that
1106  * the link may be allowed to enter the specified states. Note that if the
1112  * @state: Mask of ASPM link states to enable
1116 	struct pcie_link_state *link = pcie_aspm_get_link(pdev);  in pci_enable_link_state()  local
1118 	if (!link)  in pci_enable_link_state()
1133 	link->aspm_default = 0;  in pci_enable_link_state()
1135 		link->aspm_default |= ASPM_STATE_L0S;  in pci_enable_link_state()
1137 		link->aspm_default |= ASPM_STATE_L1;  in pci_enable_link_state()
1140 		link->aspm_default |= ASPM_STATE_L1_1 | ASPM_STATE_L1;  in pci_enable_link_state()
1142 		link->aspm_default |= ASPM_STATE_L1_2 | ASPM_STATE_L1;  in pci_enable_link_state()
1144 		link->aspm_default |= ASPM_STATE_L1_1_PCIPM | ASPM_STATE_L1;  in pci_enable_link_state()
1146 		link->aspm_default |= ASPM_STATE_L1_2_PCIPM | ASPM_STATE_L1;  in pci_enable_link_state()
1147 	pcie_config_aspm_link(link, policy_to_aspm_state(link));  in pci_enable_link_state()
1149 	link->clkpm_default = (state & PCIE_LINK_STATE_CLKPM) ? 1 : 0;  in pci_enable_link_state()
1150 	pcie_set_clkpm(link, policy_to_clkpm_state(link));  in pci_enable_link_state()
1162 	struct pcie_link_state *link;  in pcie_aspm_set_policy()  local
1175 	list_for_each_entry(link, &link_list, sibling) {  in pcie_aspm_set_policy()
1176 		pcie_config_aspm_link(link, policy_to_aspm_state(link));  in pcie_aspm_set_policy()
1177 		pcie_set_clkpm(link, policy_to_clkpm_state(link));  in pcie_aspm_set_policy()
1210 	struct pcie_link_state *link = pcie_aspm_get_link(pdev);  in pcie_aspm_enabled()  local
1212 	if (!link)  in pcie_aspm_enabled()
1215 	return link->aspm_enabled;  in pcie_aspm_enabled()
1224 	struct pcie_link_state *link = pcie_aspm_get_link(pdev);  in aspm_attr_show_common()  local
1226 	return sysfs_emit(buf, "%d\n", (link->aspm_enabled & state) ? 1 : 0);  in aspm_attr_show_common()
1234 	struct pcie_link_state *link = pcie_aspm_get_link(pdev);  in aspm_attr_store_common()  local
1244 		link->aspm_disable &= ~state;  in aspm_attr_store_common()
1247 			link->aspm_disable &= ~ASPM_STATE_L1;  in aspm_attr_store_common()
1249 		link->aspm_disable |= state;  in aspm_attr_store_common()
1252 	pcie_config_aspm_link(link, policy_to_aspm_state(link));  in aspm_attr_store_common()
1281 	struct pcie_link_state *link = pcie_aspm_get_link(pdev);  in ASPM_ATTR()  local
1283 	return sysfs_emit(buf, "%d\n", link->clkpm_enabled);  in ASPM_ATTR()
1291 	struct pcie_link_state *link = pcie_aspm_get_link(pdev);  in clkpm_store()  local
1300 	link->clkpm_disable = !state_enable;  in clkpm_store()
1301 	pcie_set_clkpm(link, policy_to_clkpm_state(link));  in clkpm_store()
1333 	struct pcie_link_state *link = pcie_aspm_get_link(pdev);  in aspm_ctrl_attrs_are_visible()  local
1343 	if (aspm_disabled || !link)  in aspm_ctrl_attrs_are_visible()
1347 		return link->clkpm_capable ? a->mode : 0;  in aspm_ctrl_attrs_are_visible()
1349 	return link->aspm_capable & aspm_state_map[n - 1] ? a->mode : 0;  in aspm_ctrl_attrs_are_visible()
1353 	.name = "link",