1101 	} else if (dev->pm_cap) {  in pci_update_current_state()
1104 		pci_read_config_word(dev, dev->pm_cap + PCI_PM_CTRL, &pmcsr);  in pci_update_current_state()
1140 	else if (!dev->pm_cap) /* Fall back to PCI_D0 */  in pci_platform_power_transition()
1242 	if (!dev->pm_cap) {  in pci_power_up()
1252 	pci_read_config_word(dev, dev->pm_cap + PCI_PM_CTRL, &pmcsr);  in pci_power_up()
1272 	pci_write_config_word(dev, dev->pm_cap + PCI_PM_CTRL, 0);  in pci_power_up()
1313 	pci_read_config_word(dev, dev->pm_cap + PCI_PM_CTRL, &pmcsr);  in pci_set_full_power_state()
1380 	if (!dev->pm_cap)  in pci_set_low_power_state()
1401 	pci_read_config_word(dev, dev->pm_cap + PCI_PM_CTRL, &pmcsr);  in pci_set_low_power_state()
1414 	pci_write_config_word(dev, dev->pm_cap + PCI_PM_CTRL, pmcsr);  in pci_set_low_power_state()
1422 	pci_read_config_word(dev, dev->pm_cap + PCI_PM_CTRL, &pmcsr);  in pci_set_low_power_state()
2351 	if (!dev->pm_cap)  in pci_check_pme_status()
2354 	pmcsr_pos = dev->pm_cap + PCI_PM_CTRL;  in pci_check_pme_status()
2410 	if (!dev->pm_cap)  in pci_pme_capable()
2469 	pci_read_config_word(dev, dev->pm_cap + PCI_PM_CTRL, &pmcsr);  in __pci_pme_active()
2475 	pci_write_config_word(dev, dev->pm_cap + PCI_PM_CTRL, pmcsr);  in __pci_pme_active()
2489 	pci_read_config_word(dev, dev->pm_cap + PCI_PM_CTRL, &pmcsr);  in pci_pme_restore()
2497 	pci_write_config_word(dev, dev->pm_cap + PCI_PM_CTRL, pmcsr);  in pci_pme_restore()
2715 	else if (!dev->pm_cap)  in pci_target_state()
3187 	dev->pm_cap = 0;  in pci_pm_init()
3203 	dev->pm_cap = pm;  in pci_pm_init()
4869 	if (!dev->pm_cap || dev->dev_flags & PCI_DEV_FLAGS_NO_PM_RESET)  in pci_pm_reset()
4872 	pci_read_config_word(dev, dev->pm_cap + PCI_PM_CTRL, &csr);  in pci_pm_reset()
4884 	pci_write_config_word(dev, dev->pm_cap + PCI_PM_CTRL, csr);  in pci_pm_reset()
4889 	pci_write_config_word(dev, dev->pm_cap + PCI_PM_CTRL, csr);  in pci_pm_reset()