Lines Matching refs:seq_puts
204 seq_puts(m, "\n"); in rtw89_debug_priv_read_reg_get()
361 seq_puts(m, "\n"); in rtw89_debug_priv_rf_reg_dump_get()
363 seq_puts(m, "\n"); in rtw89_debug_priv_rf_reg_dump_get()
572 seq_puts(m, #_regd "\n"); \
614 seq_puts(m, "[Regulatory] "); in rtw89_debug_priv_txpwr_table_get()
617 seq_puts(m, "[SAR]\n"); in rtw89_debug_priv_txpwr_table_get()
620 seq_puts(m, "[TAS]\n"); in rtw89_debug_priv_txpwr_table_get()
623 seq_puts(m, "\n[TX power byrate]\n"); in rtw89_debug_priv_txpwr_table_get()
628 seq_puts(m, "\n[TX power limit]\n"); in rtw89_debug_priv_txpwr_table_get()
633 seq_puts(m, "\n[TX power limit_ru]\n"); in rtw89_debug_priv_txpwr_table_get()
696 seq_puts(m, "Debug selected MAC page 0x00\n"); in rtw89_debug_priv_mac_reg_dump_get()
701 seq_puts(m, "Debug selected MAC page 0x30\n"); in rtw89_debug_priv_mac_reg_dump_get()
706 seq_puts(m, "Debug selected MAC page 0x40\n"); in rtw89_debug_priv_mac_reg_dump_get()
711 seq_puts(m, "Debug selected MAC page 0x80\n"); in rtw89_debug_priv_mac_reg_dump_get()
716 seq_puts(m, "Debug selected MAC page 0xc0\n"); in rtw89_debug_priv_mac_reg_dump_get()
721 seq_puts(m, "Debug selected MAC page 0xe0\n"); in rtw89_debug_priv_mac_reg_dump_get()
726 seq_puts(m, "Debug selected BB register\n"); in rtw89_debug_priv_mac_reg_dump_get()
731 seq_puts(m, "Debug selected IQK register\n"); in rtw89_debug_priv_mac_reg_dump_get()
736 seq_puts(m, "Debug selected RFC register\n"); in rtw89_debug_priv_mac_reg_dump_get()
741 seq_puts(m, "Selected invalid register page\n"); in rtw89_debug_priv_mac_reg_dump_get()
753 seq_puts(m, "\n"); in rtw89_debug_priv_mac_reg_dump_get()
826 seq_puts(m, "\n"); in rtw89_debug_dump_mac_mem()
994 seq_puts(m, "[DLE] : DMAC not enabled\n"); in rtw89_debug_mac_dump_dle_dbg()
1041 seq_puts(m, "[DMAC] : DMAC not enabled\n"); in rtw89_debug_mac_dump_dmac_dbg()
1298 seq_puts(m, "[CMAC] : CMAC1 not enabled\n"); in rtw89_debug_mac_dump_cmac_err()
1300 seq_puts(m, "[CMAC] : CMAC0 not enabled\n"); in rtw89_debug_mac_dump_cmac_err()
2209 seq_puts(m, "Enable PTCL C0 dbgport.\n"); in rtw89_debug_mac_dbg_port_sel()
2216 seq_puts(m, "Enable PTCL C1 dbgport.\n"); in rtw89_debug_mac_dbg_port_sel()
2223 seq_puts(m, "Enable SCH C0 dbgport.\n"); in rtw89_debug_mac_dbg_port_sel()
2230 seq_puts(m, "Enable SCH C1 dbgport.\n"); in rtw89_debug_mac_dbg_port_sel()
2247 seq_puts(m, "Enable TMAC C0 dbgport.\n"); in rtw89_debug_mac_dbg_port_sel()
2264 seq_puts(m, "Enable TMAC C1 dbgport.\n"); in rtw89_debug_mac_dbg_port_sel()
2286 seq_puts(m, "Enable RMAC C0 dbgport.\n"); in rtw89_debug_mac_dbg_port_sel()
2308 seq_puts(m, "Enable RMAC C1 dbgport.\n"); in rtw89_debug_mac_dbg_port_sel()
2312 seq_puts(m, "Enable RMAC state C0 dbgport.\n"); in rtw89_debug_mac_dbg_port_sel()
2316 seq_puts(m, "Enable RMAC state C1 dbgport.\n"); in rtw89_debug_mac_dbg_port_sel()
2320 seq_puts(m, "Enable RMAC PLCP C0 dbgport.\n"); in rtw89_debug_mac_dbg_port_sel()
2324 seq_puts(m, "Enable RMAC PLCP C1 dbgport.\n"); in rtw89_debug_mac_dbg_port_sel()
2336 seq_puts(m, "Enable TRXPTCL C0 dbgport.\n"); in rtw89_debug_mac_dbg_port_sel()
2348 seq_puts(m, "Enable TRXPTCL C1 dbgport.\n"); in rtw89_debug_mac_dbg_port_sel()
2355 seq_puts(m, "Enable tx infol dump.\n"); in rtw89_debug_mac_dbg_port_sel()
2362 seq_puts(m, "Enable tx infoh dump.\n"); in rtw89_debug_mac_dbg_port_sel()
2369 seq_puts(m, "Enable tx infol dump.\n"); in rtw89_debug_mac_dbg_port_sel()
2376 seq_puts(m, "Enable tx infoh dump.\n"); in rtw89_debug_mac_dbg_port_sel()
2383 seq_puts(m, "Enable tx tf infol dump.\n"); in rtw89_debug_mac_dbg_port_sel()
2390 seq_puts(m, "Enable tx tf infoh dump.\n"); in rtw89_debug_mac_dbg_port_sel()
2397 seq_puts(m, "Enable tx tf infol dump.\n"); in rtw89_debug_mac_dbg_port_sel()
2404 seq_puts(m, "Enable tx tf infoh dump.\n"); in rtw89_debug_mac_dbg_port_sel()
2408 seq_puts(m, "Enable wde bufmgn freepg dump.\n"); in rtw89_debug_mac_dbg_port_sel()
2412 seq_puts(m, "Enable wde bufmgn quota dump.\n"); in rtw89_debug_mac_dbg_port_sel()
2416 seq_puts(m, "Enable wde bufmgn pagellt dump.\n"); in rtw89_debug_mac_dbg_port_sel()
2420 seq_puts(m, "Enable wde bufmgn pktinfo dump.\n"); in rtw89_debug_mac_dbg_port_sel()
2424 seq_puts(m, "Enable wde quemgn prepkt dump.\n"); in rtw89_debug_mac_dbg_port_sel()
2428 seq_puts(m, "Enable wde quemgn nxtpkt dump.\n"); in rtw89_debug_mac_dbg_port_sel()
2432 seq_puts(m, "Enable wde quemgn qlnktbl dump.\n"); in rtw89_debug_mac_dbg_port_sel()
2436 seq_puts(m, "Enable wde quemgn qempty dump.\n"); in rtw89_debug_mac_dbg_port_sel()
2440 seq_puts(m, "Enable ple bufmgn freepg dump.\n"); in rtw89_debug_mac_dbg_port_sel()
2444 seq_puts(m, "Enable ple bufmgn quota dump.\n"); in rtw89_debug_mac_dbg_port_sel()
2448 seq_puts(m, "Enable ple bufmgn pagellt dump.\n"); in rtw89_debug_mac_dbg_port_sel()
2452 seq_puts(m, "Enable ple bufmgn pktinfo dump.\n"); in rtw89_debug_mac_dbg_port_sel()
2456 seq_puts(m, "Enable ple quemgn prepkt dump.\n"); in rtw89_debug_mac_dbg_port_sel()
2460 seq_puts(m, "Enable ple quemgn nxtpkt dump.\n"); in rtw89_debug_mac_dbg_port_sel()
2464 seq_puts(m, "Enable ple quemgn qlnktbl dump.\n"); in rtw89_debug_mac_dbg_port_sel()
2468 seq_puts(m, "Enable ple quemgn qempty dump.\n"); in rtw89_debug_mac_dbg_port_sel()
2472 seq_puts(m, "Enable pktinfo dump.\n"); in rtw89_debug_mac_dbg_port_sel()
2499 seq_puts(m, "Enable Dispatcher hdt tx6 dump.\n"); in rtw89_debug_mac_dbg_port_sel()
2507 seq_puts(m, "Enable Dispatcher hdt tx7 dump.\n"); in rtw89_debug_mac_dbg_port_sel()
2515 seq_puts(m, "Enable Dispatcher hdt tx8 dump.\n"); in rtw89_debug_mac_dbg_port_sel()
2535 seq_puts(m, "Enable Dispatcher hdt txD dump.\n"); in rtw89_debug_mac_dbg_port_sel()
2543 seq_puts(m, "Enable Dispatcher cdt tx0 dump.\n"); in rtw89_debug_mac_dbg_port_sel()
2551 seq_puts(m, "Enable Dispatcher cdt tx1 dump.\n"); in rtw89_debug_mac_dbg_port_sel()
2559 seq_puts(m, "Enable Dispatcher cdt tx3 dump.\n"); in rtw89_debug_mac_dbg_port_sel()
2567 seq_puts(m, "Enable Dispatcher cdt tx4 dump.\n"); in rtw89_debug_mac_dbg_port_sel()
2587 seq_puts(m, "Enable Dispatcher cdt tx9 dump.\n"); in rtw89_debug_mac_dbg_port_sel()
2606 seq_puts(m, "Enable Dispatcher hdt rx0 dump.\n"); in rtw89_debug_mac_dbg_port_sel()
2624 seq_puts(m, "Enable Dispatcher hdt rx3 dump.\n"); in rtw89_debug_mac_dbg_port_sel()
2632 seq_puts(m, "Enable Dispatcher hdt rx4 dump.\n"); in rtw89_debug_mac_dbg_port_sel()
2640 seq_puts(m, "Enable Dispatcher hdt rx5 dump.\n"); in rtw89_debug_mac_dbg_port_sel()
2648 seq_puts(m, "Enable Dispatcher cdt rx part0 0 dump.\n"); in rtw89_debug_mac_dbg_port_sel()
2657 seq_puts(m, "Enable Dispatcher cdt rx part0 1 dump.\n"); in rtw89_debug_mac_dbg_port_sel()
2665 seq_puts(m, "Enable Dispatcher cdt rx part0 2 dump.\n"); in rtw89_debug_mac_dbg_port_sel()
2671 seq_puts(m, "Enable Dispatcher cdt rx part1 dump.\n"); in rtw89_debug_mac_dbg_port_sel()
2677 seq_puts(m, "Enable Dispatcher stf control dump.\n"); in rtw89_debug_mac_dbg_port_sel()
2683 seq_puts(m, "Enable Dispatcher addr control dump.\n"); in rtw89_debug_mac_dbg_port_sel()
2689 seq_puts(m, "Enable Dispatcher wde interface dump.\n"); in rtw89_debug_mac_dbg_port_sel()
2695 seq_puts(m, "Enable Dispatcher ple interface dump.\n"); in rtw89_debug_mac_dbg_port_sel()
2701 seq_puts(m, "Enable Dispatcher flow control dump.\n"); in rtw89_debug_mac_dbg_port_sel()
2709 seq_puts(m, "Enable pcie txdma dump.\n"); in rtw89_debug_mac_dbg_port_sel()
2717 seq_puts(m, "Enable pcie rxdma dump.\n"); in rtw89_debug_mac_dbg_port_sel()
2725 seq_puts(m, "Enable pcie cvt dump.\n"); in rtw89_debug_mac_dbg_port_sel()
2733 seq_puts(m, "Enable pcie cxpl dump.\n"); in rtw89_debug_mac_dbg_port_sel()
2741 seq_puts(m, "Enable pcie io dump.\n"); in rtw89_debug_mac_dbg_port_sel()
2749 seq_puts(m, "Enable pcie misc dump.\n"); in rtw89_debug_mac_dbg_port_sel()
2757 seq_puts(m, "Enable pcie misc2 dump.\n"); in rtw89_debug_mac_dbg_port_sel()
2760 seq_puts(m, "Dbg port select err\n"); in rtw89_debug_mac_dbg_port_sel()
2814 seq_puts(m, "Dump debug port " #__sel ":\n"); \ in rtw89_debug_mac_dbg_port_dump()
3310 seq_puts(m, "]\n"); in rtw89_sta_info_get_iter()
3312 seq_puts(m, "EVM: ["); in rtw89_sta_info_get_iter()
3321 seq_puts(m, "]\t"); in rtw89_sta_info_get_iter()
3379 seq_puts(m, "RX count:\n"); in rtw89_debug_priv_phy_info_get()
3391 seq_puts(m, "]["); in rtw89_debug_priv_phy_info_get()
3395 seq_puts(m, "]\n"); in rtw89_debug_priv_phy_info_get()
3420 seq_puts(m, "\n"); in rtw89_dump_addr_cam()
3446 seq_puts(m, "\n"); in rtw89_dump_pkt_offload()
3471 seq_puts(m, "\tba_cam "); in rtw89_dump_ba_cam()
3474 seq_puts(m, ", "); in rtw89_dump_ba_cam()
3479 seq_puts(m, "\n"); in rtw89_dump_ba_cam()
3502 seq_puts(m, "map:\n"); in rtw89_debug_priv_stations_get()