Lines Matching refs:rtw_write32_mask
379 rtw_write32_mask(rtwdev, 0x1d58, 0xff8, 0x1ff); in rtw8822c_dac_bb_setting()
380 rtw_write32_mask(rtwdev, 0x1a00, 0x3, 0x2); in rtw8822c_dac_bb_setting()
381 rtw_write32_mask(rtwdev, 0x1a14, 0x300, 0x3); in rtw8822c_dac_bb_setting()
383 rtw_write32_mask(rtwdev, 0x180c, 0x3, 0x0); in rtw8822c_dac_bb_setting()
384 rtw_write32_mask(rtwdev, 0x410c, 0x3, 0x0); in rtw8822c_dac_bb_setting()
389 rtw_write32_mask(rtwdev, 0x1e24, BIT(31), 0x0); in rtw8822c_dac_bb_setting()
390 rtw_write32_mask(rtwdev, 0x1e28, 0xf, 0x3); in rtw8822c_dac_bb_setting()
418 rtw_write32_mask(rtwdev, base_addr + 0x30, BIT(30), 0x0); in rtw8822c_dac_cal_adc()
523 rtw_write32_mask(rtwdev, base_addr + 0xbc, 0xf0000000, 0x0); in rtw8822c_dac_cal_step2()
524 rtw_write32_mask(rtwdev, base_addr + 0xc0, 0xf, 0x8); in rtw8822c_dac_cal_step2()
525 rtw_write32_mask(rtwdev, base_addr + 0xd8, 0xf0000000, 0x0); in rtw8822c_dac_cal_step2()
526 rtw_write32_mask(rtwdev, base_addr + 0xdc, 0xf, 0x8); in rtw8822c_dac_cal_step2()
586 rtw_write32_mask(rtwdev, base_addr + 0xbc, 0xf0000000, ic & 0xf); in rtw8822c_dac_cal_step3()
587 rtw_write32_mask(rtwdev, base_addr + 0xc0, 0xf, (ic & 0xf0) >> 4); in rtw8822c_dac_cal_step3()
591 rtw_write32_mask(rtwdev, base_addr + 0xd8, 0xf0000000, qc & 0xf); in rtw8822c_dac_cal_step3()
592 rtw_write32_mask(rtwdev, base_addr + 0xdc, 0xf, (qc & 0xf0) >> 4); in rtw8822c_dac_cal_step3()
595 rtw_write32_mask(rtwdev, base_addr + 0xbc, 0xe, 0x6); in rtw8822c_dac_cal_step3()
608 rtw_write32_mask(rtwdev, base_addr + 0xbc, 0xe, 0x3); in rtw8822c_dac_cal_step3()
648 rtw_write32_mask(rtwdev, base_addr + 0xbc, 0x1, 0x0); in rtw8822c_dac_cal_step4()
649 rtw_write32_mask(rtwdev, base_addr + 0x30, BIT(30), 0x1); in rtw8822c_dac_cal_step4()
663 rtw_write32_mask(rtwdev, w_addr, 0xf0000000, i); in rtw8822c_dac_cal_backup_vec()
726 rtw_write32_mask(rtwdev, 0x1860, 0xfc000000, 0x3c); in rtw8822c_dac_cal_backup()
731 rtw_write32_mask(rtwdev, 0x4160, 0xfc000000, 0x3c); in rtw8822c_dac_cal_backup()
750 rtw_write32_mask(rtwdev, REG_DCKA_I_0, 0xf0000000, val); in rtw8822c_dac_cal_restore_dck()
752 rtw_write32_mask(rtwdev, REG_DCKA_I_1, 0xf, val); in rtw8822c_dac_cal_restore_dck()
756 rtw_write32_mask(rtwdev, REG_DCKA_Q_0, 0xf0000000, val); in rtw8822c_dac_cal_restore_dck()
758 rtw_write32_mask(rtwdev, REG_DCKA_Q_1, 0xf, val); in rtw8822c_dac_cal_restore_dck()
762 rtw_write32_mask(rtwdev, REG_DCKB_I_0, 0xf0000000, val); in rtw8822c_dac_cal_restore_dck()
764 rtw_write32_mask(rtwdev, REG_DCKB_I_1, 0xf, val); in rtw8822c_dac_cal_restore_dck()
768 rtw_write32_mask(rtwdev, REG_DCKB_Q_0, 0xf0000000, val); in rtw8822c_dac_cal_restore_dck()
770 rtw_write32_mask(rtwdev, REG_DCKB_Q_1, 0xf, val); in rtw8822c_dac_cal_restore_dck()
777 rtw_write32_mask(rtwdev, 0x18b0, BIT(27), 0x0); in rtw8822c_dac_cal_restore_prepare()
778 rtw_write32_mask(rtwdev, 0x18cc, BIT(27), 0x0); in rtw8822c_dac_cal_restore_prepare()
779 rtw_write32_mask(rtwdev, 0x41b0, BIT(27), 0x0); in rtw8822c_dac_cal_restore_prepare()
780 rtw_write32_mask(rtwdev, 0x41cc, BIT(27), 0x0); in rtw8822c_dac_cal_restore_prepare()
782 rtw_write32_mask(rtwdev, 0x1830, BIT(30), 0x0); in rtw8822c_dac_cal_restore_prepare()
783 rtw_write32_mask(rtwdev, 0x1860, 0xfc000000, 0x3c); in rtw8822c_dac_cal_restore_prepare()
784 rtw_write32_mask(rtwdev, 0x18b4, BIT(0), 0x1); in rtw8822c_dac_cal_restore_prepare()
785 rtw_write32_mask(rtwdev, 0x18d0, BIT(0), 0x1); in rtw8822c_dac_cal_restore_prepare()
787 rtw_write32_mask(rtwdev, 0x4130, BIT(30), 0x0); in rtw8822c_dac_cal_restore_prepare()
788 rtw_write32_mask(rtwdev, 0x4160, 0xfc000000, 0x3c); in rtw8822c_dac_cal_restore_prepare()
789 rtw_write32_mask(rtwdev, 0x41b4, BIT(0), 0x1); in rtw8822c_dac_cal_restore_prepare()
790 rtw_write32_mask(rtwdev, 0x41d0, BIT(0), 0x1); in rtw8822c_dac_cal_restore_prepare()
792 rtw_write32_mask(rtwdev, 0x18b0, 0xf00, 0x0); in rtw8822c_dac_cal_restore_prepare()
793 rtw_write32_mask(rtwdev, 0x18c0, BIT(14), 0x0); in rtw8822c_dac_cal_restore_prepare()
794 rtw_write32_mask(rtwdev, 0x18cc, 0xf00, 0x0); in rtw8822c_dac_cal_restore_prepare()
795 rtw_write32_mask(rtwdev, 0x18dc, BIT(14), 0x0); in rtw8822c_dac_cal_restore_prepare()
797 rtw_write32_mask(rtwdev, 0x18b0, BIT(0), 0x0); in rtw8822c_dac_cal_restore_prepare()
798 rtw_write32_mask(rtwdev, 0x18cc, BIT(0), 0x0); in rtw8822c_dac_cal_restore_prepare()
799 rtw_write32_mask(rtwdev, 0x18b0, BIT(0), 0x1); in rtw8822c_dac_cal_restore_prepare()
800 rtw_write32_mask(rtwdev, 0x18cc, BIT(0), 0x1); in rtw8822c_dac_cal_restore_prepare()
804 rtw_write32_mask(rtwdev, 0x18c0, 0x38000, 0x7); in rtw8822c_dac_cal_restore_prepare()
805 rtw_write32_mask(rtwdev, 0x18dc, 0x38000, 0x7); in rtw8822c_dac_cal_restore_prepare()
806 rtw_write32_mask(rtwdev, 0x41c0, 0x38000, 0x7); in rtw8822c_dac_cal_restore_prepare()
807 rtw_write32_mask(rtwdev, 0x41dc, 0x38000, 0x7); in rtw8822c_dac_cal_restore_prepare()
809 rtw_write32_mask(rtwdev, 0x18b8, BIT(26) | BIT(25), 0x1); in rtw8822c_dac_cal_restore_prepare()
810 rtw_write32_mask(rtwdev, 0x18d4, BIT(26) | BIT(25), 0x1); in rtw8822c_dac_cal_restore_prepare()
812 rtw_write32_mask(rtwdev, 0x41b0, 0xf00, 0x0); in rtw8822c_dac_cal_restore_prepare()
813 rtw_write32_mask(rtwdev, 0x41c0, BIT(14), 0x0); in rtw8822c_dac_cal_restore_prepare()
814 rtw_write32_mask(rtwdev, 0x41cc, 0xf00, 0x0); in rtw8822c_dac_cal_restore_prepare()
815 rtw_write32_mask(rtwdev, 0x41dc, BIT(14), 0x0); in rtw8822c_dac_cal_restore_prepare()
817 rtw_write32_mask(rtwdev, 0x41b0, BIT(0), 0x0); in rtw8822c_dac_cal_restore_prepare()
818 rtw_write32_mask(rtwdev, 0x41cc, BIT(0), 0x0); in rtw8822c_dac_cal_restore_prepare()
819 rtw_write32_mask(rtwdev, 0x41b0, BIT(0), 0x1); in rtw8822c_dac_cal_restore_prepare()
820 rtw_write32_mask(rtwdev, 0x41cc, BIT(0), 0x1); in rtw8822c_dac_cal_restore_prepare()
822 rtw_write32_mask(rtwdev, 0x41b8, BIT(26) | BIT(25), 0x1); in rtw8822c_dac_cal_restore_prepare()
823 rtw_write32_mask(rtwdev, 0x41d4, BIT(26) | BIT(25), 0x1); in rtw8822c_dac_cal_restore_prepare()
832 rtw_write32_mask(rtwdev, toggle_addr, BIT(26) | BIT(25), 0x0); in rtw8822c_dac_cal_restore_wait()
833 rtw_write32_mask(rtwdev, toggle_addr, BIT(26) | BIT(25), 0x2); in rtw8822c_dac_cal_restore_wait()
861 rtw_write32_mask(rtwdev, w_i + 0x4, BIT(2), 0x0); in rtw8822c_dac_cal_restore_path()
863 rtw_write32_mask(rtwdev, w_i + 0x4, 0xff8, value); in rtw8822c_dac_cal_restore_path()
864 rtw_write32_mask(rtwdev, w_i, 0xf0000000, i); in rtw8822c_dac_cal_restore_path()
865 rtw_write32_mask(rtwdev, w_i + 0x4, BIT(2), 0x1); in rtw8822c_dac_cal_restore_path()
868 rtw_write32_mask(rtwdev, w_i + 0x4, BIT(2), 0x0); in rtw8822c_dac_cal_restore_path()
874 rtw_write32_mask(rtwdev, w_q + 0x4, BIT(2), 0x0); in rtw8822c_dac_cal_restore_path()
876 rtw_write32_mask(rtwdev, w_q + 0x4, 0xff8, value); in rtw8822c_dac_cal_restore_path()
877 rtw_write32_mask(rtwdev, w_q, 0xf0000000, i); in rtw8822c_dac_cal_restore_path()
878 rtw_write32_mask(rtwdev, w_q + 0x4, BIT(2), 0x1); in rtw8822c_dac_cal_restore_path()
880 rtw_write32_mask(rtwdev, w_q + 0x4, BIT(2), 0x0); in rtw8822c_dac_cal_restore_path()
882 rtw_write32_mask(rtwdev, w_i + 0x8, BIT(26) | BIT(25), 0x0); in rtw8822c_dac_cal_restore_path()
883 rtw_write32_mask(rtwdev, w_q + 0x8, BIT(26) | BIT(25), 0x0); in rtw8822c_dac_cal_restore_path()
884 rtw_write32_mask(rtwdev, w_i + 0x4, BIT(0), 0x0); in rtw8822c_dac_cal_restore_path()
885 rtw_write32_mask(rtwdev, w_q + 0x4, BIT(0), 0x0); in rtw8822c_dac_cal_restore_path()
929 rtw_write32_mask(rtwdev, 0x1830, BIT(30), 0x1); in rtw8822c_dac_cal_restore()
930 rtw_write32_mask(rtwdev, 0x4130, BIT(30), 0x1); in rtw8822c_dac_cal_restore()
933 rtw_write32_mask(rtwdev, 0x18b0, BIT(27), 0x1); in rtw8822c_dac_cal_restore()
934 rtw_write32_mask(rtwdev, 0x18cc, BIT(27), 0x1); in rtw8822c_dac_cal_restore()
935 rtw_write32_mask(rtwdev, 0x41b0, BIT(27), 0x1); in rtw8822c_dac_cal_restore()
936 rtw_write32_mask(rtwdev, 0x41cc, BIT(27), 0x1); in rtw8822c_dac_cal_restore()
993 rtw_write32_mask(rtwdev, 0x4130, BIT(30), 0x1); in rtw8822c_rf_dac_cal()
1089 rtw_write32_mask(rtwdev, REG_DIS_DPD, DIS_DPD_MASK, DIS_DPD_RATEALL); in rtw8822c_power_trim()
1184 rtw_write32_mask(rtwdev, REG_NCTL0, BIT_SEL_PATH, path); in rtw8822c_rfk_power_save()
1185 rtw_write32_mask(rtwdev, REG_DPD_CTL1_S0, BIT_PS_EN, in rtw8822c_rfk_power_save()
1237 rtw_write32_mask(rtwdev, REG_TX_FIFO, BIT_STOP_TX, 0x2); in rtw8822c_txgapk_tx_pause()
1251 rtw_write32_mask(rtwdev, REG_ENFN, BIT_IQK_DPK_EN, 0x1); in rtw8822c_txgapk_bb_dpk()
1252 rtw_write32_mask(rtwdev, REG_CH_DELAY_EXTR2, in rtw8822c_txgapk_bb_dpk()
1254 rtw_write32_mask(rtwdev, REG_CH_DELAY_EXTR2, in rtw8822c_txgapk_bb_dpk()
1256 rtw_write32_mask(rtwdev, REG_CH_DELAY_EXTR2, BIT_EN_IOQ_IQK_DPK, 0x1); in rtw8822c_txgapk_bb_dpk()
1257 rtw_write32_mask(rtwdev, REG_CH_DELAY_EXTR2, BIT_TST_IQK2SET_SRC, 0x0); in rtw8822c_txgapk_bb_dpk()
1258 rtw_write32_mask(rtwdev, REG_CCA_OFF, BIT_CCA_ON_BY_PW, 0x1ff); in rtw8822c_txgapk_bb_dpk()
1261 rtw_write32_mask(rtwdev, REG_RFTXEN_GCK_A, in rtw8822c_txgapk_bb_dpk()
1263 rtw_write32_mask(rtwdev, REG_3WIRE, BIT_DIS_SHARERX_TXGAT, 0x1); in rtw8822c_txgapk_bb_dpk()
1264 rtw_write32_mask(rtwdev, REG_DIS_SHARE_RX_A, in rtw8822c_txgapk_bb_dpk()
1266 rtw_write32_mask(rtwdev, REG_3WIRE, BIT_3WIRE_EN, 0x0); in rtw8822c_txgapk_bb_dpk()
1268 rtw_write32_mask(rtwdev, REG_RFTXEN_GCK_B, in rtw8822c_txgapk_bb_dpk()
1270 rtw_write32_mask(rtwdev, REG_3WIRE2, in rtw8822c_txgapk_bb_dpk()
1272 rtw_write32_mask(rtwdev, REG_DIS_SHARE_RX_B, in rtw8822c_txgapk_bb_dpk()
1274 rtw_write32_mask(rtwdev, REG_3WIRE2, BIT_3WIRE_EN, 0x0); in rtw8822c_txgapk_bb_dpk()
1276 rtw_write32_mask(rtwdev, REG_CCKSB, BIT_BBMODE, 0x2); in rtw8822c_txgapk_bb_dpk()
1294 rtw_write32_mask(rtwdev, REG_IQK_CTRL, MASKDWORD, MASKDWORD); in rtw8822c_txgapk_afe_dpk()
1295 rtw_write32_mask(rtwdev, reg, MASKDWORD, 0x700f0001); in rtw8822c_txgapk_afe_dpk()
1296 rtw_write32_mask(rtwdev, reg, MASKDWORD, 0x700f0001); in rtw8822c_txgapk_afe_dpk()
1297 rtw_write32_mask(rtwdev, reg, MASKDWORD, 0x701f0001); in rtw8822c_txgapk_afe_dpk()
1298 rtw_write32_mask(rtwdev, reg, MASKDWORD, 0x702f0001); in rtw8822c_txgapk_afe_dpk()
1299 rtw_write32_mask(rtwdev, reg, MASKDWORD, 0x703f0001); in rtw8822c_txgapk_afe_dpk()
1300 rtw_write32_mask(rtwdev, reg, MASKDWORD, 0x704f0001); in rtw8822c_txgapk_afe_dpk()
1301 rtw_write32_mask(rtwdev, reg, MASKDWORD, 0x705f0001); in rtw8822c_txgapk_afe_dpk()
1302 rtw_write32_mask(rtwdev, reg, MASKDWORD, 0x706f0001); in rtw8822c_txgapk_afe_dpk()
1303 rtw_write32_mask(rtwdev, reg, MASKDWORD, 0x707f0001); in rtw8822c_txgapk_afe_dpk()
1304 rtw_write32_mask(rtwdev, reg, MASKDWORD, 0x708f0001); in rtw8822c_txgapk_afe_dpk()
1305 rtw_write32_mask(rtwdev, reg, MASKDWORD, 0x709f0001); in rtw8822c_txgapk_afe_dpk()
1306 rtw_write32_mask(rtwdev, reg, MASKDWORD, 0x70af0001); in rtw8822c_txgapk_afe_dpk()
1307 rtw_write32_mask(rtwdev, reg, MASKDWORD, 0x70bf0001); in rtw8822c_txgapk_afe_dpk()
1308 rtw_write32_mask(rtwdev, reg, MASKDWORD, 0x70cf0001); in rtw8822c_txgapk_afe_dpk()
1309 rtw_write32_mask(rtwdev, reg, MASKDWORD, 0x70df0001); in rtw8822c_txgapk_afe_dpk()
1310 rtw_write32_mask(rtwdev, reg, MASKDWORD, 0x70ef0001); in rtw8822c_txgapk_afe_dpk()
1311 rtw_write32_mask(rtwdev, reg, MASKDWORD, 0x70ff0001); in rtw8822c_txgapk_afe_dpk()
1312 rtw_write32_mask(rtwdev, reg, MASKDWORD, 0x70ff0001); in rtw8822c_txgapk_afe_dpk()
1329 rtw_write32_mask(rtwdev, REG_IQK_CTRL, MASKDWORD, 0xffa1005e); in rtw8822c_txgapk_afe_dpk_restore()
1330 rtw_write32_mask(rtwdev, reg, MASKDWORD, 0x700b8041); in rtw8822c_txgapk_afe_dpk_restore()
1331 rtw_write32_mask(rtwdev, reg, MASKDWORD, 0x70144041); in rtw8822c_txgapk_afe_dpk_restore()
1332 rtw_write32_mask(rtwdev, reg, MASKDWORD, 0x70244041); in rtw8822c_txgapk_afe_dpk_restore()
1333 rtw_write32_mask(rtwdev, reg, MASKDWORD, 0x70344041); in rtw8822c_txgapk_afe_dpk_restore()
1334 rtw_write32_mask(rtwdev, reg, MASKDWORD, 0x70444041); in rtw8822c_txgapk_afe_dpk_restore()
1335 rtw_write32_mask(rtwdev, reg, MASKDWORD, 0x705b8041); in rtw8822c_txgapk_afe_dpk_restore()
1336 rtw_write32_mask(rtwdev, reg, MASKDWORD, 0x70644041); in rtw8822c_txgapk_afe_dpk_restore()
1337 rtw_write32_mask(rtwdev, reg, MASKDWORD, 0x707b8041); in rtw8822c_txgapk_afe_dpk_restore()
1338 rtw_write32_mask(rtwdev, reg, MASKDWORD, 0x708b8041); in rtw8822c_txgapk_afe_dpk_restore()
1339 rtw_write32_mask(rtwdev, reg, MASKDWORD, 0x709b8041); in rtw8822c_txgapk_afe_dpk_restore()
1340 rtw_write32_mask(rtwdev, reg, MASKDWORD, 0x70ab8041); in rtw8822c_txgapk_afe_dpk_restore()
1341 rtw_write32_mask(rtwdev, reg, MASKDWORD, 0x70bb8041); in rtw8822c_txgapk_afe_dpk_restore()
1342 rtw_write32_mask(rtwdev, reg, MASKDWORD, 0x70cb8041); in rtw8822c_txgapk_afe_dpk_restore()
1343 rtw_write32_mask(rtwdev, reg, MASKDWORD, 0x70db8041); in rtw8822c_txgapk_afe_dpk_restore()
1344 rtw_write32_mask(rtwdev, reg, MASKDWORD, 0x70eb8041); in rtw8822c_txgapk_afe_dpk_restore()
1345 rtw_write32_mask(rtwdev, reg, MASKDWORD, 0x70fb8041); in rtw8822c_txgapk_afe_dpk_restore()
1356 rtw_write32_mask(rtwdev, REG_NCTL0, BIT_SEL_PATH, 0x0); in rtw8822c_txgapk_bb_dpk_restore()
1357 rtw_write32_mask(rtwdev, REG_IQK_CTL1, BIT_TX_CFIR, 0x0); in rtw8822c_txgapk_bb_dpk_restore()
1358 rtw_write32_mask(rtwdev, REG_SINGLE_TONE_SW, BIT_IRQ_TEST_MODE, 0x0); in rtw8822c_txgapk_bb_dpk_restore()
1359 rtw_write32_mask(rtwdev, REG_R_CONFIG, MASKBYTE0, 0x00); in rtw8822c_txgapk_bb_dpk_restore()
1360 rtw_write32_mask(rtwdev, REG_NCTL0, BIT_SEL_PATH, 0x1); in rtw8822c_txgapk_bb_dpk_restore()
1361 rtw_write32_mask(rtwdev, REG_IQK_CTL1, BIT_TX_CFIR, 0x0); in rtw8822c_txgapk_bb_dpk_restore()
1362 rtw_write32_mask(rtwdev, REG_SINGLE_TONE_SW, BIT_IRQ_TEST_MODE, 0x0); in rtw8822c_txgapk_bb_dpk_restore()
1363 rtw_write32_mask(rtwdev, REG_R_CONFIG, MASKBYTE0, 0x00); in rtw8822c_txgapk_bb_dpk_restore()
1364 rtw_write32_mask(rtwdev, REG_NCTL0, BIT_SEL_PATH, 0x0); in rtw8822c_txgapk_bb_dpk_restore()
1365 rtw_write32_mask(rtwdev, REG_CCA_OFF, BIT_CCA_ON_BY_PW, 0x0); in rtw8822c_txgapk_bb_dpk_restore()
1368 rtw_write32_mask(rtwdev, REG_RFTXEN_GCK_A, in rtw8822c_txgapk_bb_dpk_restore()
1370 rtw_write32_mask(rtwdev, REG_3WIRE, BIT_DIS_SHARERX_TXGAT, 0x0); in rtw8822c_txgapk_bb_dpk_restore()
1371 rtw_write32_mask(rtwdev, REG_DIS_SHARE_RX_A, in rtw8822c_txgapk_bb_dpk_restore()
1373 rtw_write32_mask(rtwdev, REG_3WIRE, BIT_3WIRE_EN, 0x3); in rtw8822c_txgapk_bb_dpk_restore()
1375 rtw_write32_mask(rtwdev, REG_RFTXEN_GCK_B, in rtw8822c_txgapk_bb_dpk_restore()
1377 rtw_write32_mask(rtwdev, REG_3WIRE2, in rtw8822c_txgapk_bb_dpk_restore()
1379 rtw_write32_mask(rtwdev, REG_DIS_SHARE_RX_B, in rtw8822c_txgapk_bb_dpk_restore()
1381 rtw_write32_mask(rtwdev, REG_3WIRE2, BIT_3WIRE_EN, 0x3); in rtw8822c_txgapk_bb_dpk_restore()
1384 rtw_write32_mask(rtwdev, REG_CCKSB, BIT_BBMODE, 0x0); in rtw8822c_txgapk_bb_dpk_restore()
1385 rtw_write32_mask(rtwdev, REG_IQK_CTL1, BIT_CFIR_EN, 0x5); in rtw8822c_txgapk_bb_dpk_restore()
1404 rtw_write32_mask(rtwdev, REG_NCTL0, BIT_SEL_PATH, path); in _rtw8822c_txgapk_write_gain_bb_table()
1408 rtw_write32_mask(rtwdev, REG_TABLE_SEL, BIT_Q_GAIN_SEL, 0x0); in _rtw8822c_txgapk_write_gain_bb_table()
1411 rtw_write32_mask(rtwdev, REG_TABLE_SEL, BIT_Q_GAIN_SEL, 0x2); in _rtw8822c_txgapk_write_gain_bb_table()
1414 rtw_write32_mask(rtwdev, REG_TABLE_SEL, BIT_Q_GAIN_SEL, 0x3); in _rtw8822c_txgapk_write_gain_bb_table()
1417 rtw_write32_mask(rtwdev, REG_TABLE_SEL, BIT_Q_GAIN_SEL, 0x4); in _rtw8822c_txgapk_write_gain_bb_table()
1423 rtw_write32_mask(rtwdev, REG_TX_GAIN_SET, MASKBYTE0, 0x88); in _rtw8822c_txgapk_write_gain_bb_table()
1440 rtw_write32_mask(rtwdev, REG_TABLE_SEL, BIT_Q_GAIN, tmp_3f); in _rtw8822c_txgapk_write_gain_bb_table()
1441 rtw_write32_mask(rtwdev, REG_TABLE_SEL, BIT_I_GAIN, gain); in _rtw8822c_txgapk_write_gain_bb_table()
1442 rtw_write32_mask(rtwdev, REG_TABLE_SEL, BIT_GAIN_RST, 0x1); in _rtw8822c_txgapk_write_gain_bb_table()
1443 rtw_write32_mask(rtwdev, REG_TABLE_SEL, BIT_GAIN_RST, 0x0); in _rtw8822c_txgapk_write_gain_bb_table()
1485 rtw_write32_mask(rtwdev, REG_ANTMAP0, BIT_ANT_PATH, path + 1); in rtw8822c_txgapk_read_offset()
1486 rtw_write32_mask(rtwdev, REG_TXLGMAP, MASKDWORD, 0xe4e40000); in rtw8822c_txgapk_read_offset()
1487 rtw_write32_mask(rtwdev, REG_TXANTSEG, BIT_ANTSEG, 0x3); in rtw8822c_txgapk_read_offset()
1488 rtw_write32_mask(rtwdev, path_setting[path], MASK20BITS, 0x33312); in rtw8822c_txgapk_read_offset()
1489 rtw_write32_mask(rtwdev, path_setting[path], BIT_PATH_EN, 0x1); in rtw8822c_txgapk_read_offset()
1490 rtw_write32_mask(rtwdev, set_pi[path], BITS_RFC_DIRECT, 0x0); in rtw8822c_txgapk_read_offset()
1493 rtw_write32_mask(rtwdev, REG_NCTL0, BIT_SEL_PATH, path); in rtw8822c_txgapk_read_offset()
1494 rtw_write32_mask(rtwdev, REG_IQKSTAT, MASKBYTE0, 0x0); in rtw8822c_txgapk_read_offset()
1496 rtw_write32_mask(rtwdev, REG_TX_TONE_IDX, MASKBYTE0, 0x018); in rtw8822c_txgapk_read_offset()
1499 rtw_write32_mask(rtwdev, REG_R_CONFIG, MASKBYTE0, BIT_2G_SWING); in rtw8822c_txgapk_read_offset()
1501 rtw_write32_mask(rtwdev, REG_R_CONFIG, MASKBYTE0, BIT_5G_SWING); in rtw8822c_txgapk_read_offset()
1504 rtw_write32_mask(rtwdev, REG_NCTL0, MASKDWORD, cfg1_1b00[path]); in rtw8822c_txgapk_read_offset()
1505 rtw_write32_mask(rtwdev, REG_NCTL0, MASKDWORD, cfg2_1b00[path]); in rtw8822c_txgapk_read_offset()
1511 rtw_write32_mask(rtwdev, set_pi[path], BITS_RFC_DIRECT, 0x2); in rtw8822c_txgapk_read_offset()
1512 rtw_write32_mask(rtwdev, REG_NCTL0, BIT_SEL_PATH, path); in rtw8822c_txgapk_read_offset()
1513 rtw_write32_mask(rtwdev, REG_RXSRAM_CTL, BIT_RPT_EN, 0x1); in rtw8822c_txgapk_read_offset()
1514 rtw_write32_mask(rtwdev, REG_RXSRAM_CTL, BIT_RPT_SEL, 0x12); in rtw8822c_txgapk_read_offset()
1515 rtw_write32_mask(rtwdev, REG_TX_GAIN_SET, BIT_GAPK_RPT_IDX, 0x3); in rtw8822c_txgapk_read_offset()
1527 rtw_write32_mask(rtwdev, REG_TX_GAIN_SET, BIT_GAPK_RPT_IDX, 0x4); in rtw8822c_txgapk_read_offset()
1558 rtw_write32_mask(rtwdev, in rtw8822c_txgapk_calculate_offset()
1560 rtw_write32_mask(rtwdev, REG_NCTL0, BIT_SEL_PATH, path); in rtw8822c_txgapk_calculate_offset()
1561 rtw_write32_mask(rtwdev, REG_R_CONFIG, BIT_IQ_SWITCH, 0x3f); in rtw8822c_txgapk_calculate_offset()
1562 rtw_write32_mask(rtwdev, REG_IQK_CTL1, BIT_TX_CFIR, 0x0); in rtw8822c_txgapk_calculate_offset()
1573 rtw_write32_mask(rtwdev, REG_IQKSTAT, MASKBYTE0, 0x00); in rtw8822c_txgapk_calculate_offset()
1574 rtw_write32_mask(rtwdev, REG_TABLE_SEL, BIT_Q_GAIN_SEL, 0x0); in rtw8822c_txgapk_calculate_offset()
1580 rtw_write32_mask(rtwdev, in rtw8822c_txgapk_calculate_offset()
1582 rtw_write32_mask(rtwdev, REG_NCTL0, BIT_SEL_PATH, path); in rtw8822c_txgapk_calculate_offset()
1583 rtw_write32_mask(rtwdev, REG_R_CONFIG, BIT_IQ_SWITCH, 0x3f); in rtw8822c_txgapk_calculate_offset()
1584 rtw_write32_mask(rtwdev, REG_IQK_CTL1, BIT_TX_CFIR, 0x0); in rtw8822c_txgapk_calculate_offset()
1598 rtw_write32_mask(rtwdev, REG_IQKSTAT, MASKBYTE0, 0x0); in rtw8822c_txgapk_calculate_offset()
1601 rtw_write32_mask(rtwdev, in rtw8822c_txgapk_calculate_offset()
1604 rtw_write32_mask(rtwdev, in rtw8822c_txgapk_calculate_offset()
1607 rtw_write32_mask(rtwdev, in rtw8822c_txgapk_calculate_offset()
1749 rtw_write32_mask(rtwdev, in rtw8822c_txgapk_save_all_tx_gain_table()
1774 rtw_write32_mask(rtwdev, in rtw8822c_txgapk_save_all_tx_gain_table()
1881 rtw_write32_mask(rtwdev, REG_DIS_DPD, DIS_DPD_MASK, DIS_DPD_RATEALL); in rtw8822c_phy_set_param()
1889 rtw_write32_mask(rtwdev, REG_ANAPAR_XTAL_0, 0xfffc00, in rtw8822c_phy_set_param()
2182 rtw_write32_mask(rtwdev, REG_RSTB, BIT_RSTB_3WIRE, 0x1); in rtw8822c_rstb_3wire()
2183 rtw_write32_mask(rtwdev, REG_ANAPAR_A, BIT_ANAPAR_UPDATE, 0x1); in rtw8822c_rstb_3wire()
2184 rtw_write32_mask(rtwdev, REG_ANAPAR_B, BIT_ANAPAR_UPDATE, 0x1); in rtw8822c_rstb_3wire()
2186 rtw_write32_mask(rtwdev, REG_RSTB, BIT_RSTB_3WIRE, 0x0); in rtw8822c_rstb_3wire()
2261 rtw_write32_mask(rtwdev, REG_RXIGI, 0x7f, igi - 2); in rtw8822c_toggle_igi()
2262 rtw_write32_mask(rtwdev, REG_RXIGI, 0x7f00, igi - 2); in rtw8822c_toggle_igi()
2263 rtw_write32_mask(rtwdev, REG_RXIGI, 0x7f, igi); in rtw8822c_toggle_igi()
2264 rtw_write32_mask(rtwdev, REG_RXIGI, 0x7f00, igi); in rtw8822c_toggle_igi()
2275 rtw_write32_mask(rtwdev, REG_CCAMSK, 0x3F000000, 0xF); in rtw8822c_set_channel_bb()
2279 rtw_write32_mask(rtwdev, REG_RXAGCCTL0, BITS_RXAGC_CCK, in rtw8822c_set_channel_bb()
2281 rtw_write32_mask(rtwdev, REG_RXAGCCTL, BITS_RXAGC_CCK, in rtw8822c_set_channel_bb()
2283 rtw_write32_mask(rtwdev, REG_RXAGCCTL0, BITS_RXAGC_OFDM, in rtw8822c_set_channel_bb()
2285 rtw_write32_mask(rtwdev, REG_RXAGCCTL, BITS_RXAGC_OFDM, in rtw8822c_set_channel_bb()
2289 rtw_write32_mask(rtwdev, REG_RXAGCCTL0, BITS_RXAGC_CCK, in rtw8822c_set_channel_bb()
2291 rtw_write32_mask(rtwdev, REG_RXAGCCTL, BITS_RXAGC_CCK, in rtw8822c_set_channel_bb()
2293 rtw_write32_mask(rtwdev, REG_RXAGCCTL0, BITS_RXAGC_OFDM, in rtw8822c_set_channel_bb()
2295 rtw_write32_mask(rtwdev, REG_RXAGCCTL, BITS_RXAGC_OFDM, in rtw8822c_set_channel_bb()
2300 rtw_write32_mask(rtwdev, REG_SCOTRK, 0xfff, 0x969); in rtw8822c_set_channel_bb()
2302 rtw_write32_mask(rtwdev, REG_SCOTRK, 0xfff, 0x96a); in rtw8822c_set_channel_bb()
2304 rtw_write32_mask(rtwdev, REG_SCOTRK, 0xfff, 0x9aa); in rtw8822c_set_channel_bb()
2306 rtw_write32_mask(rtwdev, REG_TXF0, MASKHWORD, 0x3da0); in rtw8822c_set_channel_bb()
2307 rtw_write32_mask(rtwdev, REG_TXF1, MASKDWORD, in rtw8822c_set_channel_bb()
2309 rtw_write32_mask(rtwdev, REG_TXF2, MASKLWORD, 0x6aa3); in rtw8822c_set_channel_bb()
2310 rtw_write32_mask(rtwdev, REG_TXF3, MASKHWORD, 0xaa7b); in rtw8822c_set_channel_bb()
2311 rtw_write32_mask(rtwdev, REG_TXF4, MASKLWORD, 0xf3d7); in rtw8822c_set_channel_bb()
2312 rtw_write32_mask(rtwdev, REG_TXF5, MASKDWORD, 0x0); in rtw8822c_set_channel_bb()
2313 rtw_write32_mask(rtwdev, REG_TXF6, MASKDWORD, in rtw8822c_set_channel_bb()
2315 rtw_write32_mask(rtwdev, REG_TXF7, MASKDWORD, 0xffff); in rtw8822c_set_channel_bb()
2317 rtw_write32_mask(rtwdev, REG_TXF0, MASKHWORD, 0x5284); in rtw8822c_set_channel_bb()
2318 rtw_write32_mask(rtwdev, REG_TXF1, MASKDWORD, in rtw8822c_set_channel_bb()
2320 rtw_write32_mask(rtwdev, REG_TXF2, MASKLWORD, 0x0a88); in rtw8822c_set_channel_bb()
2321 rtw_write32_mask(rtwdev, REG_TXF3, MASKHWORD, 0xacc4); in rtw8822c_set_channel_bb()
2322 rtw_write32_mask(rtwdev, REG_TXF4, MASKLWORD, 0xc8b2); in rtw8822c_set_channel_bb()
2323 rtw_write32_mask(rtwdev, REG_TXF5, MASKDWORD, in rtw8822c_set_channel_bb()
2325 rtw_write32_mask(rtwdev, REG_TXF6, MASKDWORD, in rtw8822c_set_channel_bb()
2327 rtw_write32_mask(rtwdev, REG_TXF7, MASKDWORD, in rtw8822c_set_channel_bb()
2331 rtw_write32_mask(rtwdev, REG_TXDFIR0, 0x70, 0x3); in rtw8822c_set_channel_bb()
2333 rtw_write32_mask(rtwdev, REG_TXDFIR0, 0x70, 0x1); in rtw8822c_set_channel_bb()
2339 rtw_write32_mask(rtwdev, REG_CCAMSK, 0x3F000000, 0x22); in rtw8822c_set_channel_bb()
2340 rtw_write32_mask(rtwdev, REG_TXDFIR0, 0x70, 0x3); in rtw8822c_set_channel_bb()
2342 rtw_write32_mask(rtwdev, REG_RXAGCCTL0, BITS_RXAGC_OFDM, in rtw8822c_set_channel_bb()
2344 rtw_write32_mask(rtwdev, REG_RXAGCCTL, BITS_RXAGC_OFDM, in rtw8822c_set_channel_bb()
2347 rtw_write32_mask(rtwdev, REG_RXAGCCTL0, BITS_RXAGC_OFDM, in rtw8822c_set_channel_bb()
2349 rtw_write32_mask(rtwdev, REG_RXAGCCTL, BITS_RXAGC_OFDM, in rtw8822c_set_channel_bb()
2352 rtw_write32_mask(rtwdev, REG_RXAGCCTL0, BITS_RXAGC_OFDM, in rtw8822c_set_channel_bb()
2354 rtw_write32_mask(rtwdev, REG_RXAGCCTL, BITS_RXAGC_OFDM, in rtw8822c_set_channel_bb()
2359 rtw_write32_mask(rtwdev, REG_SCOTRK, 0xfff, 0x494); in rtw8822c_set_channel_bb()
2361 rtw_write32_mask(rtwdev, REG_SCOTRK, 0xfff, 0x493); in rtw8822c_set_channel_bb()
2363 rtw_write32_mask(rtwdev, REG_SCOTRK, 0xfff, 0x453); in rtw8822c_set_channel_bb()
2365 rtw_write32_mask(rtwdev, REG_SCOTRK, 0xfff, 0x452); in rtw8822c_set_channel_bb()
2367 rtw_write32_mask(rtwdev, REG_SCOTRK, 0xfff, 0x412); in rtw8822c_set_channel_bb()
2369 rtw_write32_mask(rtwdev, REG_SCOTRK, 0xfff, 0x411); in rtw8822c_set_channel_bb()
2374 rtw_write32_mask(rtwdev, REG_DFIRBW, 0x3FF0, 0x19B); in rtw8822c_set_channel_bb()
2375 rtw_write32_mask(rtwdev, REG_TXBWCTL, 0xf, 0x0); in rtw8822c_set_channel_bb()
2376 rtw_write32_mask(rtwdev, REG_TXBWCTL, 0xffc0, 0x0); in rtw8822c_set_channel_bb()
2377 rtw_write32_mask(rtwdev, REG_TXCLK, 0x700, 0x7); in rtw8822c_set_channel_bb()
2378 rtw_write32_mask(rtwdev, REG_TXCLK, 0x700000, 0x6); in rtw8822c_set_channel_bb()
2379 rtw_write32_mask(rtwdev, REG_CCK_SOURCE, BIT_NBI_EN, 0x0); in rtw8822c_set_channel_bb()
2380 rtw_write32_mask(rtwdev, REG_SBD, BITS_SUBTUNE, 0x1); in rtw8822c_set_channel_bb()
2381 rtw_write32_mask(rtwdev, REG_PT_CHSMO, BIT_PT_OPT, 0x0); in rtw8822c_set_channel_bb()
2384 rtw_write32_mask(rtwdev, REG_CCKSB, BIT(4), in rtw8822c_set_channel_bb()
2386 rtw_write32_mask(rtwdev, REG_TXBWCTL, 0xf, 0x5); in rtw8822c_set_channel_bb()
2387 rtw_write32_mask(rtwdev, REG_TXBWCTL, 0xc0, 0x0); in rtw8822c_set_channel_bb()
2388 rtw_write32_mask(rtwdev, REG_TXBWCTL, 0xff00, in rtw8822c_set_channel_bb()
2390 rtw_write32_mask(rtwdev, REG_CCK_SOURCE, BIT_NBI_EN, 0x1); in rtw8822c_set_channel_bb()
2391 rtw_write32_mask(rtwdev, REG_SBD, BITS_SUBTUNE, 0x1); in rtw8822c_set_channel_bb()
2392 rtw_write32_mask(rtwdev, REG_PT_CHSMO, BIT_PT_OPT, 0x1); in rtw8822c_set_channel_bb()
2395 rtw_write32_mask(rtwdev, REG_TXBWCTL, 0xf, 0xa); in rtw8822c_set_channel_bb()
2396 rtw_write32_mask(rtwdev, REG_TXBWCTL, 0xc0, 0x0); in rtw8822c_set_channel_bb()
2397 rtw_write32_mask(rtwdev, REG_TXBWCTL, 0xff00, in rtw8822c_set_channel_bb()
2399 rtw_write32_mask(rtwdev, REG_SBD, BITS_SUBTUNE, 0x6); in rtw8822c_set_channel_bb()
2400 rtw_write32_mask(rtwdev, REG_PT_CHSMO, BIT_PT_OPT, 0x1); in rtw8822c_set_channel_bb()
2403 rtw_write32_mask(rtwdev, REG_DFIRBW, 0x3FF0, 0x2AB); in rtw8822c_set_channel_bb()
2404 rtw_write32_mask(rtwdev, REG_TXBWCTL, 0xf, 0x0); in rtw8822c_set_channel_bb()
2405 rtw_write32_mask(rtwdev, REG_TXBWCTL, 0xffc0, 0x1); in rtw8822c_set_channel_bb()
2406 rtw_write32_mask(rtwdev, REG_TXCLK, 0x700, 0x4); in rtw8822c_set_channel_bb()
2407 rtw_write32_mask(rtwdev, REG_TXCLK, 0x700000, 0x4); in rtw8822c_set_channel_bb()
2408 rtw_write32_mask(rtwdev, REG_CCK_SOURCE, BIT_NBI_EN, 0x0); in rtw8822c_set_channel_bb()
2409 rtw_write32_mask(rtwdev, REG_SBD, BITS_SUBTUNE, 0x1); in rtw8822c_set_channel_bb()
2410 rtw_write32_mask(rtwdev, REG_PT_CHSMO, BIT_PT_OPT, 0x0); in rtw8822c_set_channel_bb()
2413 rtw_write32_mask(rtwdev, REG_DFIRBW, 0x3FF0, 0x2AB); in rtw8822c_set_channel_bb()
2414 rtw_write32_mask(rtwdev, REG_TXBWCTL, 0xf, 0x0); in rtw8822c_set_channel_bb()
2415 rtw_write32_mask(rtwdev, REG_TXBWCTL, 0xffc0, 0x2); in rtw8822c_set_channel_bb()
2416 rtw_write32_mask(rtwdev, REG_TXCLK, 0x700, 0x6); in rtw8822c_set_channel_bb()
2417 rtw_write32_mask(rtwdev, REG_TXCLK, 0x700000, 0x5); in rtw8822c_set_channel_bb()
2418 rtw_write32_mask(rtwdev, REG_CCK_SOURCE, BIT_NBI_EN, 0x0); in rtw8822c_set_channel_bb()
2419 rtw_write32_mask(rtwdev, REG_SBD, BITS_SUBTUNE, 0x1); in rtw8822c_set_channel_bb()
2420 rtw_write32_mask(rtwdev, REG_PT_CHSMO, BIT_PT_OPT, 0x0); in rtw8822c_set_channel_bb()
2437 rtw_write32_mask(rtwdev, REG_CCANRX, 0x00060000, 0x0); in rtw8822c_config_cck_rx_path()
2438 rtw_write32_mask(rtwdev, REG_CCANRX, 0x00600000, 0x0); in rtw8822c_config_cck_rx_path()
2440 rtw_write32_mask(rtwdev, REG_CCANRX, 0x00600000, 0x1); in rtw8822c_config_cck_rx_path()
2441 rtw_write32_mask(rtwdev, REG_CCANRX, 0x00060000, 0x1); in rtw8822c_config_cck_rx_path()
2445 rtw_write32_mask(rtwdev, REG_RXCCKSEL, 0x0f000000, 0x0); in rtw8822c_config_cck_rx_path()
2447 rtw_write32_mask(rtwdev, REG_RXCCKSEL, 0x0f000000, 0x5); in rtw8822c_config_cck_rx_path()
2449 rtw_write32_mask(rtwdev, REG_RXCCKSEL, 0x0f000000, 0x1); in rtw8822c_config_cck_rx_path()
2455 rtw_write32_mask(rtwdev, REG_RXFNCTL, 0x300, 0x0); in rtw8822c_config_ofdm_rx_path()
2456 rtw_write32_mask(rtwdev, REG_RXFNCTL, 0x600000, 0x0); in rtw8822c_config_ofdm_rx_path()
2457 rtw_write32_mask(rtwdev, REG_AGCSWSH, BIT(17), 0x0); in rtw8822c_config_ofdm_rx_path()
2458 rtw_write32_mask(rtwdev, REG_ANTWTPD, BIT(20), 0x0); in rtw8822c_config_ofdm_rx_path()
2459 rtw_write32_mask(rtwdev, REG_MRCM, BIT(24), 0x0); in rtw8822c_config_ofdm_rx_path()
2461 rtw_write32_mask(rtwdev, REG_RXFNCTL, 0x300, 0x1); in rtw8822c_config_ofdm_rx_path()
2462 rtw_write32_mask(rtwdev, REG_RXFNCTL, 0x600000, 0x1); in rtw8822c_config_ofdm_rx_path()
2463 rtw_write32_mask(rtwdev, REG_AGCSWSH, BIT(17), 0x1); in rtw8822c_config_ofdm_rx_path()
2464 rtw_write32_mask(rtwdev, REG_ANTWTPD, BIT(20), 0x1); in rtw8822c_config_ofdm_rx_path()
2465 rtw_write32_mask(rtwdev, REG_MRCM, BIT(24), 0x1); in rtw8822c_config_ofdm_rx_path()
2468 rtw_write32_mask(rtwdev, 0x824, 0x0f000000, rx_path); in rtw8822c_config_ofdm_rx_path()
2469 rtw_write32_mask(rtwdev, 0x824, 0x000f0000, rx_path); in rtw8822c_config_ofdm_rx_path()
2482 rtw_write32_mask(rtwdev, REG_RXCCKSEL, 0xf0000000, 0x8); in rtw8822c_config_cck_tx_path()
2484 rtw_write32_mask(rtwdev, REG_RXCCKSEL, 0xf0000000, 0x4); in rtw8822c_config_cck_tx_path()
2487 rtw_write32_mask(rtwdev, REG_RXCCKSEL, 0xf0000000, 0xc); in rtw8822c_config_cck_tx_path()
2489 rtw_write32_mask(rtwdev, REG_RXCCKSEL, 0xf0000000, 0x8); in rtw8822c_config_cck_tx_path()
2498 rtw_write32_mask(rtwdev, REG_ANTMAP0, 0xff, 0x11); in rtw8822c_config_ofdm_tx_path()
2499 rtw_write32_mask(rtwdev, REG_TXLGMAP, 0xff, 0x0); in rtw8822c_config_ofdm_tx_path()
2501 rtw_write32_mask(rtwdev, REG_ANTMAP0, 0xff, 0x12); in rtw8822c_config_ofdm_tx_path()
2502 rtw_write32_mask(rtwdev, REG_TXLGMAP, 0xff, 0x0); in rtw8822c_config_ofdm_tx_path()
2505 rtw_write32_mask(rtwdev, REG_ANTMAP0, 0xff, 0x33); in rtw8822c_config_ofdm_tx_path()
2506 rtw_write32_mask(rtwdev, REG_TXLGMAP, 0xffff, 0x0404); in rtw8822c_config_ofdm_tx_path()
2508 rtw_write32_mask(rtwdev, REG_ANTMAP0, 0xff, 0x32); in rtw8822c_config_ofdm_tx_path()
2509 rtw_write32_mask(rtwdev, REG_TXLGMAP, 0xffff, 0x0400); in rtw8822c_config_ofdm_tx_path()
2511 rtw_write32_mask(rtwdev, REG_ANTMAP0, 0xff, 0x31); in rtw8822c_config_ofdm_tx_path()
2512 rtw_write32_mask(rtwdev, REG_TXLGMAP, 0xffff, 0x0400); in rtw8822c_config_ofdm_tx_path()
2532 rtw_write32_mask(rtwdev, REG_ORITXCODE, MASK20BITS, 0x33312); in rtw8822c_config_trx_mode()
2534 rtw_write32_mask(rtwdev, REG_ORITXCODE, MASK20BITS, 0x11111); in rtw8822c_config_trx_mode()
2536 rtw_write32_mask(rtwdev, REG_ORITXCODE2, MASK20BITS, 0x33312); in rtw8822c_config_trx_mode()
2538 rtw_write32_mask(rtwdev, REG_ORITXCODE2, MASK20BITS, 0x11111); in rtw8822c_config_trx_mode()
2741 rtw_write32_mask(rtwdev, 0x1c90, BIT(15), 0); in rtw8822c_set_write_tx_power_ref()
2742 rtw_write32_mask(rtwdev, txref_cck[path], 0x7f0000, in rtw8822c_set_write_tx_power_ref()
2746 rtw_write32_mask(rtwdev, 0x1c90, BIT(15), 0); in rtw8822c_set_write_tx_power_ref()
2747 rtw_write32_mask(rtwdev, txref_ofdm[path], 0x1fc00, in rtw8822c_set_write_tx_power_ref()
2769 rtw_write32_mask(rtwdev, 0x1c90, BIT(15), 0x0); in rtw8822c_set_tx_power_diff()
2770 rtw_write32_mask(rtwdev, offset_txagc + rate_idx, MASKDWORD, in rtw8822c_set_tx_power_diff()
2908 rtw_write32_mask(rtwdev, REG_CCANRX, BIT_CCK_FA_RST, 0); in rtw8822c_false_alarm_statistics()
2909 rtw_write32_mask(rtwdev, REG_CCANRX, BIT_CCK_FA_RST, 2); in rtw8822c_false_alarm_statistics()
2910 rtw_write32_mask(rtwdev, REG_CCANRX, BIT_OFDM_FA_RST, 0); in rtw8822c_false_alarm_statistics()
2911 rtw_write32_mask(rtwdev, REG_CCANRX, BIT_OFDM_FA_RST, 2); in rtw8822c_false_alarm_statistics()
3205 rtw_write32_mask(rtwdev, p->addr, p->bitmask, p->data); in rtw8822c_parse_tbl_dpk()
3215 rtw_write32_mask(rtwdev, 0x70, BIT(26), 0x1); in rtw8822c_dpk_set_gnt_wl()
3229 rtw_write32_mask(rtwdev, REG_NCTL0, BIT_SUBPAGE, 0xc); in rtw8822c_dpk_restore_registers()
3230 rtw_write32_mask(rtwdev, REG_RXSRAM_CTL, BIT_DPD_CLK, 0x4); in rtw8822c_dpk_restore_registers()
3328 rtw_write32_mask(rtwdev, 0x1e70, 0xf, 0x2); in rtw8822c_dpk_tx_pause()
3363 rtw_write32_mask(rtwdev, REG_DPD_LUT0, BIT_GLOSS_DB, 0x4); in rtw8822c_dpk_pre_setting()
3364 rtw_write32_mask(rtwdev, REG_IQK_CTL1, BIT_TX_CFIR, 0x3); in rtw8822c_dpk_pre_setting()
3366 rtw_write32_mask(rtwdev, REG_NCTL0, BIT_SUBPAGE, 0xc); in rtw8822c_dpk_pre_setting()
3442 rtw_write32_mask(rtwdev, REG_DPD_CTL0, BIT(12), 0x1); in rtw8822c_dpk_one_shot()
3443 rtw_write32_mask(rtwdev, REG_DPD_CTL0, BIT(12), 0x0); in rtw8822c_dpk_one_shot()
3444 rtw_write32_mask(rtwdev, REG_RXSRAM_CTL, BIT_RPT_SEL, 0x0); in rtw8822c_dpk_one_shot()
3451 rtw_write32_mask(rtwdev, REG_NCTL0, BIT_SUBPAGE, in rtw8822c_dpk_one_shot()
3453 rtw_write32_mask(rtwdev, REG_R_CONFIG, BIT_IQ_SWITCH, 0x9); in rtw8822c_dpk_one_shot()
3463 rtw_write32_mask(rtwdev, REG_NCTL0, BIT_SUBPAGE, in rtw8822c_dpk_one_shot()
3465 rtw_write32_mask(rtwdev, REG_R_CONFIG, BIT_IQ_SWITCH, 0x0); in rtw8822c_dpk_one_shot()
3479 rtw_write32_mask(rtwdev, REG_NCTL0, BIT_SUBPAGE, 0xc); in rtw8822c_dpk_dgain_read()
3480 rtw_write32_mask(rtwdev, REG_RXSRAM_CTL, 0x00ff0000, 0x0); in rtw8822c_dpk_dgain_read()
3502 rtw_write32_mask(rtwdev, 0x1b48, BIT(14), 0x0); in rtw8822c_dpk_pas_read()
3550 rtw_write32_mask(rtwdev, REG_NCTL0, BIT_SUBPAGE, 0x8 | (path << 1)); in rtw8822c_dpk_gainloss_result()
3551 rtw_write32_mask(rtwdev, 0x1b48, BIT(14), 0x1); in rtw8822c_dpk_gainloss_result()
3556 rtw_write32_mask(rtwdev, 0x1b48, BIT(14), 0x0); in rtw8822c_dpk_gainloss_result()
3786 rtw_write32_mask(rtwdev, REG_DPD_CTL0, BIT(24), 0x0); in rtw8822c_dpk_get_coef()
3789 rtw_write32_mask(rtwdev, REG_DPD_CTL0, BIT(24), 0x1); in rtw8822c_dpk_get_coef()
3842 rtw_write32_mask(rtwdev, REG_NCTL0, BIT_SUBPAGE, 0x8 | (path << 1)); in rtw8822c_dpk_fill_result()
3899 rtw_write32_mask(rtwdev, REG_NCTL0, BIT_SUBPAGE, 0x8 | (path << 1)); in rtw8822c_dpk_by_path()
3915 rtw_write32_mask(rtwdev, REG_NCTL0, BIT_SUBPAGE, 0x8 | (path << 1)); in rtw8822c_dpk_cal_gs()
3916 rtw_write32_mask(rtwdev, REG_IQK_CTL1, BIT_BYPASS_DPD, 0x0); in rtw8822c_dpk_cal_gs()
3917 rtw_write32_mask(rtwdev, REG_IQK_CTL1, BIT_TX_CFIR, 0x0); in rtw8822c_dpk_cal_gs()
3918 rtw_write32_mask(rtwdev, REG_R_CONFIG, BIT_IQ_SWITCH, 0x9); in rtw8822c_dpk_cal_gs()
3919 rtw_write32_mask(rtwdev, REG_R_CONFIG, BIT_INNER_LB, 0x1); in rtw8822c_dpk_cal_gs()
3920 rtw_write32_mask(rtwdev, REG_NCTL0, BIT_SUBPAGE, 0xc); in rtw8822c_dpk_cal_gs()
3921 rtw_write32_mask(rtwdev, REG_RXSRAM_CTL, BIT_DPD_CLK, 0xf); in rtw8822c_dpk_cal_gs()
3924 rtw_write32_mask(rtwdev, REG_DPD_CTL0_S0, BIT_GS_PWSF, in rtw8822c_dpk_cal_gs()
3926 rtw_write32_mask(rtwdev, REG_DPD_CTL1_S0, BIT_DPD_EN, 0x1); in rtw8822c_dpk_cal_gs()
3928 rtw_write32_mask(rtwdev, REG_DPD_CTL0_S1, BIT_GS_PWSF, in rtw8822c_dpk_cal_gs()
3930 rtw_write32_mask(rtwdev, REG_DPD_CTL1_S1, BIT_DPD_EN, 0x1); in rtw8822c_dpk_cal_gs()
3951 rtw_write32_mask(rtwdev, REG_DPD_CTL0, MASKBYTE3, 0x8 | path); in rtw8822c_dpk_cal_gs()
3955 rtw_write32_mask(rtwdev, REG_DPD_CTL15, MASKBYTE3, 0x0); in rtw8822c_dpk_cal_gs()
3956 rtw_write32_mask(rtwdev, REG_NCTL0, BIT_SUBPAGE, 0x8 | (path << 1)); in rtw8822c_dpk_cal_gs()
3957 rtw_write32_mask(rtwdev, REG_R_CONFIG, BIT_IQ_SWITCH, 0x0); in rtw8822c_dpk_cal_gs()
3958 rtw_write32_mask(rtwdev, REG_R_CONFIG, BIT_INNER_LB, 0x0); in rtw8822c_dpk_cal_gs()
3959 rtw_write32_mask(rtwdev, REG_NCTL0, BIT_SUBPAGE, 0xc); in rtw8822c_dpk_cal_gs()
3962 rtw_write32_mask(rtwdev, REG_DPD_CTL0_S0, BIT_GS_PWSF, 0x5b); in rtw8822c_dpk_cal_gs()
3964 rtw_write32_mask(rtwdev, REG_DPD_CTL0_S1, BIT_GS_PWSF, 0x5b); in rtw8822c_dpk_cal_gs()
3966 rtw_write32_mask(rtwdev, REG_RXSRAM_CTL, BIT_RPT_SEL, 0x0); in rtw8822c_dpk_cal_gs()
3973 rtw_write32_mask(rtwdev, REG_DPD_CTL0_S0, BIT_GS_PWSF, tmp_gs); in rtw8822c_dpk_cal_gs()
3975 rtw_write32_mask(rtwdev, REG_DPD_CTL0_S1, BIT_GS_PWSF, tmp_gs); in rtw8822c_dpk_cal_gs()
3987 rtw_write32_mask(rtwdev, REG_NCTL0, BIT_SUBPAGE, 0x0000000c); in rtw8822c_dpk_cal_coef1()
3995 rtw_write32_mask(rtwdev, REG_NCTL0, BIT_SUBPAGE, 0x0000000c); in rtw8822c_dpk_cal_coef1()
4000 rtw_write32_mask(rtwdev, 0x1b18 + offset[path], MASKHWORD, in rtw8822c_dpk_cal_coef1()
4002 rtw_write32_mask(rtwdev, REG_DPD_CTL0_S0 + offset[path], in rtw8822c_dpk_cal_coef1()
4004 rtw_write32_mask(rtwdev, REG_DPD_CTL0_S0 + offset[path], in rtw8822c_dpk_cal_coef1()
4006 rtw_write32_mask(rtwdev, REG_DPD_CTL0_S0 + offset[path], in rtw8822c_dpk_cal_coef1()
4008 rtw_write32_mask(rtwdev, REG_DPD_CTL1_S0 + offset[path], in rtw8822c_dpk_cal_coef1()
4019 rtw_write32_mask(rtwdev, REG_NCTL0, BIT_SUBPAGE, 0x8 | (path << 1)); in rtw8822c_dpk_on()
4020 rtw_write32_mask(rtwdev, REG_IQK_CTL1, BIT_TX_CFIR, 0x0); in rtw8822c_dpk_on()
4052 rtw_write32_mask(rtwdev, REG_NCTL0, BIT_SUBPAGE, in rtw8822c_dpk_result_reset()
4054 rtw_write32_mask(rtwdev, 0x1b58, 0x0000007f, 0x0); in rtw8822c_dpk_result_reset()
4100 rtw_write32_mask(rtwdev, REG_NCTL0, BIT_SUBPAGE, 0xc); in rtw8822c_dpk_enable_disable()
4102 rtw_write32_mask(rtwdev, REG_DPD_CTL1_S0, BIT_DPD_EN, in rtw8822c_dpk_enable_disable()
4104 rtw_write32_mask(rtwdev, REG_DPD_CTL1_S1, BIT_DPD_EN, in rtw8822c_dpk_enable_disable()
4108 rtw_write32_mask(rtwdev, REG_DPD_CTL1_S0, mask, 0x0); in rtw8822c_dpk_enable_disable()
4112 rtw_write32_mask(rtwdev, REG_DPD_CTL1_S1, mask, 0x0); in rtw8822c_dpk_enable_disable()
4128 rtw_write32_mask(rtwdev, REG_NCTL0, BIT_SUBPAGE, in rtw8822c_dpk_reload_data()
4142 rtw_write32_mask(rtwdev, REG_NCTL0, BIT_SUBPAGE, 0xc); in rtw8822c_dpk_reload_data()
4145 rtw_write32_mask(rtwdev, REG_DPD_CTL0_S0, BIT_GS_PWSF, in rtw8822c_dpk_reload_data()
4148 rtw_write32_mask(rtwdev, REG_DPD_CTL0_S1, BIT_GS_PWSF, in rtw8822c_dpk_reload_data()
4247 rtw_write32_mask(rtwdev, REG_NCTL0, BIT_SUBPAGE, in rtw8822c_dpk_track()
4249 rtw_write32_mask(rtwdev, 0x1b58, GENMASK(6, 0), in rtw8822c_dpk_track()
4265 rtw_write32_mask(rtwdev, REG_ANAPAR_XTAL_0, BIT_XCAP_0, val); in rtw8822c_set_crystal_cap_reg()
4417 rtw_write32_mask(rtwdev, in rtw8822c_phy_cck_pd_set_reg()
4421 rtw_write32_mask(rtwdev, in rtw8822c_phy_cck_pd_set_reg()
4468 rtw_write32_mask(rtwdev, 0x18a0, PWR_TRACK_MASK, in rtw8822c_pwrtrack_set()
4472 rtw_write32_mask(rtwdev, 0x41a0, PWR_TRACK_MASK, in rtw8822c_pwrtrack_set()