189 	rtw_write32_mask(rtwdev, REG_AFE_XTAL_CTRL, 0x7e000000, crystal_cap);  in rtw8821c_phy_set_param()
190 	rtw_write32_mask(rtwdev, REG_AFE_PLL_CTRL, 0x7e, crystal_cap);  in rtw8821c_phy_set_param()
191 	rtw_write32_mask(rtwdev, REG_CCK0_FAREPORT, BIT(18) | BIT(22), 0);  in rtw8821c_phy_set_param()
289 		rtw_write32_mask(rtwdev, REG_ENRXCCA, MASKBYTE2, BTG_CCA);  in rtw8821c_switch_rf_set()
290 		rtw_write32_mask(rtwdev, REG_ENTXCCK, MASKLWORD, BTG_LNA);  in rtw8821c_switch_rf_set()
295 		rtw_write32_mask(rtwdev, REG_ENRXCCA, MASKBYTE2, WLG_CCA);  in rtw8821c_switch_rf_set()
296 		rtw_write32_mask(rtwdev, REG_ENTXCCK, MASKLWORD, WLG_LNA);  in rtw8821c_switch_rf_set()
365 		rtw_write32_mask(rtwdev, REG_ACBB0, BIT(29) | BIT(28), 0x2);  in rtw8821c_set_channel_rxdfir()
366 		rtw_write32_mask(rtwdev, REG_ACBBRXFIR, BIT(29) | BIT(28), 0x2);  in rtw8821c_set_channel_rxdfir()
367 		rtw_write32_mask(rtwdev, REG_TXDFIR, BIT(31), 0x0);  in rtw8821c_set_channel_rxdfir()
368 		rtw_write32_mask(rtwdev, REG_CHFIR, BIT(31), 0x0);  in rtw8821c_set_channel_rxdfir()
371 		rtw_write32_mask(rtwdev, REG_ACBB0, BIT(29) | BIT(28), 0x2);  in rtw8821c_set_channel_rxdfir()
372 		rtw_write32_mask(rtwdev, REG_ACBBRXFIR, BIT(29) | BIT(28), 0x1);  in rtw8821c_set_channel_rxdfir()
373 		rtw_write32_mask(rtwdev, REG_TXDFIR, BIT(31), 0x0);  in rtw8821c_set_channel_rxdfir()
374 		rtw_write32_mask(rtwdev, REG_CHFIR, BIT(31), 0x1);  in rtw8821c_set_channel_rxdfir()
377 		rtw_write32_mask(rtwdev, REG_ACBB0, BIT(29) | BIT(28), 0x2);  in rtw8821c_set_channel_rxdfir()
378 		rtw_write32_mask(rtwdev, REG_ACBBRXFIR, BIT(29) | BIT(28), 0x2);  in rtw8821c_set_channel_rxdfir()
379 		rtw_write32_mask(rtwdev, REG_TXDFIR, BIT(31), 0x1);  in rtw8821c_set_channel_rxdfir()
380 		rtw_write32_mask(rtwdev, REG_CHFIR, BIT(31), 0x0);  in rtw8821c_set_channel_rxdfir()
391 		rtw_write32_mask(rtwdev, REG_RXPSEL, BIT(28), 0x1);  in rtw8821c_set_channel_bb()
392 		rtw_write32_mask(rtwdev, REG_CCK_CHECK, BIT(7), 0x0);  in rtw8821c_set_channel_bb()
393 		rtw_write32_mask(rtwdev, REG_ENTXCCK, BIT(18), 0x0);  in rtw8821c_set_channel_bb()
394 		rtw_write32_mask(rtwdev, REG_RXCCAMSK, 0x0000FC00, 15);  in rtw8821c_set_channel_bb()
396 		rtw_write32_mask(rtwdev, REG_TXSCALE_A, 0xf00, 0x0);  in rtw8821c_set_channel_bb()
397 		rtw_write32_mask(rtwdev, REG_CLKTRK, 0x1ffe0000, 0x96a);  in rtw8821c_set_channel_bb()
399 			rtw_write32_mask(rtwdev, REG_TXSF2, MASKDWORD, 0x0000b81c);  in rtw8821c_set_channel_bb()
400 			rtw_write32_mask(rtwdev, REG_TXSF6, MASKLWORD, 0x0000);  in rtw8821c_set_channel_bb()
401 			rtw_write32_mask(rtwdev, REG_TXFILTER, MASKDWORD, 0x00003667);  in rtw8821c_set_channel_bb()
403 			rtw_write32_mask(rtwdev, REG_TXSF2, MASKDWORD,  in rtw8821c_set_channel_bb()
405 			rtw_write32_mask(rtwdev, REG_TXSF6, MASKLWORD,  in rtw8821c_set_channel_bb()
407 			rtw_write32_mask(rtwdev, REG_TXFILTER, MASKDWORD,  in rtw8821c_set_channel_bb()
411 		rtw_write32_mask(rtwdev, REG_ENTXCCK, BIT(18), 0x1);  in rtw8821c_set_channel_bb()
412 		rtw_write32_mask(rtwdev, REG_CCK_CHECK, BIT(7), 0x1);  in rtw8821c_set_channel_bb()
413 		rtw_write32_mask(rtwdev, REG_RXPSEL, BIT(28), 0x0);  in rtw8821c_set_channel_bb()
414 		rtw_write32_mask(rtwdev, REG_RXCCAMSK, 0x0000FC00, 15);  in rtw8821c_set_channel_bb()
417 			rtw_write32_mask(rtwdev, REG_TXSCALE_A, 0xf00, 0x1);  in rtw8821c_set_channel_bb()
419 			rtw_write32_mask(rtwdev, REG_TXSCALE_A, 0xf00, 0x2);  in rtw8821c_set_channel_bb()
421 			rtw_write32_mask(rtwdev, REG_TXSCALE_A, 0xf00, 0x3);  in rtw8821c_set_channel_bb()
424 			rtw_write32_mask(rtwdev, REG_CLKTRK, 0x1ffe0000, 0x494);  in rtw8821c_set_channel_bb()
426 			rtw_write32_mask(rtwdev, REG_CLKTRK, 0x1ffe0000, 0x453);  in rtw8821c_set_channel_bb()
428 			rtw_write32_mask(rtwdev, REG_CLKTRK, 0x1ffe0000, 0x452);  in rtw8821c_set_channel_bb()
430 			rtw_write32_mask(rtwdev, REG_CLKTRK, 0x1ffe0000, 0x412);  in rtw8821c_set_channel_bb()
439 		rtw_write32_mask(rtwdev, REG_ADCCLK, MASKDWORD, val32);  in rtw8821c_set_channel_bb()
441 		rtw_write32_mask(rtwdev, REG_ADC160, BIT(30), 0x1);  in rtw8821c_set_channel_bb()
453 		rtw_write32_mask(rtwdev, REG_ADCCLK, MASKDWORD, val32);  in rtw8821c_set_channel_bb()
455 		rtw_write32_mask(rtwdev, REG_ADC160, BIT(30), 0x1);  in rtw8821c_set_channel_bb()
462 		rtw_write32_mask(rtwdev, REG_ADCCLK, MASKDWORD, val32);  in rtw8821c_set_channel_bb()
464 		rtw_write32_mask(rtwdev, REG_ADC160, BIT(30), 0x1);  in rtw8821c_set_channel_bb()
470 		rtw_write32_mask(rtwdev, REG_ADCCLK, MASKDWORD, val32);  in rtw8821c_set_channel_bb()
472 		rtw_write32_mask(rtwdev, REG_ADC160, BIT(30), 0x0);  in rtw8821c_set_channel_bb()
473 		rtw_write32_mask(rtwdev, REG_ADC40, BIT(31), 0x1);  in rtw8821c_set_channel_bb()
479 		rtw_write32_mask(rtwdev, REG_ADCCLK, MASKDWORD, val32);  in rtw8821c_set_channel_bb()
481 		rtw_write32_mask(rtwdev, REG_ADC160, BIT(30), 0x0);  in rtw8821c_set_channel_bb()
482 		rtw_write32_mask(rtwdev, REG_ADC40, BIT(31), 0x1);  in rtw8821c_set_channel_bb()
504 	rtw_write32_mask(rtwdev, REG_TXSCALE_A, GENMASK(31, 21),  in rtw8821c_set_channel_bb_swing()
858 		rtw_write32_mask(rtwdev, REG_RFE_CTRL8, BIT_MASK_R_RFE_SEL_15,  in rtw8821c_coex_cfg_ant_switch()
869 		rtw_write32_mask(rtwdev, REG_RFE_CTRL8, BIT_MASK_R_RFE_SEL_15,  in rtw8821c_coex_cfg_ant_switch()
1037 	rtw_write32_mask(rtwdev, REG_TXAGCIDX, GENMASK(6, 1), txagc_idx);  in rtw8821c_pwrtrack_set_pwr()
1038 	rtw_write32_mask(rtwdev, REG_TXSCALE_A, GENMASK(31, 21),  in rtw8821c_pwrtrack_set_pwr()
1178 	rtw_write32_mask(rtwdev, REG_PWRTH, 0x3f0000, pd[new_lvl]);  in rtw8821c_phy_cck_pd_set()
1179 	rtw_write32_mask(rtwdev, REG_PWRTH2, 0x1f0000,  in rtw8821c_phy_cck_pd_set()