169 	rtw_write32(rtwdev, REG_BAR_MODE_CTRL, WLAN_BAR_VAL);  in rtw8723d_phy_set_param()
189 	rtw_write32(rtwdev, REG_LTR_IDLE_LATENCY, WLAN_LTR_IDLE_LAT);  in rtw8723d_phy_set_param()
190 	rtw_write32(rtwdev, REG_LTR_ACTIVE_LATENCY, WLAN_LTR_ACT_LAT);  in rtw8723d_phy_set_param()
191 	rtw_write32(rtwdev, REG_LTR_CTRL_BASIC, WLAN_LTR_CTRL1);  in rtw8723d_phy_set_param()
192 	rtw_write32(rtwdev, REG_LTR_CTRL_BASIC + 4, WLAN_LTR_CTRL2);  in rtw8723d_phy_set_param()
396 	rtw_write32(rtwdev, REG_ANALOG_P4, DIS_3WIRE);  in rtw8723d_check_spur_ov_thres()
397 	rtw_write32(rtwdev, REG_PSDFN, freq);  in rtw8723d_check_spur_ov_thres()
398 	rtw_write32(rtwdev, REG_PSDFN, START_PSD | freq);  in rtw8723d_check_spur_ov_thres()
404 	rtw_write32(rtwdev, REG_PSDFN, freq);  in rtw8723d_check_spur_ov_thres()
405 	rtw_write32(rtwdev, REG_ANALOG_P4, EN_3WIRE);  in rtw8723d_check_spur_ov_thres()
415 		rtw_write32(rtwdev, REG_OFDM1_CSI1, 0x00000000);  in rtw8723d_cfg_notch()
416 		rtw_write32(rtwdev, REG_OFDM1_CSI2, 0x00000000);  in rtw8723d_cfg_notch()
417 		rtw_write32(rtwdev, REG_OFDM1_CSI3, 0x00000000);  in rtw8723d_cfg_notch()
418 		rtw_write32(rtwdev, REG_OFDM1_CSI4, 0x00000000);  in rtw8723d_cfg_notch()
427 		rtw_write32(rtwdev, REG_OFDM1_CSI1, 0x04000000);  in rtw8723d_cfg_notch()
428 		rtw_write32(rtwdev, REG_OFDM1_CSI2, 0x00000000);  in rtw8723d_cfg_notch()
429 		rtw_write32(rtwdev, REG_OFDM1_CSI3, 0x00000000);  in rtw8723d_cfg_notch()
430 		rtw_write32(rtwdev, REG_OFDM1_CSI4, 0x00000000);  in rtw8723d_cfg_notch()
436 		rtw_write32(rtwdev, REG_OFDM1_CSI1, 0x00000000);  in rtw8723d_cfg_notch()
437 		rtw_write32(rtwdev, REG_OFDM1_CSI2, 0x00000000);  in rtw8723d_cfg_notch()
438 		rtw_write32(rtwdev, REG_OFDM1_CSI3, 0x00000000);  in rtw8723d_cfg_notch()
439 		rtw_write32(rtwdev, REG_OFDM1_CSI4, 0x00080000);  in rtw8723d_cfg_notch()
514 		rtw_write32(rtwdev, cck_dfir->reg, cck_dfir->val);  in rtw8723d_set_channel_bb()
556 	rtw_write32(rtwdev, REG_TCR, BIT_TCR_CFG);  in rtw8723d_mac_init()
561 	rtw_write32(rtwdev, REG_RCR, WLAN_RCR_CFG);  in rtw8723d_mac_init()
563 	rtw_write32(rtwdev, REG_INT_MIG, 0);  in rtw8723d_mac_init()
564 	rtw_write32(rtwdev, REG_MCUTST_1, 0x0);  in rtw8723d_mac_init()
765 		rtw_write32(rtwdev, iqk_adda_regs[i], backup->adda[i]);  in rtw8723d_iqk_restore_regs()
770 		rtw_write32(rtwdev, iqk_mac32_regs[i], backup->mac32[i]);  in rtw8723d_iqk_restore_regs()
773 		rtw_write32(rtwdev, iqk_bb_regs[i], backup->bb[i]);  in rtw8723d_iqk_restore_regs()
781 	rtw_write32(rtwdev, REG_TXIQK_TONE_A_11N, 0x01008c00);  in rtw8723d_iqk_restore_regs()
782 	rtw_write32(rtwdev, REG_RXIQK_TONE_A_11N, 0x01008c00);  in rtw8723d_iqk_restore_regs()
812 	rtw_write32(rtwdev, REG_LTECOEX_CTRL, 0x800f0038);  in rtw8723d_iqk_backup_lte_path_gnt()
821 	rtw_write32(rtwdev, REG_LTECOEX_WRITE_DATA, 0x0000ff00);  in rtw8723d_iqk_config_lte_path_gnt()
822 	rtw_write32(rtwdev, REG_LTECOEX_CTRL, 0xc0020038);  in rtw8723d_iqk_config_lte_path_gnt()
829 	rtw_write32(rtwdev, REG_LTECOEX_WRITE_DATA, bak->lte_gnt);  in rtw8723d_iqk_restore_lte_path_gnt()
830 	rtw_write32(rtwdev, REG_LTECOEX_CTRL, 0xc00f0038);  in rtw8723d_iqk_restore_lte_path_gnt()
831 	rtw_write32(rtwdev, REG_LTECOEX_PATH_CONTROL, bak->lte_path);  in rtw8723d_iqk_restore_lte_path_gnt()
942 	rtw_write32(rtwdev, REG_LTECOEX_CTRL, 0x800f0054);  in rtw8723d_iqk_one_shot()
952 	rtw_write32(rtwdev, REG_IQK_AGC_PTS_11N, pts);  in rtw8723d_iqk_one_shot()
953 	rtw_write32(rtwdev, REG_IQK_AGC_PTS_11N, 0xf8000000);  in rtw8723d_iqk_one_shot()
965 	rtw_write32(rtwdev, REG_BB_SEL_BTG, backup->bb_sel_btg);  in rtw8723d_iqk_txrx_path_post()
986 	rtw_write32(rtwdev, REG_BB_SEL_BTG, iqk_cfg->val_bb_sel_btg);  in rtw8723d_iqk_tx_path()
996 	rtw_write32(rtwdev, REG_TXIQK_TONE_A_11N, 0x08008c0c);  in rtw8723d_iqk_tx_path()
997 	rtw_write32(rtwdev, REG_RXIQK_TONE_A_11N, 0x38008c1c);  in rtw8723d_iqk_tx_path()
998 	rtw_write32(rtwdev, REG_TXIQK_PI_A_11N, iqk_cfg->val_txiqk_pi);  in rtw8723d_iqk_tx_path()
999 	rtw_write32(rtwdev, REG_RXIQK_PI_A_11N, 0x28160200);  in rtw8723d_iqk_tx_path()
1000 	rtw_write32(rtwdev, REG_TXIQK_11N, 0x01007c00);  in rtw8723d_iqk_tx_path()
1001 	rtw_write32(rtwdev, REG_RXIQK_11N, 0x01004800);  in rtw8723d_iqk_tx_path()
1004 	rtw_write32(rtwdev, REG_IQK_AGC_RSP_11N, 0x00462911);  in rtw8723d_iqk_tx_path()
1046 	rtw_write32(rtwdev, REG_BB_SEL_BTG, iqk_cfg->val_bb_sel_btg);  in rtw8723d_iqk_rx_path()
1051 	rtw_write32(rtwdev, REG_TXIQK_11N, 0x01007c00);  in rtw8723d_iqk_rx_path()
1052 	rtw_write32(rtwdev, REG_RXIQK_11N, 0x01004800);  in rtw8723d_iqk_rx_path()
1055 	rtw_write32(rtwdev, REG_TXIQK_TONE_A_11N, 0x18008c1c);  in rtw8723d_iqk_rx_path()
1056 	rtw_write32(rtwdev, REG_RXIQK_TONE_A_11N, 0x38008c1c);  in rtw8723d_iqk_rx_path()
1057 	rtw_write32(rtwdev, REG_TX_IQK_TONE_B, 0x38008c1c);  in rtw8723d_iqk_rx_path()
1058 	rtw_write32(rtwdev, REG_RX_IQK_TONE_B, 0x38008c1c);  in rtw8723d_iqk_rx_path()
1059 	rtw_write32(rtwdev, REG_TXIQK_PI_A_11N, 0x82160000);  in rtw8723d_iqk_rx_path()
1060 	rtw_write32(rtwdev, REG_RXIQK_PI_A_11N, 0x28160000);  in rtw8723d_iqk_rx_path()
1063 	rtw_write32(rtwdev, REG_IQK_AGC_RSP_11N, 0x0046a911);  in rtw8723d_iqk_rx_path()
1095 	rtw_write32(rtwdev, REG_TXIQK_11N, BIT_SET_TXIQK_11N(tx_x, tx_y));  in rtw8723d_iqk_rx_path()
1106 	rtw_write32(rtwdev, REG_RXIQK_11N, 0x01004800);  in rtw8723d_iqk_rx_path()
1107 	rtw_write32(rtwdev, REG_TXIQK_TONE_A_11N, 0x38008c1c);  in rtw8723d_iqk_rx_path()
1108 	rtw_write32(rtwdev, REG_RXIQK_TONE_A_11N, 0x18008c1c);  in rtw8723d_iqk_rx_path()
1109 	rtw_write32(rtwdev, REG_TX_IQK_TONE_B, 0x38008c1c);  in rtw8723d_iqk_rx_path()
1110 	rtw_write32(rtwdev, REG_RX_IQK_TONE_B, 0x38008c1c);  in rtw8723d_iqk_rx_path()
1111 	rtw_write32(rtwdev, REG_TXIQK_PI_A_11N, 0x82170000);  in rtw8723d_iqk_rx_path()
1112 	rtw_write32(rtwdev, REG_RXIQK_PI_A_11N, 0x28171400);  in rtw8723d_iqk_rx_path()
1115 	rtw_write32(rtwdev, REG_IQK_AGC_RSP_11N, 0x0046a8d1);  in rtw8723d_iqk_rx_path()
1228 		rtw_write32(rtwdev, iqk_adda_regs[i], 0x03c00016);  in rtw8723d_iqk_path_adda_on()
1315 	rtw_write32(rtwdev, REG_TXIQK_11N, 0x01007c00);  in rtw8723d_iqk_precfg_path()
1316 	rtw_write32(rtwdev, REG_RXIQK_11N, 0x01004800);  in rtw8723d_iqk_precfg_path()
1337 	rtw_write32(rtwdev, REG_BB_RX_PATH_11N, 0x03a05611);  in rtw8723d_iqk_one_round()
1338 	rtw_write32(rtwdev, REG_TRMUX_11N, 0x000800e4);  in rtw8723d_iqk_one_round()
1339 	rtw_write32(rtwdev, REG_BB_PWR_SAV1_11N, 0x25204200);  in rtw8723d_iqk_one_round()
1492 	rtw_write32(rtwdev, REG_BB_SEL_BTG, backup.bb_sel_btg);  in rtw8723d_phy_calibration()
1667 			rtw_write32(rtwdev, REG_AGCRSSI, wl_rx_low_gain_on[i]);  in rtw8723d_coex_cfg_wl_rx_gain()
1670 			rtw_write32(rtwdev, REG_AGCRSSI, wl_rx_low_gain_off[i]);  in rtw8723d_coex_cfg_wl_rx_gain()
1744 		rtw_write32(rtwdev, REG_OFDM_0_XA_TX_IQ_IMBALANCE, value32);  in rtw8723d_set_iqk_matrix_by_result()
1751 		rtw_write32(rtwdev, REG_OFDM_0_ECCA_THRESHOLD, value32);  in rtw8723d_set_iqk_matrix_by_result()
1792 		rtw_write32(rtwdev, REG_OFDM_0_XA_TX_IQ_IMBALANCE, ofdm_swing);  in rtw8723d_set_iqk_matrix()
1797 		rtw_write32(rtwdev, REG_OFDM_0_ECCA_THRESHOLD, value32);  in rtw8723d_set_iqk_matrix()