Lines Matching defs:rtl_dm

1770 struct rtl_dm {  struct
1772 long entry_min_undec_sm_pwdb;
1773 long undec_sm_cck;
1774 long undec_sm_pwdb; /*out dm */
1775 long entry_max_undec_sm_pwdb;
1776 s32 ofdm_pkt_cnt;
1777 bool dm_initialgain_enable;
1778 bool dynamic_txpower_enable;
1779 bool current_turbo_edca;
1780 bool is_any_nonbepkts; /*out dm */
1781 bool is_cur_rdlstate;
1782 bool txpower_trackinginit;
1783 bool disable_framebursting;
1784 bool cck_inch14;
1785 bool txpower_tracking;
1786 bool useramask;
1787 bool rfpath_rxenable[4];
1788 bool inform_fw_driverctrldm;
1789 bool current_mrc_switch;
1790 u8 txpowercount;
1791 u8 powerindex_backup[6];
1793 u8 thermalvalue_rxgain;
1794 u8 thermalvalue_iqk;
1795 u8 thermalvalue_lck;
1796 u8 thermalvalue;
1797 u8 last_dtp_lvl;
1798 u8 thermalvalue_avg[AVG_THERMAL_NUM];
1799 u8 thermalvalue_avg_index;
1800 u8 tm_trigger;
1801 bool done_txpower;
1802 u8 dynamic_txhighpower_lvl; /*Tx high power level */
1803 u8 dm_flag; /*Indicate each dynamic mechanism's status. */
1804 u8 dm_flag_tmp;
1805 u8 dm_type;
1806 u8 dm_rssi_sel;
1807 u8 txpower_track_control;
1808 bool interrupt_migration;
1809 bool disable_tx_int;
1810 s8 ofdm_index[MAX_RF_PATH];
1811 u8 default_ofdm_index;
1812 u8 default_cck_index;
1813 s8 cck_index;
1814 s8 delta_power_index[MAX_RF_PATH];
1815 s8 delta_power_index_last[MAX_RF_PATH];
1816 s8 power_index_offset[MAX_RF_PATH];
1817 s8 absolute_ofdm_swing_idx[MAX_RF_PATH];
1818 s8 remnant_ofdm_swing_idx[MAX_RF_PATH];
1819 s8 remnant_cck_idx;
1820 bool modify_txagc_flag_path_a;
1821 bool modify_txagc_flag_path_b;
1823 bool one_entry_only;
1824 struct dm_phy_dbg_info dbginfo;
1827 bool atc_status;
1828 bool large_cfo_hit;
1829 bool is_freeze;
1830 int cfo_tail[2];
1831 int cfo_ave_pre;
1832 int crystal_cap;
1833 u8 cfo_threshold;
1834 u32 packet_count;
1835 u32 packet_count_pre;
1836 u8 tx_rate;
1839 u8 swing_idx_ofdm[MAX_RF_PATH];
1840 u8 swing_idx_ofdm_cur;
1841 u8 swing_idx_ofdm_base[MAX_RF_PATH];
1842 bool swing_flag_ofdm;
1843 u8 swing_idx_cck;
1844 u8 swing_idx_cck_cur;
1845 u8 swing_idx_cck_base;
1846 bool swing_flag_cck;
1848 s8 swing_diff_2g;
1849 s8 swing_diff_5g;
1852 bool supp_phymode_switch;
1855 struct fast_ant_training fat_table;
1857 u8 resp_tx_path;
1858 u8 path_sel;
1859 u32 patha_sum;
1860 u32 pathb_sum;
1861 u32 patha_cnt;
1862 u32 pathb_cnt;
1864 u8 pre_channel;
1865 u8 *p_channel;
1866 u8 linked_interval;
1868 u64 last_tx_ok_cnt;
1869 u64 last_rx_ok_cnt;
2889 #define rtl_dm(rtlpriv) (&((rtlpriv)->dm)) macro