34 	{0x024, 0xDF}, {0x025, 0x07}, {0x02B, 0x1C}, {0x283, 0x20},
35 	{0x421, 0x0F}, {0x428, 0x0A}, {0x429, 0x10}, {0x430, 0x00},
36 	{0x431, 0x00}, {0x432, 0x00}, {0x433, 0x01}, {0x434, 0x04},
37 	{0x435, 0x05}, {0x436, 0x07}, {0x437, 0x08}, {0x43C, 0x04},
38 	{0x43D, 0x05}, {0x43E, 0x07}, {0x43F, 0x08}, {0x440, 0x5D},
39 	{0x441, 0x01}, {0x442, 0x00}, {0x444, 0x10}, {0x445, 0x00},
40 	{0x446, 0x00}, {0x447, 0x00}, {0x448, 0x00}, {0x449, 0xF0},
41 	{0x44A, 0x0F}, {0x44B, 0x3E}, {0x44C, 0x10}, {0x44D, 0x00},
42 	{0x44E, 0x00}, {0x44F, 0x00}, {0x450, 0x00}, {0x451, 0xF0},
43 	{0x452, 0x0F}, {0x453, 0x00}, {0x456, 0x5E}, {0x460, 0x44},
44 	{0x461, 0x44}, {0x4BC, 0xC0}, {0x4C8, 0xFF}, {0x4C9, 0x08},
45 	{0x4CC, 0xFF}, {0x4CD, 0xFF}, {0x4CE, 0x01}, {0x500, 0x26},
46 	{0x501, 0xA2}, {0x502, 0x2F}, {0x503, 0x00}, {0x504, 0x28},
47 	{0x505, 0xA3}, {0x506, 0x5E}, {0x507, 0x00}, {0x508, 0x2B},
48 	{0x509, 0xA4}, {0x50A, 0x5E}, {0x50B, 0x00}, {0x50C, 0x4F},
49 	{0x50D, 0xA4}, {0x50E, 0x00}, {0x50F, 0x00}, {0x512, 0x1C},
50 	{0x514, 0x0A}, {0x516, 0x0A}, {0x525, 0x4F}, {0x550, 0x10},
51 	{0x551, 0x10}, {0x559, 0x02}, {0x55C, 0x28}, {0x55D, 0xFF},
52 	{0x605, 0x30}, {0x608, 0x0E}, {0x609, 0x2A}, {0x620, 0xFF},
53 	{0x621, 0xFF}, {0x622, 0xFF}, {0x623, 0xFF}, {0x624, 0xFF},
54 	{0x625, 0xFF}, {0x626, 0xFF}, {0x627, 0xFF}, {0x638, 0x28},
55 	{0x63C, 0x0A}, {0x63D, 0x0A}, {0x63E, 0x0E}, {0x63F, 0x0E},
56 	{0x640, 0x40}, {0x642, 0x40}, {0x643, 0x00}, {0x652, 0xC8},
57 	{0x66E, 0x05}, {0x700, 0x21}, {0x701, 0x43}, {0x702, 0x65},
58 	{0x703, 0x87}, {0x708, 0x21}, {0x709, 0x43}, {0x70A, 0x65},
59 	{0x70B, 0x87},
60 	{0xffff, 0xff},
64 	{0x800, 0x80045700}, {0x804, 0x00000001},
65 	{0x808, 0x0000FC00}, {0x80C, 0x0000000A},
66 	{0x810, 0x10001331}, {0x814, 0x020C3D10},
67 	{0x818, 0x00200385}, {0x81C, 0x00000000},
68 	{0x820, 0x01000100}, {0x824, 0x00390204},
69 	{0x828, 0x00000000}, {0x82C, 0x00000000},
70 	{0x830, 0x00000000}, {0x834, 0x00000000},
71 	{0x838, 0x00000000}, {0x83C, 0x00000000},
72 	{0x840, 0x00010000}, {0x844, 0x00000000},
73 	{0x848, 0x00000000}, {0x84C, 0x00000000},
74 	{0x850, 0x00030000}, {0x854, 0x00000000},
75 	{0x858, 0x569A569A}, {0x85C, 0x569A569A},
76 	{0x860, 0x00000130}, {0x864, 0x00000000},
77 	{0x868, 0x00000000}, {0x86C, 0x27272700},
78 	{0x870, 0x00000000}, {0x874, 0x25004000},
79 	{0x878, 0x00000808}, {0x87C, 0x004F0201},
80 	{0x880, 0xB0000B1E}, {0x884, 0x00000007},
81 	{0x888, 0x00000000}, {0x88C, 0xCCC000C0},
82 	{0x890, 0x00000800}, {0x894, 0xFFFFFFFE},
83 	{0x898, 0x40302010}, {0x89C, 0x00706050},
84 	{0x900, 0x00000000}, {0x904, 0x00000023},
85 	{0x908, 0x00000000}, {0x90C, 0x81121111},
86 	{0x910, 0x00000002}, {0x914, 0x00000201},
87 	{0x948, 0x99000000}, {0x94C, 0x00000010},
88 	{0x950, 0x20003000}, {0x954, 0x4A880000},
89 	{0x958, 0x4BC5D87A}, {0x95C, 0x04EB9B79},
90 	{0x96C, 0x00000003}, {0xA00, 0x00D047C8},
91 	{0xA04, 0x80FF800C}, {0xA08, 0x8C898300},
92 	{0xA0C, 0x2E7F120F}, {0xA10, 0x9500BB78},
93 	{0xA14, 0x1114D028}, {0xA18, 0x00881117},
94 	{0xA1C, 0x89140F00}, {0xA20, 0xD1D80000},
95 	{0xA24, 0x5A7DA0BD}, {0xA28, 0x0000223B},
96 	{0xA2C, 0x00D30000}, {0xA70, 0x101FBF00},
97 	{0xA74, 0x00000007}, {0xA78, 0x00000900},
98 	{0xA7C, 0x225B0606}, {0xA80, 0x218075B1},
99 	{0xA84, 0x00120000}, {0xA88, 0x040C0000},
100 	{0xA8C, 0x12345678}, {0xA90, 0xABCDEF00},
101 	{0xA94, 0x001B1B89}, {0xA98, 0x05100000},
102 	{0xA9C, 0x3F000000}, {0xAA0, 0x00000000},
103 	{0xB2C, 0x00000000}, {0xC00, 0x48071D40},
104 	{0xC04, 0x03A05611}, {0xC08, 0x000000E4},
105 	{0xC0C, 0x6C6C6C6C}, {0xC10, 0x18800000},
106 	{0xC14, 0x40000100}, {0xC18, 0x08800000},
107 	{0xC1C, 0x40000100}, {0xC20, 0x00000000},
108 	{0xC24, 0x00000000}, {0xC28, 0x00000000},
109 	{0xC2C, 0x00000000}, {0xC30, 0x69E9CC4A},
110 	{0xC34, 0x31000040}, {0xC38, 0x21688080},
111 	{0xC3C, 0x00001714}, {0xC40, 0x1F78403F},
112 	{0xC44, 0x00010036}, {0xC48, 0xEC020107},
113 	{0xC4C, 0x007F037F}, {0xC50, 0x69553420},
114 	{0xC54, 0x43BC0094}, {0xC58, 0x00013169},
115 	{0xC5C, 0x00250492}, {0xC60, 0x00000000},
116 	{0xC64, 0x7112848B}, {0xC68, 0x47C07BFF},
117 	{0xC6C, 0x00000036}, {0xC70, 0x2C7F000D},
118 	{0xC74, 0x020600DB}, {0xC78, 0x0000001F},
119 	{0xC7C, 0x00B91612}, {0xC80, 0x390000E4},
120 	{0xC84, 0x11F60000},
121 	{0xC88, 0x40000100}, {0xC8C, 0x20200000},
122 	{0xC90, 0x00091521}, {0xC94, 0x00000000},
123 	{0xC98, 0x00121820}, {0xC9C, 0x00007F7F},
124 	{0xCA0, 0x00000000}, {0xCA4, 0x000300A0},
125 	{0xCA8, 0x00000000}, {0xCAC, 0x00000000},
126 	{0xCB0, 0x00000000}, {0xCB4, 0x00000000},
127 	{0xCB8, 0x00000000}, {0xCBC, 0x28000000},
128 	{0xCC0, 0x00000000}, {0xCC4, 0x00000000},
129 	{0xCC8, 0x00000000}, {0xCCC, 0x00000000},
130 	{0xCD0, 0x00000000}, {0xCD4, 0x00000000},
131 	{0xCD8, 0x64B22427}, {0xCDC, 0x00766932},
132 	{0xCE0, 0x00222222}, {0xCE4, 0x10000000},
133 	{0xCE8, 0x37644302}, {0xCEC, 0x2F97D40C},
134 	{0xD00, 0x04030740}, {0xD04, 0x40020401},
135 	{0xD08, 0x0000907F}, {0xD0C, 0x20010201},
136 	{0xD10, 0xA0633333}, {0xD14, 0x3333BC53},
137 	{0xD18, 0x7A8F5B6F}, {0xD2C, 0xCB979975},
138 	{0xD30, 0x00000000}, {0xD34, 0x80608000},
139 	{0xD38, 0x98000000}, {0xD3C, 0x40127353},
140 	{0xD40, 0x00000000}, {0xD44, 0x00000000},
141 	{0xD48, 0x00000000}, {0xD4C, 0x00000000},
142 	{0xD50, 0x6437140A}, {0xD54, 0x00000000},
143 	{0xD58, 0x00000282}, {0xD5C, 0x30032064},
144 	{0xD60, 0x4653DE68}, {0xD64, 0x04518A3C},
145 	{0xD68, 0x00002101}, {0xD6C, 0x2A201C16},
146 	{0xD70, 0x1812362E}, {0xD74, 0x322C2220},
147 	{0xD78, 0x000E3C24}, {0xE00, 0x2D2D2D2D},
148 	{0xE04, 0x2D2D2D2D}, {0xE08, 0x0390272D},
149 	{0xE10, 0x2D2D2D2D}, {0xE14, 0x2D2D2D2D},
150 	{0xE18, 0x2D2D2D2D}, {0xE1C, 0x2D2D2D2D},
151 	{0xE28, 0x00000000}, {0xE30, 0x1000DC1F},
152 	{0xE34, 0x10008C1F}, {0xE38, 0x02140102},
153 	{0xE3C, 0x681604C2}, {0xE40, 0x01007C00},
154 	{0xE44, 0x01004800}, {0xE48, 0xFB000000},
155 	{0xE4C, 0x000028D1}, {0xE50, 0x1000DC1F},
156 	{0xE54, 0x10008C1F}, {0xE58, 0x02140102},
157 	{0xE5C, 0x28160D05}, {0xE60, 0x00000008},
158 	{0xE60, 0x021400A0}, {0xE64, 0x281600A0},
159 	{0xE6C, 0x01C00010}, {0xE70, 0x01C00010},
160 	{0xE74, 0x02000010}, {0xE78, 0x02000010},
161 	{0xE7C, 0x02000010}, {0xE80, 0x02000010},
162 	{0xE84, 0x01C00010}, {0xE88, 0x02000010},
163 	{0xE8C, 0x01C00010}, {0xED0, 0x01C00010},
164 	{0xED4, 0x01C00010}, {0xED8, 0x01C00010},
165 	{0xEDC, 0x00000010}, {0xEE0, 0x00000010},
166 	{0xEEC, 0x03C00010}, {0xF14, 0x00000003},
167 	{0xF4C, 0x00000000}, {0xF00, 0x00000300},
168 	{0xffff, 0xffffffff},
172 	{0xC78, 0xFC000001}, {0xC78, 0xFB010001},
173 	{0xC78, 0xFA020001}, {0xC78, 0xF9030001},
174 	{0xC78, 0xF8040001}, {0xC78, 0xF7050001},
175 	{0xC78, 0xF6060001}, {0xC78, 0xF5070001},
176 	{0xC78, 0xF4080001}, {0xC78, 0xF3090001},
177 	{0xC78, 0xF20A0001}, {0xC78, 0xF10B0001},
178 	{0xC78, 0xF00C0001}, {0xC78, 0xEF0D0001},
179 	{0xC78, 0xEE0E0001}, {0xC78, 0xED0F0001},
180 	{0xC78, 0xEC100001}, {0xC78, 0xEB110001},
181 	{0xC78, 0xEA120001}, {0xC78, 0xE9130001},
182 	{0xC78, 0xE8140001}, {0xC78, 0xE7150001},
183 	{0xC78, 0xE6160001}, {0xC78, 0xE5170001},
184 	{0xC78, 0xE4180001}, {0xC78, 0xE3190001},
185 	{0xC78, 0xE21A0001}, {0xC78, 0xE11B0001},
186 	{0xC78, 0xE01C0001}, {0xC78, 0xC21D0001},
187 	{0xC78, 0xC11E0001}, {0xC78, 0xC01F0001},
188 	{0xC78, 0xA5200001}, {0xC78, 0xA4210001},
189 	{0xC78, 0xA3220001}, {0xC78, 0xA2230001},
190 	{0xC78, 0xA1240001}, {0xC78, 0xA0250001},
191 	{0xC78, 0x65260001}, {0xC78, 0x64270001},
192 	{0xC78, 0x63280001}, {0xC78, 0x62290001},
193 	{0xC78, 0x612A0001}, {0xC78, 0x442B0001},
194 	{0xC78, 0x432C0001}, {0xC78, 0x422D0001},
195 	{0xC78, 0x412E0001}, {0xC78, 0x402F0001},
196 	{0xC78, 0x21300001}, {0xC78, 0x20310001},
197 	{0xC78, 0x05320001}, {0xC78, 0x04330001},
198 	{0xC78, 0x03340001}, {0xC78, 0x02350001},
199 	{0xC78, 0x01360001}, {0xC78, 0x00370001},
200 	{0xC78, 0x00380001}, {0xC78, 0x00390001},
201 	{0xC78, 0x003A0001}, {0xC78, 0x003B0001},
202 	{0xC78, 0x003C0001}, {0xC78, 0x003D0001},
203 	{0xC78, 0x003E0001}, {0xC78, 0x003F0001},
204 	{0xC50, 0x69553422}, {0xC50, 0x69553420},
205 	{0xffff, 0xffffffff}
209 	{0x00, 0x00030000}, {0x08, 0x00008400},
210 	{0x18, 0x00000407}, {0x19, 0x00000012},
211 	{0x1B, 0x00001C6C},
212 	{0x1E, 0x00080009}, {0x1F, 0x00000880},
213 	{0x2F, 0x0001A060}, {0x3F, 0x00028000},
214 	{0x42, 0x000060C0}, {0x57, 0x000D0000},
215 	{0x58, 0x000C0160}, {0x67, 0x00001552},
216 	{0x83, 0x00000000}, {0xB0, 0x000FF9F0},
217 	{0xB1, 0x00022218}, {0xB2, 0x00034C00},
218 	{0xB4, 0x0004484B}, {0xB5, 0x0000112A},
219 	{0xB6, 0x0000053E}, {0xB7, 0x00010408},
220 	{0xB8, 0x00010200}, {0xB9, 0x00080001},
221 	{0xBA, 0x00040001}, {0xBB, 0x00000400},
222 	{0xBF, 0x000C0000}, {0xC2, 0x00002400},
223 	{0xC3, 0x00000009}, {0xC4, 0x00040C91},
224 	{0xC5, 0x00099999}, {0xC6, 0x000000A3},
225 	{0xC7, 0x0008F820}, {0xC8, 0x00076C06},
226 	{0xC9, 0x00000000}, {0xCA, 0x00080000},
227 	{0xDF, 0x00000180}, {0xEF, 0x000001A0},
228 	{0x51, 0x000E8333}, {0x52, 0x000FAC2C},
229 	{0x53, 0x00000103}, {0x56, 0x000517F0},
230 	{0x35, 0x00000099}, {0x35, 0x00000199},
231 	{0x35, 0x00000299}, {0x36, 0x00000064},
232 	{0x36, 0x00008064}, {0x36, 0x00010064},
233 	{0x36, 0x00018064}, {0x18, 0x00000C07},
234 	{0x5A, 0x00048000}, {0x19, 0x000739D0},
235 	{0x34, 0x0000ADD6}, {0x34, 0x00009DD3},
236 	{0x34, 0x00008CF4}, {0x34, 0x00007CF1},
237 	{0x34, 0x00006CEE}, {0x34, 0x00005CEB},
238 	{0x34, 0x00004CCE}, {0x34, 0x00003CCB},
239 	{0x34, 0x00002CC8}, {0x34, 0x00001C4B},
240 	{0x34, 0x00000C48},
241 	{0x00, 0x00030159}, {0x84, 0x00048000},
242 	{0x86, 0x0000002A}, {0x87, 0x00000025},
243 	{0x8E, 0x00065540}, {0x8F, 0x00088000},
244 	{0xEF, 0x000020A0}, {0x3B, 0x000F0F00},
245 	{0x3B, 0x000E0B00}, {0x3B, 0x000D0900},
246 	{0x3B, 0x000C0700}, {0x3B, 0x000B0600},
247 	{0x3B, 0x000A0400}, {0x3B, 0x00090200},
248 	{0x3B, 0x00080000}, {0x3B, 0x0007BF00},
249 	{0x3B, 0x00060B00}, {0x3B, 0x0005C900},
250 	{0x3B, 0x00040700}, {0x3B, 0x00030600},
251 	{0x3B, 0x0002D500}, {0x3B, 0x00010200},
252 	{0x3B, 0x0000E000}, {0xEF, 0x000000A0},
253 	{0xEF, 0x00000010}, {0x3B, 0x0000C0A8},
254 	{0x3B, 0x00010400}, {0xEF, 0x00000000},
255 	{0xEF, 0x00080000}, {0x30, 0x00010000},
256 	{0x31, 0x0000000F}, {0x32, 0x00007EFE},
257 	{0xEF, 0x00000000}, {0x00, 0x00010159},
258 	{0x18, 0x0000FC07}, {0xFE, 0x00000000},
259 	{0xFE, 0x00000000}, {0x1F, 0x00080003},
260 	{0xFE, 0x00000000}, {0xFE, 0x00000000},
261 	{0x1E, 0x00000001}, {0x1F, 0x00080000},
262 	{0x00, 0x00033D95},
263 	{0xff, 0xffffffff}
267 	{0x00, 0x00030000}, {0x08, 0x00008400},
268 	{0x18, 0x00000407}, {0x19, 0x00000012},
269 	{0x1B, 0x00001C6C},
270 	{0x1E, 0x00080009}, {0x1F, 0x00000880},
271 	{0x2F, 0x0001A060}, {0x3F, 0x00028000},
272 	{0x42, 0x000060C0}, {0x57, 0x000D0000},
273 	{0x58, 0x000C0160}, {0x67, 0x00001552},
274 	{0x83, 0x00000000}, {0xB0, 0x000FF9F0},
275 	{0xB1, 0x00022218}, {0xB2, 0x00034C00},
276 	{0xB4, 0x0004484B}, {0xB5, 0x0000112A},
277 	{0xB6, 0x0000053E}, {0xB7, 0x00010408},
278 	{0xB8, 0x00010200}, {0xB9, 0x00080001},
279 	{0xBA, 0x00040001}, {0xBB, 0x00000400},
280 	{0xBF, 0x000C0000}, {0xC2, 0x00002400},
281 	{0xC3, 0x00000009}, {0xC4, 0x00040C91},
282 	{0xC5, 0x00099999}, {0xC6, 0x000000A3},
283 	{0xC7, 0x0008F820}, {0xC8, 0x00076C06},
284 	{0xC9, 0x00000000}, {0xCA, 0x00080000},
285 	{0xDF, 0x00000180}, {0xEF, 0x000001A0},
286 	{0x51, 0x000E8231}, {0x52, 0x000FAC2C},
287 	{0x53, 0x00000141}, {0x56, 0x000517F0},
288 	{0x35, 0x00000090}, {0x35, 0x00000190},
289 	{0x35, 0x00000290}, {0x36, 0x00001064},
290 	{0x36, 0x00009064}, {0x36, 0x00011064},
291 	{0x36, 0x00019064}, {0x18, 0x00000C07},
292 	{0x5A, 0x00048000}, {0x19, 0x000739D0},
293 	{0x34, 0x0000ADD2}, {0x34, 0x00009DD0},
294 	{0x34, 0x00008CF3}, {0x34, 0x00007CF0},
295 	{0x34, 0x00006CED}, {0x34, 0x00005CD2},
296 	{0x34, 0x00004CCF}, {0x34, 0x00003CCC},
297 	{0x34, 0x00002CC9}, {0x34, 0x00001C4C},
298 	{0x34, 0x00000C49},
299 	{0x00, 0x00030159}, {0x84, 0x00048000},
300 	{0x86, 0x0000002A}, {0x87, 0x00000025},
301 	{0x8E, 0x00065540}, {0x8F, 0x00088000},
302 	{0xEF, 0x000020A0}, {0x3B, 0x000F0F00},
303 	{0x3B, 0x000E0B00}, {0x3B, 0x000D0900},
304 	{0x3B, 0x000C0700}, {0x3B, 0x000B0600},
305 	{0x3B, 0x000A0400}, {0x3B, 0x00090200},
306 	{0x3B, 0x00080000}, {0x3B, 0x0007BF00},
307 	{0x3B, 0x00060B00}, {0x3B, 0x0005C900},
308 	{0x3B, 0x00040700}, {0x3B, 0x00030600},
309 	{0x3B, 0x0002D500}, {0x3B, 0x00010200},
310 	{0x3B, 0x0000E000}, {0xEF, 0x000000A0},
311 	{0xEF, 0x00000010}, {0x3B, 0x0000C0A8},
312 	{0x3B, 0x00010400}, {0xEF, 0x00000000},
313 	{0xEF, 0x00080000}, {0x30, 0x00010000},
314 	{0x31, 0x0000000F}, {0x32, 0x00007EFE},
315 	{0xEF, 0x00000000}, {0x00, 0x00010159},
316 	{0x18, 0x0000FC07}, {0xFE, 0x00000000},
317 	{0xFE, 0x00000000}, {0x1F, 0x00080003},
318 	{0xFE, 0x00000000}, {0xFE, 0x00000000},
319 	{0x1E, 0x00000001}, {0x1F, 0x00080000},
320 	{0x00, 0x00033D95},
321 	{0xff, 0xffffffff}
328 	int ret = 0;  in rtl8188fu_identify_chip()
357 		*group = 0;  in rtl8188f_channel_to_group()
385 	val32 &= 0xffff00ff;  in rtl8188f_set_tx_power()
390 	val32 &= 0xff;  in rtl8188f_set_tx_power()
395 	ofdmbase += priv->ofdm_tx_power_diff[0].a;  in rtl8188f_set_tx_power()
403 		/* This diff is always 0 - not used in 8188FU. */  in rtl8188f_set_tx_power()
404 		mcsbase += priv->ht40_tx_power_diff[0].a;  in rtl8188f_set_tx_power()
406 		mcsbase += priv->ht20_tx_power_diff[0].a;  in rtl8188f_set_tx_power()
419 		[5] = 0xFCCD,  in rtl8188f_spur_calibration()
420 		[6] = 0xFC4D,  in rtl8188f_spur_calibration()
421 		[7] = 0xFFCD,  in rtl8188f_spur_calibration()
422 		[8] = 0xFF4D,  in rtl8188f_spur_calibration()
423 		[11] = 0xFDCD,  in rtl8188f_spur_calibration()
424 		[13] = 0xFCCD,  in rtl8188f_spur_calibration()
425 		[14] = 0xFF9A  in rtl8188f_spur_calibration()
429 		[5] = 0x06000000,  in rtl8188f_spur_calibration()
430 		[6] = 0x00000600,  in rtl8188f_spur_calibration()
431 		[13] = 0x06000000  in rtl8188f_spur_calibration()
435 		[11] = 0x04000000  in rtl8188f_spur_calibration()
439 		[7] = 0x06000000,  in rtl8188f_spur_calibration()
440 		[8] = 0x00000380,  in rtl8188f_spur_calibration()
441 		[14] = 0x00180000  in rtl8188f_spur_calibration()
444 	const u8 threshold = 0x16;  in rtl8188f_spur_calibration()
445 	bool do_notch, hw_ctrl, sw_ctrl, hw_ctrl_s1 = 0, sw_ctrl_s1 = 0;  in rtl8188f_spur_calibration()
457 	if (channel <= 14 && frequencies[channel] > 0) {  in rtl8188f_spur_calibration()
479 			val32 |= 0x30;  in rtl8188f_spur_calibration()
483 			rtl8xxxu_write32(priv, REG_FPGA0_ANALOG4, 0xccf000c0);  in rtl8188f_spur_calibration()
489 			rtl8xxxu_write32(priv, REG_FPGA0_PSD_FUNC, 0x400000 | frequencies[channel]);  in rtl8188f_spur_calibration()
499 			rtl8xxxu_write32(priv, REG_FPGA0_ANALOG4, 0xccc000c0);  in rtl8188f_spur_calibration()
511 				rtl8xxxu_write32(priv, 0xd48, 0x0);  in rtl8188f_spur_calibration()
512 				rtl8xxxu_write32(priv, 0xd4c, reg_d4c[channel]);  in rtl8188f_spur_calibration()
607 			sec_ch_above = 0;  in rtl8188fu_config_channel()
619 		val32 &= ~GENMASK(3, 0);  in rtl8188fu_config_channel()
644 		val32 = 0x00065;  in rtl8188fu_config_channel()
646 		val32 = 0x00025;  in rtl8188fu_config_channel()
651 		val32 = 0x0;  in rtl8188fu_config_channel()
653 		val32 = 0x01000;  in rtl8188fu_config_channel()
657 	rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_GAIN_CCA, 0x00140);  in rtl8188fu_config_channel()
658 	rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_RX_G2, 0x01c6c);  in rtl8188fu_config_channel()
668 	val32 &= ~(0xf << 4);  in rtl8188fu_init_aggregation()
679 	agg_rx &= ~0xFF0F; /* reset agg size and timeout */  in rtl8188fu_init_aggregation()
693 	/* Time duration for NHM unit: 4us, 0xc350=200ms */  in rtl8188fu_init_statistics()
694 	rtl8xxxu_write16(priv, REG_NHM_TIMER_8723B + 2, 0xc350);  in rtl8188fu_init_statistics()
695 	rtl8xxxu_write16(priv, REG_NHM_TH9_TH10_8723B + 2, 0xffff);  in rtl8188fu_init_statistics()
696 	rtl8xxxu_write32(priv, REG_NHM_TH3_TO_TH0_8723B, 0xffffff50);  in rtl8188fu_init_statistics()
697 	rtl8xxxu_write32(priv, REG_NHM_TH7_TO_TH4_8723B, 0xffffffff);  in rtl8188fu_init_statistics()
701 	val32 |= 0xff;  in rtl8188fu_init_statistics()
720 	if (efuse->rtl_id != cpu_to_le16(0x8129))  in rtl8188fu_parse_efuse()
732 	priv->ofdm_tx_power_diff[0].a = efuse->tx_power_index_A.ht20_ofdm_1s_diff.a;  in rtl8188fu_parse_efuse()
733 	priv->ht20_tx_power_diff[0].a = efuse->tx_power_index_A.ht20_ofdm_1s_diff.b;  in rtl8188fu_parse_efuse()
735 	priv->default_crystal_cap = efuse->xtal_k & 0x3f;  in rtl8188fu_parse_efuse()
737 	return 0;  in rtl8188fu_parse_efuse()
770 	rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_IQADJ_G1, 0x780);  in rtl8188fu_init_phy_bb()
807 		rtl8xxxu_write8(priv, REG_TXPAUSE, 0xff);  in rtl8188f_phy_lc_calibrate()
814 	rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_MODE_AG, rf_amode | 0x08000);  in rtl8188f_phy_lc_calibrate()
816 	for (i = 0; i < 100; i++) {  in rtl8188f_phy_lc_calibrate()
817 		if ((rtl8xxxu_read_rfreg(priv, RF_A, RF6052_REG_MODE_AG) & 0x08000) == 0)  in rtl8188f_phy_lc_calibrate()
831 		rtl8xxxu_write8(priv, REG_TXPAUSE, 0x00);  in rtl8188f_phy_lc_calibrate()
837 	int result = 0;  in rtl8188fu_iqk_path_a()
843 	val32 &= 0x000000ff;  in rtl8188fu_iqk_path_a()
850 	val32 |= 0x80000;  in rtl8188fu_iqk_path_a()
852 	rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_RCK_OS, 0x20000);  in rtl8188fu_iqk_path_a()
853 	rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_TXPA_G1, 0x0000f);  in rtl8188fu_iqk_path_a()
854 	rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_TXPA_G2, 0x07ff7);  in rtl8188fu_iqk_path_a()
857 	rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_GAIN_CCA, 0x980);  in rtl8188fu_iqk_path_a()
858 	rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_PAD_TXG, 0x5102a);  in rtl8188fu_iqk_path_a()
862 	val32 &= 0x000000ff;  in rtl8188fu_iqk_path_a()
863 	val32 |= 0x80800000;  in rtl8188fu_iqk_path_a()
867 	rtl8xxxu_write32(priv, REG_TX_IQK_TONE_A, 0x18008c1c);  in rtl8188fu_iqk_path_a()
868 	rtl8xxxu_write32(priv, REG_RX_IQK_TONE_A, 0x38008c1c);  in rtl8188fu_iqk_path_a()
870 	rtl8xxxu_write32(priv, REG_TX_IQK_PI_A, 0x821403ff);  in rtl8188fu_iqk_path_a()
871 	rtl8xxxu_write32(priv, REG_RX_IQK_PI_A, 0x28160000);  in rtl8188fu_iqk_path_a()
874 	rtl8xxxu_write32(priv, REG_IQK_AGC_RSP, 0x00462911);  in rtl8188fu_iqk_path_a()
877 	rtl8xxxu_write32(priv, REG_IQK_AGC_PTS, 0xf9000000);  in rtl8188fu_iqk_path_a()
878 	rtl8xxxu_write32(priv, REG_IQK_AGC_PTS, 0xf8000000);  in rtl8188fu_iqk_path_a()
886 	val32 &= 0x000000ff;  in rtl8188fu_iqk_path_a()
889 	rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_GAIN_CCA, 0x180);  in rtl8188fu_iqk_path_a()
900 	    ((reg_e94 & 0x03ff0000) != 0x01420000) &&  in rtl8188fu_iqk_path_a()
901 	    ((reg_e9c & 0x03ff0000) != 0x00420000))  in rtl8188fu_iqk_path_a()
902 		result |= 0x01;  in rtl8188fu_iqk_path_a()
910 	int result = 0;  in rtl8188fu_rx_iqk_path_a()
916 	val32 &= 0x000000ff;  in rtl8188fu_rx_iqk_path_a()
923 	val32 |= 0x80000;  in rtl8188fu_rx_iqk_path_a()
925 	rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_RCK_OS, 0x30000);  in rtl8188fu_rx_iqk_path_a()
926 	rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_TXPA_G1, 0x0000f);  in rtl8188fu_rx_iqk_path_a()
927 	rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_TXPA_G2, 0xf1173);  in rtl8188fu_rx_iqk_path_a()
930 	rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_GAIN_CCA, 0x980);  in rtl8188fu_rx_iqk_path_a()
931 	rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_PAD_TXG, 0x5102a);  in rtl8188fu_rx_iqk_path_a()
937 	val32 &= 0x000000ff;  in rtl8188fu_rx_iqk_path_a()
938 	val32 |= 0x80800000;  in rtl8188fu_rx_iqk_path_a()
944 	rtl8xxxu_write32(priv, REG_TX_IQK, 0x01007c00);  in rtl8188fu_rx_iqk_path_a()
945 	rtl8xxxu_write32(priv, REG_RX_IQK, 0x01004800);  in rtl8188fu_rx_iqk_path_a()
948 	rtl8xxxu_write32(priv, REG_TX_IQK_TONE_A, 0x10008c1c);  in rtl8188fu_rx_iqk_path_a()
949 	rtl8xxxu_write32(priv, REG_RX_IQK_TONE_A, 0x30008c1c);  in rtl8188fu_rx_iqk_path_a()
951 	rtl8xxxu_write32(priv, REG_TX_IQK_PI_A, 0x82160fff);  in rtl8188fu_rx_iqk_path_a()
952 	rtl8xxxu_write32(priv, REG_RX_IQK_PI_A, 0x28160000);  in rtl8188fu_rx_iqk_path_a()
955 	rtl8xxxu_write32(priv, REG_IQK_AGC_RSP, 0x00462911);  in rtl8188fu_rx_iqk_path_a()
958 	rtl8xxxu_write32(priv, REG_IQK_AGC_PTS, 0xf9000000);  in rtl8188fu_rx_iqk_path_a()
959 	rtl8xxxu_write32(priv, REG_IQK_AGC_PTS, 0xf8000000);  in rtl8188fu_rx_iqk_path_a()
967 	val32 &= 0x000000ff;  in rtl8188fu_rx_iqk_path_a()
970 	rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_GAIN_CCA, 0x180);  in rtl8188fu_rx_iqk_path_a()
978 	    ((reg_e94 & 0x03ff0000) != 0x01420000) &&  in rtl8188fu_rx_iqk_path_a()
979 	    ((reg_e9c & 0x03ff0000) != 0x00420000))  in rtl8188fu_rx_iqk_path_a()
980 		result |= 0x01;  in rtl8188fu_rx_iqk_path_a()
984 	val32 = 0x80007c00 | (reg_e94 & 0x3ff0000) |  in rtl8188fu_rx_iqk_path_a()
985 		((reg_e9c & 0x3ff0000) >> 16);  in rtl8188fu_rx_iqk_path_a()
992 	val32 &= 0x000000ff;  in rtl8188fu_rx_iqk_path_a()
996 	val32 |= 0x80000;  in rtl8188fu_rx_iqk_path_a()
998 	rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_RCK_OS, 0x30000);  in rtl8188fu_rx_iqk_path_a()
999 	rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_TXPA_G1, 0x0000f);  in rtl8188fu_rx_iqk_path_a()
1000 	rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_TXPA_G2, 0xf7ff2);  in rtl8188fu_rx_iqk_path_a()
1005 	rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_GAIN_CCA, 0x980);  in rtl8188fu_rx_iqk_path_a()
1006 	rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_PAD_TXG, 0x51000);  in rtl8188fu_rx_iqk_path_a()
1012 	val32 &= 0x000000ff;  in rtl8188fu_rx_iqk_path_a()
1013 	val32 |= 0x80800000;  in rtl8188fu_rx_iqk_path_a()
1019 	rtl8xxxu_write32(priv, REG_RX_IQK, 0x01004800);  in rtl8188fu_rx_iqk_path_a()
1022 	rtl8xxxu_write32(priv, REG_TX_IQK_TONE_A, 0x30008c1c);  in rtl8188fu_rx_iqk_path_a()
1023 	rtl8xxxu_write32(priv, REG_RX_IQK_TONE_A, 0x10008c1c);  in rtl8188fu_rx_iqk_path_a()
1025 	rtl8xxxu_write32(priv, REG_TX_IQK_PI_A, 0x82160000);  in rtl8188fu_rx_iqk_path_a()
1026 	rtl8xxxu_write32(priv, REG_RX_IQK_PI_A, 0x281613ff);  in rtl8188fu_rx_iqk_path_a()
1029 	rtl8xxxu_write32(priv, REG_IQK_AGC_RSP, 0x0046a911);  in rtl8188fu_rx_iqk_path_a()
1032 	rtl8xxxu_write32(priv, REG_IQK_AGC_PTS, 0xf9000000);  in rtl8188fu_rx_iqk_path_a()
1033 	rtl8xxxu_write32(priv, REG_IQK_AGC_PTS, 0xf8000000);  in rtl8188fu_rx_iqk_path_a()
1041 	val32 &= 0x000000ff;  in rtl8188fu_rx_iqk_path_a()
1044 	rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_GAIN_CCA, 0x180);  in rtl8188fu_rx_iqk_path_a()
1054 	    ((reg_ea4 & 0x03ff0000) != 0x01320000) &&  in rtl8188fu_rx_iqk_path_a()
1055 	    ((reg_eac & 0x03ff0000) != 0x00360000))  in rtl8188fu_rx_iqk_path_a()
1056 		result |= 0x02;  in rtl8188fu_rx_iqk_path_a()
1098 	if (t == 0) {  in rtl8188fu_phy_iqcalibrate()
1109 	if (t == 0) {  in rtl8188fu_phy_iqcalibrate()
1119 	rtl8xxxu_write32(priv, REG_OFDM0_TRX_PATH_ENABLE, 0x03a05600);  in rtl8188fu_phy_iqcalibrate()
1120 	rtl8xxxu_write32(priv, REG_OFDM0_TR_MUX_PAR, 0x000800e4);  in rtl8188fu_phy_iqcalibrate()
1121 	rtl8xxxu_write32(priv, REG_FPGA0_XCD_RF_SW_CTRL, 0x25204000);  in rtl8188fu_phy_iqcalibrate()
1125 	val32 |= 0x00ff0000;  in rtl8188fu_phy_iqcalibrate()
1130 	val32 &= 0xff;  in rtl8188fu_phy_iqcalibrate()
1131 	val32 |= 0x80800000;  in rtl8188fu_phy_iqcalibrate()
1133 	rtl8xxxu_write32(priv, REG_TX_IQK, 0x01007c00);  in rtl8188fu_phy_iqcalibrate()
1134 	rtl8xxxu_write32(priv, REG_RX_IQK, 0x01004800);  in rtl8188fu_phy_iqcalibrate()
1136 	for (i = 0; i < retry; i++) {  in rtl8188fu_phy_iqcalibrate()
1138 		if (path_a_ok == 0x01) {  in rtl8188fu_phy_iqcalibrate()
1140 			val32 &= 0xff;  in rtl8188fu_phy_iqcalibrate()
1145 			result[t][0] = (val32 >> 16) & 0x3ff;  in rtl8188fu_phy_iqcalibrate()
1149 			result[t][1] = (val32 >> 16) & 0x3ff;  in rtl8188fu_phy_iqcalibrate()
1154 	for (i = 0; i < retry; i++) {  in rtl8188fu_phy_iqcalibrate()
1156 		if (path_a_ok == 0x03) {  in rtl8188fu_phy_iqcalibrate()
1159 			result[t][2] = (val32 >> 16) & 0x3ff;  in rtl8188fu_phy_iqcalibrate()
1163 			result[t][3] = (val32 >> 16) & 0x3ff;  in rtl8188fu_phy_iqcalibrate()
1173 	val32 &= 0xff;  in rtl8188fu_phy_iqcalibrate()
1176 	if (t == 0)  in rtl8188fu_phy_iqcalibrate()
1184 		val32 = 0x01000000;  in rtl8188fu_phy_iqcalibrate()
1206 	val32 &= 0xffffff00;  in rtl8188fu_phy_iqcalibrate()
1207 	val32 |= 0x50;  in rtl8188fu_phy_iqcalibrate()
1210 	val32 &= 0xffffff00;  in rtl8188fu_phy_iqcalibrate()
1211 	val32 |= rx_initial_gain & 0xff;  in rtl8188fu_phy_iqcalibrate()
1214 	/* Load 0xe30 IQC default value */  in rtl8188fu_phy_iqcalibrate()
1215 	rtl8xxxu_write32(priv, REG_TX_IQK_TONE_A, 0x01008c00);  in rtl8188fu_phy_iqcalibrate()
1216 	rtl8xxxu_write32(priv, REG_RX_IQK_TONE_A, 0x01008c00);  in rtl8188fu_phy_iqcalibrate()
1227 	s32 reg_tmp = 0;  in rtl8188fu_phy_iq_calibrate()
1235 	memset(result, 0, sizeof(result));  in rtl8188fu_phy_iq_calibrate()
1240 	for (i = 0; i < 3; i++) {  in rtl8188fu_phy_iq_calibrate()
1244 			simu = rtl8xxxu_gen2_simularity_compare(priv, result, 0, 1);  in rtl8188fu_phy_iq_calibrate()
1246 				candidate = 0;  in rtl8188fu_phy_iq_calibrate()
1252 			simu = rtl8xxxu_gen2_simularity_compare(priv, result, 0, 2);  in rtl8188fu_phy_iq_calibrate()
1254 				candidate = 0;  in rtl8188fu_phy_iq_calibrate()
1262 				for (i = 0; i < 8; i++)  in rtl8188fu_phy_iq_calibrate()
1273 	for (i = 0; i < 4; i++) {  in rtl8188fu_phy_iq_calibrate()
1274 		reg_e94 = result[i][0];  in rtl8188fu_phy_iq_calibrate()
1284 	if (candidate >= 0) {  in rtl8188fu_phy_iq_calibrate()
1285 		reg_e94 = result[candidate][0];  in rtl8188fu_phy_iq_calibrate()
1304 		reg_e94 = reg_eb4 = priv->rege94 = priv->regeb4 = 0x100;  in rtl8188fu_phy_iq_calibrate()
1305 		reg_e9c = reg_ebc = priv->rege9c = priv->regebc = 0x0;  in rtl8188fu_phy_iq_calibrate()
1308 	if (reg_e94 && candidate >= 0)  in rtl8188fu_phy_iq_calibrate()
1310 					   candidate, (reg_ea4 == 0));  in rtl8188fu_phy_iq_calibrate()
1323 	/* 0x04[12:11] = 2b'01enable WL suspend */  in rtl8188f_disabled_to_emu()
1328 	/* 0xC4[4] <= 1, turn off USB APHY LDO under suspend mode */  in rtl8188f_disabled_to_emu()
1329 	val8 = rtl8xxxu_read8(priv, 0xc4);  in rtl8188f_disabled_to_emu()
1331 	rtl8xxxu_write8(priv, 0xc4, val8);  in rtl8188f_disabled_to_emu()
1338 	int count, ret = 0;  in rtl8188f_emu_to_active()
1345 	/* wait till 0x04[17] = 1 power ready */  in rtl8188f_emu_to_active()
1369 	/* set, then poll until 0 */  in rtl8188f_emu_to_active()
1376 		if ((val32 & APS_FSMCO_MAC_ENABLE) == 0) {  in rtl8188f_emu_to_active()
1377 			ret = 0;  in rtl8188f_emu_to_active()
1388 	/* 0x27<=35 to reduce RF noise */  in rtl8188f_emu_to_active()
1389 	val8 = rtl8xxxu_write8(priv, 0x27, 0x35);  in rtl8188f_emu_to_active()
1398 	int count, ret = 0;  in rtl8188fu_active_to_emu()
1401 	rtl8xxxu_write8(priv, REG_RF_CTRL, 0);  in rtl8188fu_active_to_emu()
1403 	/* 0x4C[23] = 0x4E[7] = 0, switch DPDT_SEL_P output from register 0x65[2] */  in rtl8188fu_active_to_emu()
1404 	val8 = rtl8xxxu_read8(priv, 0x4e);  in rtl8188fu_active_to_emu()
1406 	rtl8xxxu_write8(priv, 0x4e, val8);  in rtl8188fu_active_to_emu()
1408 	/* 0x27 <= 34, xtal_qsel = 0 to xtal bring up */  in rtl8188fu_active_to_emu()
1409 	rtl8xxxu_write8(priv, 0x27, 0x34);  in rtl8188fu_active_to_emu()
1411 	/* 0x04[9] = 1 turn off MAC by HW state machine */  in rtl8188fu_active_to_emu()
1418 		if ((val32 & APS_FSMCO_MAC_OFF) == 0) {  in rtl8188fu_active_to_emu()
1419 			ret = 0;  in rtl8188fu_active_to_emu()
1438 	/* 0x04[12:11] = 2b'01 enable WL suspend */  in rtl8188fu_emu_to_disabled()
1444 	/* 0xC4[4] <= 1, turn off USB APHY LDO under suspend mode */  in rtl8188fu_emu_to_disabled()
1445 	val8 = rtl8xxxu_read8(priv, 0xc4);  in rtl8188fu_emu_to_disabled()
1447 	rtl8xxxu_write8(priv, 0xc4, val8);  in rtl8188fu_emu_to_disabled()
1449 	return 0;  in rtl8188fu_emu_to_disabled()
1466 	rtl8xxxu_write8(priv, REG_TXPAUSE, 0xff);  in rtl8188fu_active_to_lps()
1472 	 * Poll 32 bit wide REG_SCH_TX_CMD for 0x00000000 to ensure no TX is pending.  in rtl8188fu_active_to_lps()
1477 			retval = 0;  in rtl8188fu_active_to_lps()
1502 	val16 |= 0x3f;  in rtl8188fu_active_to_lps()
1526 	rtl8xxxu_write8(priv, REG_CR, 0);  in rtl8188fu_power_on()
1551 	rtl8xxxu_write32(priv, REG_HISR0, 0xFFFFFFFF);  in rtl8188fu_power_off()
1552 	rtl8xxxu_write32(priv, REG_HISR1, 0xFFFFFFFF);  in rtl8188fu_power_off()
1554 	/* Stop Tx Report Timer. 0x4EC[Bit1]=b'0 */  in rtl8188fu_power_off()
1560 	rtl8xxxu_write8(priv, REG_RF_CTRL, 0x00);  in rtl8188fu_power_off()
1574 	rtl8xxxu_write8(priv, REG_MCU_FW_DL, 0x00);  in rtl8188fu_power_off()
1580 #define PPG_BB_GAIN_2G_TXA_OFFSET_8188F 0xee
1581 #define PPG_BB_GAIN_2G_TX_OFFSET_MASK 0x0f
1586 	u8 pg_pwrtrim = 0xff, val8;  in rtl8188f_enable_rf()
1592 	if (pg_pwrtrim != 0xff) {  in rtl8188f_enable_rf()
1596 			bb_gain = 0;  in rtl8188f_enable_rf()
1603 		if (bb_gain > 0)  in rtl8188f_enable_rf()
1607 		val32 &= ~0xfc000;  in rtl8188f_enable_rf()
1619 	rtl8xxxu_write8(priv, REG_TXPAUSE, 0x00);  in rtl8188f_enable_rf()
1631 	rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_AC, 0);  in rtl8188f_disable_rf()
1662 	        "%s: Adjusting crystal cap from 0x%x (actually 0x%lx 0x%lx) to 0x%x\n",  in rtl8188f_set_crystal_cap()
1680 	s8 rx_pwr_all = 0x00;  in rtl8188f_cck_rssi()
1749 	.ampdu_max_time = 0x70,
1750 	.ustime_tsf_edca = 0x28,
1751 	.max_aggr_num = 0x0c14,
1754 	.adda_1t_init = 0x03c00014,
1755 	.adda_1t_path_on = 0x03c00014,
1756 	.trxff_boundary = 0x3f7f,