Lines Matching full:dp
28 /* TODO: Any other peer specific DP cleanup */ in ath12k_dp_peer_cleanup()
52 reo_dest = ar->dp.mac_id + 1; in ath12k_dp_peer_setup()
185 ret = ath12k_hif_get_user_msi_vector(ab, "DP", in ath12k_dp_srng_msi_setup()
297 ath12k_warn(ab, "Not a valid ring type in dp :%d\n", type); in ath12k_dp_srng_setup()
353 struct ath12k_dp *dp) in ath12k_dp_tx_get_bank_profile() argument
363 spin_lock_bh(&dp->tx_bank_lock); in ath12k_dp_tx_get_bank_profile()
365 for (i = 0; i < dp->num_bank_profiles; i++) { in ath12k_dp_tx_get_bank_profile()
366 if (dp->bank_profiles[i].is_configured && in ath12k_dp_tx_get_bank_profile()
367 (dp->bank_profiles[i].bank_config ^ bank_config) == 0) { in ath12k_dp_tx_get_bank_profile()
371 if (!dp->bank_profiles[i].is_configured || in ath12k_dp_tx_get_bank_profile()
372 !dp->bank_profiles[i].num_users) { in ath12k_dp_tx_get_bank_profile()
379 spin_unlock_bh(&dp->tx_bank_lock); in ath12k_dp_tx_get_bank_profile()
385 dp->bank_profiles[bank_id].is_configured = true; in ath12k_dp_tx_get_bank_profile()
386 dp->bank_profiles[bank_id].bank_config = bank_config; in ath12k_dp_tx_get_bank_profile()
389 dp->bank_profiles[bank_id].num_users++; in ath12k_dp_tx_get_bank_profile()
390 spin_unlock_bh(&dp->tx_bank_lock); in ath12k_dp_tx_get_bank_profile()
396 bank_id, bank_config, dp->bank_profiles[bank_id].bank_config, in ath12k_dp_tx_get_bank_profile()
397 dp->bank_profiles[bank_id].num_users); in ath12k_dp_tx_get_bank_profile()
402 void ath12k_dp_tx_put_bank_profile(struct ath12k_dp *dp, u8 bank_id) in ath12k_dp_tx_put_bank_profile() argument
404 spin_lock_bh(&dp->tx_bank_lock); in ath12k_dp_tx_put_bank_profile()
405 dp->bank_profiles[bank_id].num_users--; in ath12k_dp_tx_put_bank_profile()
406 spin_unlock_bh(&dp->tx_bank_lock); in ath12k_dp_tx_put_bank_profile()
411 struct ath12k_dp *dp = &ab->dp; in ath12k_dp_deinit_bank_profiles() local
413 kfree(dp->bank_profiles); in ath12k_dp_deinit_bank_profiles()
414 dp->bank_profiles = NULL; in ath12k_dp_deinit_bank_profiles()
419 struct ath12k_dp *dp = &ab->dp; in ath12k_dp_init_bank_profiles() local
423 dp->num_bank_profiles = num_tcl_banks; in ath12k_dp_init_bank_profiles()
424 dp->bank_profiles = kmalloc_array(num_tcl_banks, in ath12k_dp_init_bank_profiles()
427 if (!dp->bank_profiles) in ath12k_dp_init_bank_profiles()
430 spin_lock_init(&dp->tx_bank_lock); in ath12k_dp_init_bank_profiles()
433 dp->bank_profiles[i].is_configured = false; in ath12k_dp_init_bank_profiles()
434 dp->bank_profiles[i].num_users = 0; in ath12k_dp_init_bank_profiles()
442 struct ath12k_dp *dp = &ab->dp; in ath12k_dp_srng_common_cleanup() local
445 ath12k_dp_srng_cleanup(ab, &dp->reo_status_ring); in ath12k_dp_srng_common_cleanup()
446 ath12k_dp_srng_cleanup(ab, &dp->reo_cmd_ring); in ath12k_dp_srng_common_cleanup()
447 ath12k_dp_srng_cleanup(ab, &dp->reo_except_ring); in ath12k_dp_srng_common_cleanup()
448 ath12k_dp_srng_cleanup(ab, &dp->rx_rel_ring); in ath12k_dp_srng_common_cleanup()
449 ath12k_dp_srng_cleanup(ab, &dp->reo_reinject_ring); in ath12k_dp_srng_common_cleanup()
451 ath12k_dp_srng_cleanup(ab, &dp->tx_ring[i].tcl_comp_ring); in ath12k_dp_srng_common_cleanup()
452 ath12k_dp_srng_cleanup(ab, &dp->tx_ring[i].tcl_data_ring); in ath12k_dp_srng_common_cleanup()
454 ath12k_dp_srng_cleanup(ab, &dp->tcl_status_ring); in ath12k_dp_srng_common_cleanup()
455 ath12k_dp_srng_cleanup(ab, &dp->tcl_cmd_ring); in ath12k_dp_srng_common_cleanup()
456 ath12k_dp_srng_cleanup(ab, &dp->wbm_desc_rel_ring); in ath12k_dp_srng_common_cleanup()
461 struct ath12k_dp *dp = &ab->dp; in ath12k_dp_srng_common_setup() local
467 ret = ath12k_dp_srng_setup(ab, &dp->wbm_desc_rel_ring, in ath12k_dp_srng_common_setup()
476 ret = ath12k_dp_srng_setup(ab, &dp->tcl_cmd_ring, HAL_TCL_CMD, 0, 0, in ath12k_dp_srng_common_setup()
483 ret = ath12k_dp_srng_setup(ab, &dp->tcl_status_ring, HAL_TCL_STATUS, in ath12k_dp_srng_common_setup()
494 ret = ath12k_dp_srng_setup(ab, &dp->tx_ring[i].tcl_data_ring, in ath12k_dp_srng_common_setup()
503 ret = ath12k_dp_srng_setup(ab, &dp->tx_ring[i].tcl_comp_ring, in ath12k_dp_srng_common_setup()
513 ret = ath12k_dp_srng_setup(ab, &dp->reo_reinject_ring, HAL_REO_REINJECT, in ath12k_dp_srng_common_setup()
521 ret = ath12k_dp_srng_setup(ab, &dp->rx_rel_ring, HAL_WBM2SW_RELEASE, in ath12k_dp_srng_common_setup()
529 ret = ath12k_dp_srng_setup(ab, &dp->reo_except_ring, HAL_REO_EXCEPTION, in ath12k_dp_srng_common_setup()
537 ret = ath12k_dp_srng_setup(ab, &dp->reo_cmd_ring, HAL_REO_CMD, in ath12k_dp_srng_common_setup()
544 srng = &ab->hal.srng_list[dp->reo_cmd_ring.ring_id]; in ath12k_dp_srng_common_setup()
547 ret = ath12k_dp_srng_setup(ab, &dp->reo_status_ring, HAL_REO_STATUS, in ath12k_dp_srng_common_setup()
581 struct ath12k_dp *dp = &ab->dp; in ath12k_dp_scatter_idle_link_desc_cleanup() local
582 struct hal_wbm_idle_scatter_list *slist = dp->scatter_list; in ath12k_dp_scatter_idle_link_desc_cleanup()
601 struct ath12k_dp *dp = &ab->dp; in ath12k_dp_scatter_idle_link_desc_setup() local
602 struct dp_link_desc_bank *link_desc_banks = dp->link_desc_banks; in ath12k_dp_scatter_idle_link_desc_setup()
603 struct hal_wbm_idle_scatter_list *slist = dp->scatter_list; in ath12k_dp_scatter_idle_link_desc_setup()
693 struct ath12k_dp *dp = &ab->dp; in ath12k_dp_link_desc_bank_alloc() local
722 ath12k_dp_link_desc_bank_free(ab, dp->link_desc_banks); in ath12k_dp_link_desc_bank_alloc()
741 struct ath12k_dp *dp = &ab->dp; in ath12k_wbm_idle_ring_setup() local
766 ret = ath12k_dp_srng_setup(ab, &dp->wbm_idle_ring, in ath12k_wbm_idle_ring_setup()
960 struct ath12k_dp *dp = &ab->dp; in ath12k_dp_service_srng() local
961 struct dp_rxdma_ring *rx_ring = &dp->rx_refill_buf_ring; in ath12k_dp_service_srng()
987 struct ath12k_pdev_dp *dp; in ath12k_dp_pdev_pre_alloc() local
992 dp = &ar->dp; in ath12k_dp_pdev_pre_alloc()
993 dp->mac_id = i; in ath12k_dp_pdev_pre_alloc()
994 atomic_set(&dp->num_tx_pending, 0); in ath12k_dp_pdev_pre_alloc()
995 init_waitqueue_head(&dp->tx_empty_waitq); in ath12k_dp_pdev_pre_alloc()
1057 int ath12k_dp_htt_connect(struct ath12k_dp *dp) in ath12k_dp_htt_connect() argument
1069 status = ath12k_htc_connect_service(&dp->ab->htc, &conn_req, in ath12k_dp_htt_connect()
1075 dp->eid = conn_resp.eid; in ath12k_dp_htt_connect()
1116 arvif->bank_id = ath12k_dp_tx_get_bank_profile(ab, arvif, &ab->dp); in ath12k_dp_vdev_tx_attach()
1120 ath12k_err(ar->ab, "Failed to initialize DP TX Banks"); in ath12k_dp_vdev_tx_attach()
1129 struct ath12k_dp *dp = &ab->dp; in ath12k_dp_cc_cleanup() local
1134 if (!dp->spt_info) in ath12k_dp_cc_cleanup()
1138 spin_lock_bh(&dp->rx_desc_lock); in ath12k_dp_cc_cleanup()
1140 list_for_each_entry_safe(desc_info, tmp, &dp->rx_desc_used_list, list) { in ath12k_dp_cc_cleanup()
1153 if (!dp->spt_info->rxbaddr[i]) in ath12k_dp_cc_cleanup()
1156 kfree(dp->spt_info->rxbaddr[i]); in ath12k_dp_cc_cleanup()
1157 dp->spt_info->rxbaddr[i] = NULL; in ath12k_dp_cc_cleanup()
1160 spin_unlock_bh(&dp->rx_desc_lock); in ath12k_dp_cc_cleanup()
1164 spin_lock_bh(&dp->tx_desc_lock[i]); in ath12k_dp_cc_cleanup()
1166 list_for_each_entry_safe(tx_desc_info, tmp1, &dp->tx_desc_used_list[i], in ath12k_dp_cc_cleanup()
1179 spin_unlock_bh(&dp->tx_desc_lock[i]); in ath12k_dp_cc_cleanup()
1183 spin_lock_bh(&dp->tx_desc_lock[pool_id]); in ath12k_dp_cc_cleanup()
1187 if (!dp->spt_info->txbaddr[tx_spt_page]) in ath12k_dp_cc_cleanup()
1190 kfree(dp->spt_info->txbaddr[tx_spt_page]); in ath12k_dp_cc_cleanup()
1191 dp->spt_info->txbaddr[tx_spt_page] = NULL; in ath12k_dp_cc_cleanup()
1194 spin_unlock_bh(&dp->tx_desc_lock[pool_id]); in ath12k_dp_cc_cleanup()
1198 for (i = 0; i < dp->num_spt_pages; i++) { in ath12k_dp_cc_cleanup()
1199 if (!dp->spt_info[i].vaddr) in ath12k_dp_cc_cleanup()
1203 dp->spt_info[i].vaddr, dp->spt_info[i].paddr); in ath12k_dp_cc_cleanup()
1204 dp->spt_info[i].vaddr = NULL; in ath12k_dp_cc_cleanup()
1207 kfree(dp->spt_info); in ath12k_dp_cc_cleanup()
1212 struct ath12k_dp *dp = &ab->dp; in ath12k_dp_reoq_lut_cleanup() local
1217 if (!dp->reoq_lut.vaddr) in ath12k_dp_reoq_lut_cleanup()
1221 dp->reoq_lut.vaddr, dp->reoq_lut.paddr); in ath12k_dp_reoq_lut_cleanup()
1222 dp->reoq_lut.vaddr = NULL; in ath12k_dp_reoq_lut_cleanup()
1230 struct ath12k_dp *dp = &ab->dp; in ath12k_dp_free() local
1233 ath12k_dp_link_desc_cleanup(ab, dp->link_desc_banks, in ath12k_dp_free()
1234 HAL_WBM_IDLE_LINK, &dp->wbm_idle_ring); in ath12k_dp_free()
1244 kfree(dp->tx_ring[i].tx_status); in ath12k_dp_free()
1308 struct ath12k_dp *dp = &ab->dp; in ath12k_dp_cc_get_desc_addr_ptr() local
1310 return dp->spt_info[ppt_idx].vaddr + spt_idx; in ath12k_dp_cc_get_desc_addr_ptr()
1341 ppt_idx > ab->dp.num_spt_pages || in ath12k_dp_get_tx_desc()
1352 struct ath12k_dp *dp = &ab->dp; in ath12k_dp_cc_desc_init() local
1358 spin_lock_bh(&dp->rx_desc_lock); in ath12k_dp_cc_desc_init()
1366 spin_unlock_bh(&dp->rx_desc_lock); in ath12k_dp_cc_desc_init()
1370 dp->spt_info->rxbaddr[i] = &rx_descs[0]; in ath12k_dp_cc_desc_init()
1375 list_add_tail(&rx_descs[j].list, &dp->rx_desc_free_list); in ath12k_dp_cc_desc_init()
1383 spin_unlock_bh(&dp->rx_desc_lock); in ath12k_dp_cc_desc_init()
1386 spin_lock_bh(&dp->tx_desc_lock[pool_id]); in ath12k_dp_cc_desc_init()
1392 spin_unlock_bh(&dp->tx_desc_lock[pool_id]); in ath12k_dp_cc_desc_init()
1398 dp->spt_info->txbaddr[tx_spt_page] = &tx_descs[0]; in ath12k_dp_cc_desc_init()
1405 &dp->tx_desc_free_list[pool_id]); in ath12k_dp_cc_desc_init()
1413 spin_unlock_bh(&dp->tx_desc_lock[pool_id]); in ath12k_dp_cc_desc_init()
1420 struct ath12k_dp *dp = &ab->dp; in ath12k_dp_cc_init() local
1424 INIT_LIST_HEAD(&dp->rx_desc_free_list); in ath12k_dp_cc_init()
1425 INIT_LIST_HEAD(&dp->rx_desc_used_list); in ath12k_dp_cc_init()
1426 spin_lock_init(&dp->rx_desc_lock); in ath12k_dp_cc_init()
1429 INIT_LIST_HEAD(&dp->tx_desc_free_list[i]); in ath12k_dp_cc_init()
1430 INIT_LIST_HEAD(&dp->tx_desc_used_list[i]); in ath12k_dp_cc_init()
1431 spin_lock_init(&dp->tx_desc_lock[i]); in ath12k_dp_cc_init()
1434 dp->num_spt_pages = ATH12K_NUM_SPT_PAGES; in ath12k_dp_cc_init()
1435 if (dp->num_spt_pages > ATH12K_MAX_PPT_ENTRIES) in ath12k_dp_cc_init()
1436 dp->num_spt_pages = ATH12K_MAX_PPT_ENTRIES; in ath12k_dp_cc_init()
1438 dp->spt_info = kcalloc(dp->num_spt_pages, sizeof(struct ath12k_spt_info), in ath12k_dp_cc_init()
1441 if (!dp->spt_info) { in ath12k_dp_cc_init()
1448 for (i = 0; i < dp->num_spt_pages; i++) { in ath12k_dp_cc_init()
1449 dp->spt_info[i].vaddr = dma_alloc_coherent(ab->dev, in ath12k_dp_cc_init()
1451 &dp->spt_info[i].paddr, in ath12k_dp_cc_init()
1454 if (!dp->spt_info[i].vaddr) { in ath12k_dp_cc_init()
1459 if (dp->spt_info[i].paddr & ATH12K_SPT_4K_ALIGN_CHECK) { in ath12k_dp_cc_init()
1467 dp->spt_info[i].paddr >> ATH12K_SPT_4K_ALIGN_OFFSET); in ath12k_dp_cc_init()
1484 struct ath12k_dp *dp = &ab->dp; in ath12k_dp_reoq_lut_setup() local
1489 dp->reoq_lut.vaddr = dma_alloc_coherent(ab->dev, in ath12k_dp_reoq_lut_setup()
1491 &dp->reoq_lut.paddr, in ath12k_dp_reoq_lut_setup()
1493 if (!dp->reoq_lut.vaddr) { in ath12k_dp_reoq_lut_setup()
1499 dp->reoq_lut.paddr); in ath12k_dp_reoq_lut_setup()
1505 struct ath12k_dp *dp = &ab->dp; in ath12k_dp_alloc() local
1512 dp->ab = ab; in ath12k_dp_alloc()
1514 INIT_LIST_HEAD(&dp->reo_cmd_list); in ath12k_dp_alloc()
1515 INIT_LIST_HEAD(&dp->reo_cmd_cache_flush_list); in ath12k_dp_alloc()
1516 spin_lock_init(&dp->reo_cmd_lock); in ath12k_dp_alloc()
1518 dp->reo_cmd_cache_flush_count = 0; in ath12k_dp_alloc()
1526 srng = &ab->hal.srng_list[dp->wbm_idle_ring.ring_id]; in ath12k_dp_alloc()
1528 ret = ath12k_dp_link_desc_setup(ab, dp->link_desc_banks, in ath12k_dp_alloc()
1560 dp->tx_ring[i].tcl_data_ring_id = i; in ath12k_dp_alloc()
1562 dp->tx_ring[i].tx_status_head = 0; in ath12k_dp_alloc()
1563 dp->tx_ring[i].tx_status_tail = DP_TX_COMP_RING_SIZE - 1; in ath12k_dp_alloc()
1564 dp->tx_ring[i].tx_status = kmalloc(size, GFP_KERNEL); in ath12k_dp_alloc()
1565 if (!dp->tx_ring[i].tx_status) { in ath12k_dp_alloc()
1581 /* Init any SOC level resource for DP */ in ath12k_dp_alloc()
1601 ath12k_dp_link_desc_cleanup(ab, dp->link_desc_banks, in ath12k_dp_alloc()
1602 HAL_WBM_IDLE_LINK, &dp->wbm_idle_ring); in ath12k_dp_alloc()